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path: root/drivers/usb/dwc3
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* usb: dwc3: dwc3-omap: correct the register macrosBin Liu2015-04-271-47/+47
| | | | | | | | The macros related to register UTMI_OTG_CTRL and UTMI_OTG_STATUS are swapped. Correct them for readability. Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: make LPM configurable in DTRobert Baldyga2015-03-105-10/+7
| | | | | | | | | | | | This patch removes "Enable USB3 LPM Capability" option from Kconfig and adds snps,usb3_lpm_capable devicetree property instead of it. USB3 LPM (Link Power Management) capability is hardware property, and it's platform dependent, so if our hardware supports this feature, we want rather to configure it in devicetree than having it as Kconfig option. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: move definition of PCI_VENDOR_ID_SYNOPSYS to linux/pci_ids.hJoseph Kogut2015-03-101-2/+0
| | | | | | | | Removed FIXME from usb/dwc3/dwc3-pci.c by moving definition of PCI_VENDOR_ID_SYNOPSYS shared with usb/dwc2 to linux/pci_ids.h. Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: gadget: drop unnecessary loop when cleaning up TRBsFelipe Balbi2015-03-091-21/+16
| | | | | | | | | Now that we're using XFERINPROGRESS for all endpoint types (except Control), we will *always* be completing one TRB at a time, so it's safe to remove the loop from dwc3_cleanup_done_reqs. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: omap: call of_platform_depopulate() insteadFelipe Balbi2015-03-091-10/+1
| | | | | | | | | | | | | | | | | This patch fixes a bug where removing dwc3-omap.ko would not trigger removal of dwc3.ko. of_platform_depopulate() already bakes an easy to use API for removing all our children which were populated during probe(); Let's use that one instead of cooking our own solution. Note that this is kind of a revert of commit c5a1fbc (usb: dwc3: dwc3-omap: Fix the crash on module removal) although we can't simply revert that because a direct call to platform_device_unregister would also be flakey. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: only reset res->start in case of errorFelipe Balbi2015-03-091-22/+34
| | | | | | | | | | | That trick is only needed if we end up with an error, so there's no point in messing that outside of an error path. In fact doing so causes problems when removing dwc3.ko, problems which commit c5a1fbc (usb: dwc3: dwc3-omap: Fix the crash on module removal) mistakenly tried to fix. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: dwc3-omap: Fix disable IRQGeorge Cherian2015-02-231-2/+28
| | | | | | | | | | | | | | In the wrapper the IRQ disable should be done by writing 1's to the IRQ*_CLR register. Existing code is broken because it instead writes zeros to IRQ*_SET register. Fix this by adding functions dwc3_omap_write_irqmisc_clr() and dwc3_omap_write_irq0_clr() which do the right thing. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Cc: <stable@vger.kernel.org> # v3.2+ Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: gadget: use common is_selfpoweredPeter Chen2015-01-293-4/+2
| | | | | | | Delete private selfpowered variable, and use common one. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: gadget: add missing spin_lock()Felipe Balbi2015-01-291-0/+1
| | | | | | | | | | | | commit 8e74475b0e0a (usb: dwc3: gadget: use udc-core's reset notifier) added support for the new UDC core's reset notifier to dwc3 but while at it, it removed a spin_lock() from dwc3_reset_gadget() which might cause an unbalanced spin_unlock() further down the line Fixes: 8e74475b0e0a (usb: dwc3: gadget: use udc-core's reset notifier) Cc: <stable@vger.kernel.org> # v3.19 Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: remove reliance on dev_vdbg()Felipe Balbi2015-01-274-35/+39
| | | | | | | | By moving all dev_vdbg() to tracepoints, we can finally get rid of dev_vdbg() usage from dwc3. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: trace: add trace logs for core and gadgetFelipe Balbi2015-01-271-0/+10
| | | | | | | | | Sometimes we want to just print a formatted string without passing any extra data. The following will be used for removing reliance on dev_vdbg() from dwc3. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: gadget: WARN() in case of unknown IRQFelipe Balbi2015-01-271-1/+1
| | | | | | | | | if an unknown IRQ event is triggered, that means the HW is really misbehaving. Instead of printing a debug message, let's WARN() so users report when that happens. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: gadget: avoid variable shadowingFelipe Balbi2015-01-271-6/+1
| | | | | | | We already have both ret and dwc defined in this same function. Signed-off-by: Felipe Balbi <balbi@ti.com>
* Merge tag 'v3.19-rc5' into nextFelipe Balbi2015-01-192-2/+8
|\ | | | | | | | | | | | | | | Linux 3.19-rc5 Conflicts: drivers/usb/dwc2/gadget.c drivers/usb/gadget/udc/bdc/bdc_ep.c
| * usb: dwc3: gadget: Stop TRB preparation after limit is reachedAmit Virdi2015-01-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DWC3 gadget sets up a pool of 32 TRBs for each EP during initialization. This means, the max TRBs that can be submitted for an EP is fixed to 32. Since the request queue for an EP is a linked list, any number of requests can be queued to it by the gadget layer. However, the dwc3 driver must not submit TRBs more than the pool it has created for. This limit wasn't respected when SG was used resulting in submitting more than the max TRBs, eventually leading to non-transfer of the TRBs submitted over the max limit. Root cause: When SG is used, there are two loops iterating to prepare TRBs: - Outer loop over the request_list - Inner loop over the SG list The code was missing break to get out of the outer loop. Fixes: eeb720fb21d6 (usb: dwc3: gadget: add support for SG lists) Cc: <stable@vger.kernel.org> # v3.9+ Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: dwc3: gadget: Fix TRB preparation during SGAmit Virdi2015-01-141-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When scatter gather (SG) is used, multiple TRBs are prepared from one DWC3 request (dwc3_request). So while preparing TRBs, the 'last' flag should be set only when it is the last TRB being prepared from the last dwc3_request entry. The current implementation uses list_is_last to check if the dwc3_request is the last entry from the request_list. However, list_is_last returns false for the last entry too. This is because, while preparing the first TRB from a request, the function dwc3_prepare_one_trb modifies the request's next and prev pointers while moving the URB to req_queued. Hence, list_is_last always returns false no matter what. The correct way is not to access the modified pointers of dwc3_request but to use list_empty macro instead. Fixes: e5ba5ec833aa (usb: dwc3: gadget: fix scatter gather implementation) Signed-off-by: Amit Virdi <amit.virdi@st.com> Cc: <stable@vger.kernel.org> # v3.9+ Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: dwc3: pci: add support for Intel Sunrise Point PCHHeikki Krogerus2014-12-221-0/+4
| | | | | | | | | | | | | | Add PCI IDs for Intel Sunrise Point PCH. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: pci: code cleanupHeikki Krogerus2015-01-151-54/+42
| | | | | | | | | | | | | | | | | | Removing a few items that are not needed anymore and adding separate function for quirks. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: pci: rely on default PM callbacks from PCI driver utilityHeikki Krogerus2015-01-151-34/+0
| | | | | | | | | | | | | | | | | | | | There is nothing specific being done in the suspend and resume callbacks that is not already taken care of in PCI driver core, so dropping the functions. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: pci: remove registration of NOP PHYsHeikki Krogerus2015-01-151-68/+0
| | | | | | | | | | | | | | | | | | | | None of the PCI platforms need the NOP transceivers, and since we can now live without the PHYs, removing registration of the platform devices for them. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: Remove current_trb as it is unusedAmit Virdi2015-01-121-3/+0
| | | | | | | | | | | | | | This field was introduced but never used. So, remove it. Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: gadget: Remove redundant checkAmit Virdi2015-01-121-3/+0
| | | | | | | | | | | | | | | | dwc3_gadget_init_hw_endpoints calls dwc3_alloc_trb_pool only if epnum is not equal to 0 or 1. Hence, rechecking it in the called function is redundant. Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: Fixed a typo in commentsMickael Maison2015-01-121-1/+1
|/ | | | | | | Fixed a typo in comments Signed-off-by: Mickael Maison <mickael.maison@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* Merge 3.18-rc7 into usb-nextGreg Kroah-Hartman2014-11-301-4/+4
|\ | | | | | | | | | | | | We need the xhci fixes here and this resolves a merge issue with drivers/usb/dwc3/ep0.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * usb: dwc3: ep0: fix for dead codeFelipe Balbi2014-11-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6856d30 (usb: dwc3: ep0: return early on NULL requests) tried to fix a minor corner case where we could dereference a NULL pointer but it also ended up introducing some dead code. Unfortunately, that dead code, if reached, could end up starving the endpoint request list because a request would never be given back when it should. Fix this by moving the check for empty request list before its first use. Reported-by: Dave Jones <davej@redhat.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | Merge tag 'for-3.19' of ↵Greg Kroah-Hartman2014-11-271-6/+16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-testing Kishon writes: Improvements in phy-core specifically on PHY core finds the PHY in the case of non-dt boot. Adds three new PHY drivers using the PHY framework and some miscellaneous fixes and cleanups.
| * | usb: dwc3: host: convey the PHYs to xhciHeikki Krogerus2014-11-221-6/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | On some platforms a PHY may need to be handled also in the host controller driver. Exynos5420 SoC requires some "PHY tuning" based on the USB speed. This patch delivers dwc3's PHYs to the xhci platform device when it's created. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | usb: dwc3: return error code from the most recent callJulia Lawall2014-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Copy-paste error from the previous block of error handling code. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1; @@ if (IS_ERR(e)) { ... ( ret = PTR_ERR(e); | * ret = PTR_ERR(e1); ) ... return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: exynos: Add provision for AXI UpScaler clock on exynos7Vivek Gautam2014-11-211-0/+17
| | | | | | | | | | | | | | | | | | | | | | DWC3 controller on Exynos7 SoC has separate control for AXI UpScaler which connects DWC3 DRD controller to AXI bus. Get the gate clock for the same to control it across power cycles. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: exynos: Add provision for suspend clockVivek Gautam2014-11-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | DWC3 controller on Exynos SoC series have separate control for suspend clock which replaces pipe3_rx_pclk as clock source to a small part of DWC3 core that operates when SS PHY is in its lowest power state (P3) in states SS.disabled and U3. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: exynos: Remove local variable for clock from probeVivek Gautam2014-11-211-8/+5
| | | | | | | | | | | | | | | | | | There's no need to keep one local variable for clock, and then assign the same to 'clk' member of dwc3_exynos. Just cleaning it up. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: keystone: fix error return codeJulia Lawall2014-11-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Return a negative error code on failure. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier ret; expression e1,e2; @@ ( if (\(ret < 0\|ret != 0\)) { ... return ret; } | ret = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: trace: don't save pointersFelipe Balbi2014-11-201-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There was another instance where we were holding pointers which could be long gone. Fix that by caching only values pointed to by such pointer. Because no crash has been observed, this patch will be sent on v3.19 merge window, instead of -rc. Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: gadget: use udc-core's reset notifierFelipe Balbi2014-11-101-5/+12
| | | | | | | | | | | | | | | | | | Replace usb_gadget_driver's disconnect with udc-core's reset notifier at bus reset handler. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: core: enable phy suspend quirk on non-FPGAFelipe Balbi2014-11-061-2/+2
| | | | | | | | | | | | | | | | | | as it turns out, at least AM437x silicon (non-FPGA) needs to enable PHY suspend quirk. So let's allow for PHY suspend quirk to be used with non-FPGA builds too. Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: ep0: remove unnecessary break after returnJingoo Han2014-11-051-2/+0
| | | | | | | | | | | | | | | | | | Fix the following checkpatch warning. WARNING: break is not useful after a goto or return Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: exynos: remove non-DT support for Exynos Specific Glue layerJingoo Han2014-11-052-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DWC3 Exynos Specific Glue layer can be used only for Exynos SoCs. In addition, non-DT for EXYNOS SoCs is not supported from v3.11; thus, there is no need to support non-DT for DWC3 Exynos Specific Glue layer. The 'linux/platform_data/dwc3-exynos.h' file has been used for non-DT support. Thus, the 'dwc3-exynos.h' file is removed, because it is not used anymore. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: make HIRD threshold configurableHuang Rui2014-11-034-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HIRD threshold should be configurable by different platforms. From DesignWare databook: When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1. When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add support for AMD Nolan platformHuang Rui2014-11-031-0/+26
| | | | | | | | | | | | | | | | This patch adds support for AMD Nolan (NL) FPGA and SoC platform. Cc: Jason Chang <jason.chang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add disable usb2 suspend phy quirkHuang Rui2014-11-033-0/+9
| | | | | | | | | | | | | | | | This patch adds disable usb2 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add disable usb3 suspend phy quirkHuang Rui2014-11-033-0/+9
| | | | | | | | | | | | | | | | This patch adds disable usb3 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add Tx de-emphasis quirkHuang Rui2014-11-033-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is configurable according to PIPE3 specification. Value Description 0 -6dB de-emphasis 1 -3.5dB de-emphasis 2 No de-emphasis 3 Reserved It can be configured on DT or platform data. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: set SUSPHY bit for all coresHuang Rui2014-11-031-0/+24
| | | | | | | | | | | | | | | | It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core initialization is completed above the dwc3 revision 1.94a. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add rx_detect to polling lfps quirkHuang Rui2014-11-033-0/+10
| | | | | | | | | | | | | | | | | | | | This patch adds RX_DETECT to Polling.LFPS control quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add lfps filter quirkHuang Rui2014-11-033-0/+10
| | | | | | | | | | | | | | | | | | | | This patch adds LFPS filter quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add delay phy power change quirkHuang Rui2014-11-033-0/+10
| | | | | | | | | | | | | | | | | | | | | | This patch adds delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add delay p1p2p3 quirkHuang Rui2014-11-033-0/+12
| | | | | | | | | | | | | | | | | | | | This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add request p1p2p3 quirkHuang Rui2014-11-033-0/+10
| | | | | | | | | | | | | | | | | | | | This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add P3 in U2 SS inactive quirkHuang Rui2014-11-033-0/+27
| | | | | | | | | | | | | | | | | | | | This patch adds P3 in U2 SS inactive quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: add u2exit lfps quirkHuang Rui2014-11-033-0/+10
| | | | | | | | | | | | | | | | | | | | This patch adds u2exit lfps quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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