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* spmi: pm: drop bus-level PM suspend/resume routinesJosh Cartwright2014-03-081-35/+0
| | | | | | | | | | | | SPMI defines the behavior of a device in the "SLEEP" state as being "user-defined or specified by the device manufacturer". Without clearly-defined bus-level semantics for low-power states, push the responsibility of transitioning a device into/out of "SLEEP" into SPMI device drivers. Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spmi: pmic_arb: make selectable on ARCH_QCOMJosh Cartwright2014-03-081-2/+2
| | | | | | | | | | With the split of Qualcomm MSM support into legacy and multiplatform, the SPMI PMIC arb driver is only relevant on the multiplatform supported SoCs. Switch the Kconfig depends to ARCH_QCOM. Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spmi: pmic_arb: add support for interrupt handlingJosh Cartwright2014-02-152-2/+376
| | | | | | | | | | | | | | The Qualcomm PMIC Arbiter, in addition to being a basic SPMI controller, also implements interrupt handling for slave devices. Note, this is outside the scope of SPMI, as SPMI leaves interrupt handling completely unspecified. Extend the driver to provide a irq_chip implementation and chained irq handling which allows for these interrupts to be used. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spmi: Add MSM PMIC Arbiter SPMI controllerKenneth Heitke2014-02-153-0/+424
| | | | | | | | | | | | | | | | | | | Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and is used to communication with one or more PMIC (slave) devices on the SPMI bus. The PMIC Arbiter is actually a hardware wrapper around the SPMI controller that provides concurrent and autonomous PMIC access to various entities that need to communicate with the PMIC. The SPMI controller hardware handles all of the SPMI bus activity (bus arbitration, sequence start condition, transmission of frames, etc). This software driver uses the PMIC Arbiter register interface to initiate command sequences on the SPMI bus. The status register is read to determine when the command sequence has completed and whether or not it completed successfully. Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spmi: Linux driver framework for SPMIKenneth Heitke2014-02-153-0/+622
System Power Management Interface (SPMI) is a specification developed by the MIPI (Mobile Industry Process Interface) Alliance optimized for the real time control of Power Management ICs (PMIC). SPMI is a two-wire serial interface that supports up to 4 master devices and up to 16 logical slaves. The framework supports message APIs, multiple busses (1 controller per bus) and multiple clients/slave devices per controller. Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org> Signed-off-by: Michael Bohan <mbohan@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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