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| | * | spi: stm32: explicitly request exclusive reset controlPhilipp Zabel2017-07-191-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Mark Brown <broonie@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-spi@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: sh-msiof: Limit minimum divider on R-Car Gen3Geert Uytterhoeven2017-07-171-9/+23
| |/ | | | | | | | | | | | | | | | | | | On R-Car Gen3 SoCs (excluding R-Car H3 ES1.x, which cannot be used for SPI due to a hardware erratum), BRPS x BRDV = 1/1 is an invalid divider setting. Implement this limitation using an SoC/family-specific minimum divider. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'spi/topic/pxa', 'spi/topic/pxa2xx', ↵Mark Brown2017-09-046-226/+443
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/qup', 'spi/topic/rockchip' and 'spi/topic/sh' into spi-next
| | | | | * | spi: spi-sh: fix error return code in spi_sh_probe()Gustavo A. R. Silva2017-08-091-2/+2
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_get_irq() returns an error code, but the spi-sh driver ignores it and always returns -ENODEV. This is not correct and, prevents -EPROBE_DEFER from being propagated properly. Print and propagate the return value of platform_get_irq on failure. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: rockchip: configure CTRLR1 according to size and data frameHuibin Hong2017-08-161-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CTRLR1 is number of data frames, when rx only. When data frame is 8 bit, CTRLR1 is len-1. When data frame is 16 bit, CTRLR1 is (len/2)-1. Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: rockchip: add compatible string for rv1108 spiAndy Yan2017-08-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi on rv1108 is the same as other rockchip based socs, add compatible string for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: rockchip: Fix clock handling in suspend/resumeJeffy Chen2017-08-071-15/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The runtime suspend callback might be called by pm domain framework at suspend_noirq stage. It would try to disable the clocks which already been disabled by rockchip_spi_suspend. Call pm_runtime_force_suspend/pm_runtime_force_resume when suspend/resume to avoid that. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: rockchip: Fix clock handling in removeJeffy Chen2017-08-071-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are assuming clocks enabled when calling rockchip_spi_remove, which is not always true. Those clocks might already been disabled by the runtime PM at that time. Call pm_runtime_get_sync before trying to disable clocks to avoid that. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: rockchip: Slightly rework return value handlingJeffy Chen2017-08-071-12/+12
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Slightly rework return value handling, no functional changes. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: fix 64-bit build warningArnd Bergmann2017-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 64-bit systems, pointers are wider than 'int' variables, so we get a warning about a cast between them: drivers/spi/spi-qup.c:1060:23: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] This changes the code to use the correct uintptr_t cast. Fixes: 4d023737b2ef ("spi: qup: Fix QUP version identify method") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: hide warning for uninitialized variableArnd Bergmann2017-08-101-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The added conditionals in this function apparently confused gcc to the point that it no longer sees the code is safe and instead shows a false-positive warning: drivers/spi/spi-qup.c: In function 'spi_qup_transfer_one': drivers/spi/spi-qup.c:507:28: error: 'tx_nents' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/spi/spi-qup.c:464:17: note: 'tx_nents' was declared here drivers/spi/spi-qup.c:505:28: error: 'rx_nents' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/spi/spi-qup.c:464:7: note: 'rx_nents' was declared here This moves the initialization to a place that makes it obvious to the compiler. Fixes: 5884e17ef3cb ("spi: qup: allow multiple DMA transactions per spi xfer") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Fix QUP version identify methodVaradarajan Narayanan2017-08-081-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of_device_get_match_data to identify QUP version instead of of_device_is_compatible. Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Ensure done detectionVaradarajan Narayanan2017-08-081-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an issue where a SPI transaction has completed, but the done condition is missed. This occurs because at the time of interrupt the MAX_INPUT_DONE_FLAG is not asserted. However, in the process of reading blocks of data from the FIFO, the last portion of data comes in. The opflags read at the beginning of the irq handler no longer matches the current opflag state. To get around this condition, the block read function should update the opflags so that done detection is correct after the return. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: allow multiple DMA transactions per spi xferVaradarajan Narayanan2017-08-081-26/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Much like the block mode changes, we are breaking up DMA transactions into 64K chunks so we can reset the QUP engine. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: refactor spi_qup_prep_sgVaradarajan Narayanan2017-08-081-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Take specific sgl and nent to be prepared. This is in preparation for splitting DMA into multiple transacations, this contains no code changes just refactoring. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: allow block mode to generate multiple transactionsVaradarajan Narayanan2017-08-081-48/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This let's you write more to the SPI bus than 64K-1 which is important if the block size of a SPI device is >= 64K or some other device wants to do something larger. This has the benefit of completely removing spi_message from the spi-qup transactions Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: call io_config in mode specific functionVaradarajan Narayanan2017-08-081-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMA transactions should only only need to call io_config only once, but block mode might call it several times to setup several transactions so it can handle reads/writes larger than the max size per transaction, so we move the call to the do_ functions. This is just refactoring, there should be no functional change Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: refactor spi_qup_io_config into two functionsVaradarajan Narayanan2017-08-081-29/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for handling transactions larger than 64K-1 bytes in block mode, which is currently unsupported and quietly fails. We need to break these into two functions 1) prep is called once per spi_message and 2) io_config is called once per spi-qup bus transaction This is just refactoring, there should be no functional change Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Do block sized read/write in block modeVaradarajan Narayanan2017-08-081-32/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the behavior of the BLOCK transactions. During block transactions, the controller must be read/written to in block size transactions. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Fix transaction done signalingVaradarajan Narayanan2017-08-081-22/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wait to signal done until we get all of the interrupts we are expecting to get for a transaction. If we don't wait for the input done flag, we can be in between transactions when the done flag comes in and this can mess up the next transaction. While here cleaning up the code which sets controller->xfer = NULL and restores it in the ISR. This looks to be some debug code which is not required. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Fix error handling in spi_qup_prep_sgVaradarajan Narayanan2017-08-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Place the QUP in run mode before DMAVaradarajan Narayanan2017-08-081-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Add completion timeoutVaradarajan Narayanan2017-08-081-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i/o completion timeout for DMA and PIO modes. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Setup DMA mode correctlyVaradarajan Narayanan2017-08-081-63/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To operate in DMA mode, the buffer should be aligned and the size of the transfer should be a multiple of block size (for v1). And the no. of words being transferred should be programmed in the count registers appropriately. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: qup: Enable chip select supportVaradarajan Narayanan2017-08-081-0/+21
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable chip select support for QUP versions later than v1. The chip select support was broken in QUP version 1. Hence the chip select support was removed earlier in an earlier commit (4a8573abe "spi: qup: Remove chip select function"). Since the chip select support is functional in recent versions of QUP, re-enabling it for QUP versions later than v1. Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: pxa2xx: Convert to GPIO descriptor API where possibleJan Kiszka2017-08-042-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We still need to request/free GPIOs passed via the legacy path of pxa2xx_spi_chip::gpio_cs, but we can use the gpiod API otherwise. Consistently use the descriptor API instead of the legacy one. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: pxa2xx: Don't touch CS pin until we have a transfer pendingAndy Shevchenko2017-07-281-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO descriptors, when being requested, may configure pin at the same time. In case of SPI chip select we shouldn't do any assumptions of the state of pin since we don't know yet what chip is connected there and if it uses high or low active state. So, leave the state of pin as is until transfer will start. Fixes: 99f499cd6504 ("spi: pxa2xx: Add support for GPIO descriptor chip selects") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westeberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: pxa2xx: Revert "Only claim CS GPIOs when the slave device is created"Andy Shevchenko2017-07-271-21/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a valid case to call setup() following by setup_cs() several times for the same chip. With the commit 676a4e3bab44 ("spi: pxa2xx: Only claim CS GPIOs when the slave device is created") it is not possible anymore due to GPIO line being requested already during the first call to setup_cs(). For now, revert the commit to make things work again. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: pxa2xx: Only claim CS GPIOs when the slave device is createdJan Kiszka2017-07-171-38/+21
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid hogging chip select GPIOs just because they are listed for the master. They might be mulitplexed and, if no slave device is attached, used for different purposes. Moreover, this strategy avoids having to allocate a cs_gpiods structure. Tested on the IOT2000 where the second SPI bus is connected to an Arduino-compatible connector and multiplexed between SPI, GPIO and PWM usage. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: fix building SPI_PXA on MMPArnd Bergmann2017-08-071-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the audio driver selects CONFIG_PXA_SSP on ARCH_MMP as a loadable module, and the PXA SPI driver is built-in, we get a link error in the SPI driver: drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_remove': spi-pxa2xx.c:(.text+0x5f0): undefined reference to `pxa_ssp_free' drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_probe': spi-pxa2xx.c:(.text+0xeac): undefined reference to `pxa_ssp_request' spi-pxa2xx.c:(.text+0x1468): undefined reference to `pxa_ssp_free' spi-pxa2xx.c:(.text+0x15bc): undefined reference to `pxa_ssp_free' The problem is that the PXA SPI driver only uses 'select SSP' specifically when building it for PXA, but we can also build it for PCI, which is meant for Intel x86 SoCs that use the same SPI block. When the sound driver forces the SSP to be a loadable module, the IS_ENABLED() check in include/linux/pxa2xx_ssp.h triggers but the spi driver can't reference the exported symbols. I had a different approach before, making the PCI case depend on X86, which fixed the problem by avoiding the MMP case. This goes a different route, making the driver select PXA_SSP also on MMP, which has an SSP that none of the boards in mainline Linux use for SPI. There is no harm in always enabling the build on MMP (PCI or not PCI), so I do that too, to document that this hardware is actually available on MMP. Link: https://patchwork.kernel.org/patch/8879921/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'spi/topic/imx', 'spi/topic/loopback', ↵Mark Brown2017-09-045-35/+227
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/omap', 'spi/topic/pic32' and 'spi/topic/pl022' into spi-next
| | | | | * | spi: pl022: constify amba_idArvind Yadav2017-08-231-1/+1
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: pic32: fix spelling mistakes on macro namesColin Ian King2017-07-261-2/+2
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial fix to spelling mistakes macros; fix EMPTY spellings: RX_FIFO_EMTPY -> RX_FIFO_EMPTY TX_FIFO_EMTPY -> TX_FIFO_EMPTY Note that there are no other occurrances of these macros in the source. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: omap: Allocate bus number from spi frameworkSuniel Mahesh2017-08-181-4/+0
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi framework should allocate bus number dynamically either via Linux IDR or spi alias for master drivers. This patch deletes code pertaining to manual allocation of spi bus number in spi omap2 master driver. Signed-off-by: Suniel Mahesh <sunil.m@techveda.org> Signed-off-by: Karthik Tummala <karthik@techveda.org> Tested-by: Karthik Tummala <karthik@techveda.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: loopback-test: implement testing with no CSOleksij Rempel2017-07-261-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To run spi-loopback-tests on HW without modifications, we need to disable Chip Select. This should avoid surprising side effects for SPI devices by testing patterns. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: loopback-test: make several module parameters staticColin Ian King2017-07-181-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several module parameters are local to the source, so make them static. Cleans up several sparse warnings such as: "symbol 'loop_req' was not declared. Should it be static?" Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: loopback-test: provide loop_req option.Oleksij Rempel2017-07-171-0/+16
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a module parameter to request internal loop by the SPI master controller. This should make loop testing easier without extra HW modification. For test automation a logic analyzer is recommended for host controller-independent verification. An example test rig configuration and procedure: i.MX6S RIoRBoard Logic Analyzer ----------------------------------------- (J13 4) GND ------------- GND (J13 6) CSPI3-CLK ------> PIN 3 (J13 8) CSPI3-MOSI <----- PIN 2 ^ - internal loop configured by SPI_LOOP | or can be user external jamper. (J13 10) CSPI3-MISO -----> PIN 1 grab some data and decode it: sigrok-cli -d fx2lafw --time 160000 --config samplerate=10m \ --channels 0-2 -o dump.sr sigrok-cli -i dump.sr -P spi:mosi=1:clk=2 > result_for_regression_tests Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: fix use of native chip-selects with devicetreeGreg Ungerer2017-08-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commonly used mechanism of specifying the hardware or native chip-select on an SPI device in devicetree (that is "cs-gpios = <0>") does not result in the native chip-select being configured for use. So external SPI devices that require use of the native chip-select will not work. You can successfully specify native chip-selects if using a platform setup by specifying the cs-gpio as negative offset by 32. And that works correctly. You cannot use the same method in devicetree. The logic in the spi-imx.c driver during probe uses core spi function of_spi_register_master() in spi.c to parse the "cs-gpios" devicetree tag. For valid GPIO values that will be recorded for use, all other entries in the cs_gpios list will be set to -ENOENT. So entries like "<0>" will be set to -ENOENT in the cs_gpios list. When the SPI device registers are setup the code will use the GPIO listed in the cs_gpios list for the desired chip-select. If the cs_gpio is less then 0 then it is intended to be for a native chip-select, and its cs_gpio value is added to 32 to get the chipselect number to use. Problem is that with devicetree this can only ever be -ENOENT (which is -2), and that alone results in an invalid chip-select number. But also doesn't allow selection of the native chip-select at all. To fix, if the cs_gpio specified for this spi device is not a valid GPIO then use the "chip_select" (that is the native chip-select number) for hardware setup. Signed-off-by: Greg Ungerer <gerg@linux-m68k.org> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: fix little-endian buildArnd Bergmann2017-08-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly added dynamic burst code produces a harmless warning on big-endian configurations: drivers/spi/spi-imx.c: In function 'spi_imx_buf_rx_swap_u32': drivers/spi/spi-imx.c:284:15: error: unused variable 'bytes_per_word' [-Werror=unused-variable] unsigned int bytes_per_word; ^~~~~~~~~~~~~~ drivers/spi/spi-imx.c: In function 'spi_imx_buf_tx_swap_u32': drivers/spi/spi-imx.c:319:15: error: unused variable 'bytes_per_word' [-Werror=unused-variable] unsigned int bytes_per_word; This adds another #ifdef around the variable declaration matching the one on the use. Fixes: 1673c81d9435 ("spi: imx: dynamic burst length adjust for PIO mode") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: dynamic burst length adjust for PIO modejiada wang2017-08-171-9/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | previously burst length (BURST_LENGTH) is always set to equal to bits_per_word, causes a 10us gap between each word in transfer, which significantly affects performance. This patch uses 32 bits transfer to simulate lower bits transfer, and adjusts burst length runtimely to use biggeest burst length as possible to reduce the gaps in transfer for PIO mode. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: add SPI_NO_CS supportOleksij Rempel2017-07-261-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | To run spi-loopback-tests on HW without modifications, we need to disable Chip Select. This should avoid surprising side effects for SPI devices by testing patterns. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: add selection for iMX53 and iMX6 controllerjiada wang2017-07-171-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ECSPI contorller for iMX53 and iMX6 has few hardware issues comparing to iMX51. The change add possibility to detect which controller is used to apply possible workaround and limitations. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: imx: introduce fifo_size and has_dmamode in spi_imx_devtype_datajiada wang2017-07-171-9/+18
| |/ | | | | | | | | | | | | | | | | | | | | Different ECSPI controller has different fifosize and DMA capability, instead of calling functions to identify these information by check devtype. add fifo_size and has_dmamode to spi_imx_devtype_data. so that these information can be directly accessed. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-----. \ Merge remote-tracking branches 'spi/topic/cadence', 'spi/topic/dt', ↵Mark Brown2017-09-045-348/+193
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | 'spi/topic/ep93xx' and 'spi/topic/falcon' into spi-next
| | | | * | spi: spi-falcon: drop check of boot selectHauke Mehrtens2017-09-011-5/+0
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not check which flash type the SoC was booted from before using this driver. Assume that the device tree is correct and use this driver when it was added to device tree. This also removes a build dependency to the SoC code. All device trees I am aware of only have one correct flash device entry in it. The device tree is anyway bundled with the kernel in all systems using device tree I know of. The boot mode can be specified with some pin straps and will select the flash type the rom code will boot from. One SPI, NOR or NAND flash chip can be connect to the EBU and used to load the first stage boot loader from. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-ep93xx: use the default master transfer queueing mechanismH Hartley Sweeten2017-08-091-214/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to the default implementation of transfer_one_message(). Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-ep93xx: remove private data 'current_msg'H Hartley Sweeten2017-08-091-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The currently in-flight message can be found from the spi master. Use that instead and remove the private data pointer. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-ep93xx: pass the spi_master pointer aroundH Hartley Sweeten2017-08-091-41/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the parameters for some of the functions so that the spi_master pointer is passed around instead of the private data ep93xx_spi pointer. This allows removing the 'pdev' member of the private data and will help with some later cleanup. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-ep93xx: absorb the interrupt enable/disable helpersH Hartley Sweeten2017-08-091-20/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are each only called once. Just absorb them into the callers. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> [chris: use u32 instead of unsigned int] Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: spi-ep93xx: add spi master prepare_transfer_hardware()H Hartley Sweeten2017-08-091-39/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver currently enables the hardware at the start of every message and disabled it when the message is complete. Make it a bit smarter by adding the prepare_transfer_hardware() and unprepare_transfer_hardware() callbacks so that the core can enable/disable the hardware based on spi message queue. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> [chris: use u32 instead of unsigned int] Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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