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path: root/drivers/spi/spi-rockchip.c
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* spi/rockchip: Avoid accidentally turning off the clockDoug Anderson2014-08-291-1/+1
| | | | | | | | | | | | | | | | If our client is requesting a clock that is above the maximum clock then the following division will result in 0: rs->max_freq / rs->speed We'll then program 0 into the SPI_BAUDR register. The Rockchip TRM says: "If the value is 0, the serial output clock (sclk_out) is disabled." It's much better to end up with the fastest possible clock rather than a clock that is off, so enforce a minimum value. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi/rockchip: fixup incorrect dma direction settingAddy Ke2014-08-201-1/+1
| | | | | Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: fix error return code in rockchip_spi_probe()Wei Yongjun2014-07-251-0/+1
| | | | | | | | Fix to return -EINVAL from the error handling case instead of 0 when failed to get fifo length. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: remove redundant dev_err call in rockchip_spi_probe()Wei Yongjun2014-07-251-1/+0
| | | | | | | | | There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: remove duplicated include from spi-rockchip.cWei Yongjun2014-07-251-1/+0
| | | | | | | Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: add compatible strings for RK3188 and RK3288Addy Ke2014-07-111-0/+2
| | | | | | Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Addy Ke <addy.ke@rockchip.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: master->mode_bits: remove SPI_CS_HIGH bitAddy Ke2014-07-111-6/+1
| | | | | | Suggested-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Addy Ke <addy.ke@rockchip.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: call wait_for_idle() for the transfer to completeAddy Ke2014-07-111-5/+19
| | | | | | Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Addy Ke <addy.ke@rockchip.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: cleanup some coding issues and uncessary outputAddy Ke2014-07-111-18/+23
| | | | | | Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Addy Ke <addy.ke@rockchip.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* spi/rockchip: add driver for Rockchip RK3xxx SoCs integrated SPIaddy ke2014-07-041-0/+822
In order to facilitate understanding, rockchip SPI controller IP design looks similar in its registers to designware. But IC implementation is different from designware, So we need a dedicated driver for Rockchip RK3XXX SoCs integrated SPI. The main differences: - dma request line: rockchip SPI controller have two DMA request line for tx and rx. - Register offset: RK3288 dw SPI_CTRLR0 0x0000 0x0000 SPI_CTRLR1 0x0004 0x0004 SPI_SSIENR 0x0008 0x0008 SPI_MWCR NONE 0x000c SPI_SER 0x000c 0x0010 SPI_BAUDR 0x0010 0x0014 SPI_TXFTLR 0x0014 0x0018 SPI_RXFTLR 0x0018 0x001c SPI_TXFLR 0x001c 0x0020 SPI_RXFLR 0x0020 0x0024 SPI_SR 0x0024 0x0028 SPI_IPR 0x0028 NONE SPI_IMR 0x002c 0x002c SPI_ISR 0x0030 0x0030 SPI_RISR 0x0034 0x0034 SPI_TXOICR NONE 0x0038 SPI_RXOICR NONE 0x003c SPI_RXUICR NONE 0x0040 SPI_MSTICR NONE 0x0044 SPI_ICR 0x0038 0x0048 SPI_DMACR 0x003c 0x004c SPI_DMATDLR 0x0040 0x0050 SPI_DMARDLR 0x0044 0x0054 SPI_TXDR 0x0400 NONE SPI_RXDR 0x0800 NONE SPI_IDR NONE 0x0058 SPI_VERSION NONE 0x005c SPI_DR NONE 0x0060 - register configuration: such as SPI_CTRLRO in rockchip SPI controller: cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) | (CR0_SSD_ONE << CR0_SSD_OFFSET); cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); cr0 |= (rs->tmode << CR0_XFM_OFFSET); cr0 |= (rs->type << CR0_FRF_OFFSET); For more information, see RK3288 chip manual. - Wait for idle: Must ensure that the FIFO data has been sent out before the next transfer. Signed-off-by: addy ke <addy.ke@rock-chips.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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