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path: root/drivers/spi/Makefile
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* spi/bfin5xx: rename config macro name for bfin5xx spi controller driverScott Jiang2012-04-271-1/+1
| | | | | | | This controller is only for blackfin 5xx soc, so rename it to BFIN5XX Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: add Broadcom BCM63xx SPI controller driverFlorian Fainelli2012-03-091-0/+1
| | | | | | | | | This patch adds support for the SPI controller found on the Broadcom BCM63xx SoCs. Signed-off-by: Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* SPI: add CSR SiRFprimaII SPI controller driverZhiwu Song2012-03-091-0/+1
| | | | | | | | | | | | | | | | CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features: * Master and slave modes * 8-/12-/16-/32-bit data unit * 256 bytes receive data FIFO and 256 bytes transmit data FIFO * Multi-unit frame * Configurable SPI_EN (chip select pin) active state * Configurable SPI_CLK polarity * Configurable SPI_CLK phase * Configurable MSB/LSB first Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: Add SuperH HSPI prototype driverKuninori Morimoto2012-03-091-0/+1
| | | | | | | | This patch adds SuperH HSPI driver. It is still prototype driver, but has enough function at this point. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: add support for Renesas RSPIShimoda, Yoshihiro2012-03-071-0/+1
| | | | | | | The SH7757 has RSPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: remove obsolete spi-s3c24xx-gpio driverPeter Korsgaard2011-07-041-1/+0
| | | | | | | | | It was equivalent to spi-gpio, and there's no longer any in-tree users of it, so get rid of it. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: reorganize driversGrant Likely2011-06-061-62/+50
| | | | | | | | | | | | | | | | Sort the SPI makefile and enforce the naming convention spi_*.c for spi drivers. This change also rolls the contents of atmel_spi.h into the .c file since there is only one user of that particular include file. v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be be the predominant pattern for subsystem prefixes. - Clean up filenames in Kconfig and header comment blocks Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* spi/spi_bfin_sport: new driver for a SPI bus via the Blackfin SPORT peripheralCliff Cai2011-05-271-0/+1
| | | | | | | | | | | | | | | | The Blackfin SPORT peripheral is a pretty flexible device. With enough coaching, we can make it generate SPI compatible waveforms. This is desirable as the SPORT can run at much higher clock frequencies than the dedicated on-chip SPI peripheral, and it can do full duplex DMA. It also opens up the possibility of multiple SPI buses in case someone wants to dedicate a whole bus to a specific part that does not play well with others. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'spi/next' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-03-181-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits) spi/dw_spi: move dw_spi.h into drivers/spi spi/dw_spi: Fix missing header gpio/langwell: Clear edge bit before handling gpio/langwell: Simplify demux loop gpio/langwell: Convert irq name space gpio/langwell: Fix broken irq_eoi change. gpio; Make Intel chipset gpio drivers depend on x86 gpio/cs5535-gpio: Fix section mismatch spi/rtc-{ds1390,ds3234,m41t94}: Use spi_get_drvdata() for SPI devices spi/davinci: Support DMA transfers larger than 65535 words spi/davinci: Use correct length parameter to dma_map_single calls gpio: Use __devexit at necessary places gpio: add MODULE_DEVICE_TABLE to pch_gpio and ml_ioh_gpio gpio/mcp23s08: support mcp23s17 variant of_mmc_spi: add card detect irq support spi/omap_mcspi: catch xfers of non-multiple SPI word size spi/omap_mcspi: Off-by-one error in finding the right divisor gpio/pca953x: Fix wrong pointer type spi/pl022: rid dangling labels spi: add support for SuperH SPI ...
| * spi: add support for SuperH SPIYoshihiro Shimoda2011-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | The SH7757 has SPI0 module. This patch supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [grant.likely@secretlab.ca: fixed Makefile ordering, added __dev{init,exit} annotations, removed DRIVER_VERSION (this is mainline, the version == the kernel version) and tidied some indentation & style stuff] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * spi: New driver for Altera SPIThomas Chou2011-02-221-0/+1
| | | | | | | | | | | | | | | | This patch adds a new SPI driver to support the Altera SOPC Builder SPI component. It uses the bitbanging library. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * spi: add OpenCores tiny SPI driverThomas Chou2011-02-221-0/+1
| | | | | | | | | | | | | | | | | | This patch adds support of OpenCores tiny SPI driver. http://opencores.org/project,tiny_spi Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi: add ti-ssp spi master driverCyril Chemparathy2011-03-151-0/+1
|/ | | | | | | | | | This patch adds an SPI master implementation that operates on top of an underlying TI-SSP port. Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCsGabor Juhos2011-01-181-0/+1
| | | | | | | | | | | | | | | | | The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This patch implements a driver for that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: spi-devel-general@lists.sourceforge.net Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mips@linux-mips.org Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1960/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/nextGrant Likely2010-12-291-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next spi/pxa2xx: register driver properly spi/pxa2xx: add support for shared IRQ handler spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers arm/pxa2xx: reorgazine SSP and SPI header files spi/pxa2xx: Add CE4100 support spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: pass of_node to spi device and set a parent device
| * spi/pxa2xx: Add CE4100 supportSebastian Andrzej Siewior2010-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Sodaville's SPI controller is very much the same as in PXA25x. The difference: - The RX/TX FIFO is only 4 words deep instead of 16 - No DMA support - The SPI controller offers a CS functionality Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
* | spi/dw_spi: add DMA supportFeng Tang2010-12-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_spi driver in upstream only supports PIO mode, and this patch will support it to cowork with the Designware dma controller used on Intel Moorestown platform, at the same time it provides a general framework to support dw_spi core to cowork with dma controllers on other platforms It has been tested with a Option GTM501L 3G modem and Infenion 60x60 modem. To use DMA mode, DMA controller 2 of Moorestown has to be enabled Also change the dma interface suggested by Linus Walleij. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Feng Tang <feng.tang@intel.com> [Typo fix and renames to match intel_mid_dma renaming] Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/xilinx: merge OF support code into main driverGrant Likely2010-11-091-1/+0
| | | | | | | | | | | | | | | | | | Now that the of_platform_bus_type has been merged with the platform bus type, a single platform driver can handle both OF and non-OF use cases. This patch merges the OF support into the platform driver. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Michal Simek <monstr@monstr.eu>
* | spi/xilinx: fold platform_driver support into main bodyGrant Likely2010-11-091-1/+0
|/ | | | | | | | | This patch merges the platform driver support into the main body of xilinx_spi.c in preparation for merging the OF and non-OF support code. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Michal Simek <monstr@monstr.eu>
* spi: add spi_tegra driverErik Gilling2010-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2 changes: from Thierry Reding: * add "select TEGRA_SYSTEM_DMA" to Kconfig from Grant Likely: * add oneline description to header * inline references to DRIVER_NAME * inline references to BUSY_TIMEOUT * open coded bytes_per_word() * spi_readl/writel -> spi_tegra_readl/writel * move transfer validation to spi_tegra_transfer * don't request_mem_region iomem as platform bus does that for us * __exit -> __devexit v3 changes: from Russell King: * put request_mem_region back int from Grant Likely: * remove #undef DEBUG * add SLINK_ to register bit defines * remove unused bytes_per_word * make spi_tegra_readl/writel static linine * various refactoring for clarity * mark err if BSY bit is not cleared after 1000 retries * move spinlock to protect setting of RDY bit * subsys_initcall -> module_init v3 changes: from Grant Likely: * update spi_tegra to use PTR_ERRless dma API v4 changes: from Grant Likely: * remove empty spi_tegra_cleanup fucntion * allow device ids of -1 Signed-off-by: Erik Gilling <konkers@android.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Russell King <linux@arm.linux.org.uk> spi: tegra: cleanups from upstream review Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25 Signed-off-by: Erik Gilling <konkers@android.com>
* spi/fsl_spi: add eSPI controller supportMingkai Hu2010-10-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add eSPI controller support based on the library code spi_fsl_lib.c. The eSPI controller is newer controller 85xx/Pxxx devices supported. There're some differences comparing to the SPI controller: 1. Has different register map and different bit definition So leave the code operated the register to the driver code, not the common code. 2. Support 4 dedicated chip selects The software can't controll the chip selects directly, The SPCOM[CS] field is used to select which chip selects is used, and the SPCOM[TRANLEN] field is set to tell the controller how long the CS signal need to be asserted. So the driver doesn't need the chipselect related function when transfering data, just set corresponding register fields to controll the chipseclect. 3. Different Transmit/Receive FIFO access register behavior For SPI controller, the Tx/Rx FIFO access register can hold only one character regardless of the character length, but for eSPI controller, the register can hold 4 or 2 characters according to the character lengths. Access the Tx/Rx FIFO access register of the eSPI controller will shift out/in 4/2 characters one time. For SPI subsystem, the command and data are put into different transfers, so we need to combine all the transfers to one transfer in order to pass the transfer to eSPI controller. 4. The max transaction length limitation The max transaction length one time is limitted by the SPCOM[TRANSLEN] field which is 0xFFFF. When used mkfs.ext2 command to create ext2 filesystem on the flash, the read length will exceed the max value of the SPCOM[TRANSLEN] field. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc8xxx: refactor the common code for SPI/eSPI controllerMingkai Hu2010-10-121-0/+1
| | | | | | | | | | | | | Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI controller code in the SPI controller driver spi_fsl_spi.c. Because the register map of the SPI controller and eSPI controller is so different, also leave the code operated the register to the driver code, not the common code. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc8xxx: rename spi_mpc8xxx.c to spi_fsl_spi.cMingkai Hu2010-10-121-1/+1
| | | | | | | | | This will pave the way to refactor out the common code which can be used by the eSPI controller driver, and rename the SPI controller dirver to the file spi_fsl_spi.c. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: change to new flag variablematt mooney2010-10-121-3/+1
| | | | | | | Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/topcliff: Add topcliff platform controller hub (PCH) spi bus driverMasayuki Ohtake2010-10-081-0/+1
| | | | | | | | | | Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platform. All IO peripherals in Topcliff PCH are actually devices sitting on AMBA bus. This patch adds a driver for the SPI bus integrated into the Topcliff device. Signed-off-by: Masayuki Ohtake <masa-korg@dsn.okisemi.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/mpc5121: Add SPI master driver for MPC5121 PSCAnatolij Gustschin2010-05-251-0/+1
| | | | | | Signed-off-by: John Rigby <jcrigby@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi/ep93xx: implemented driver for Cirrus EP93xx SPI controllerMika Westerberg2010-05-251-0/+1
| | | | | | | | | | This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found in EP93xx chips. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Memory-mapped dw_spi driverJean-Hugues Deschenes2010-01-211-0/+1
| | | | | | | Adds a memory-mapped I/O dw_spi platform device. Signed-off-by: Jean-Hugues Deschenes <jean-hugues.deschenes@octasic.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: Add Freescale/Motorola Coldfire QSPI driverSteven King2010-01-201-0/+1
| | | | | | | | | | | | | | | | | | Add support for the QSPI controller found some on Freescale/Motorola Coldfire MCUs. Full duplex, active high cs, spi modes 0-3 and word sizes 8-16 bits are supported. The hardware drives the MISO, MOSI and SCLK lines, but the chip selects are managed via GPIO and must be configured by the board code. The QSPI controller has an 80 byte buffer which allows us to transfer up to 16 words at a time. For transfers longer than 16 words, we split the buffer in half so we can update in one half while the controller is operating on the other half. Interrupt latencies then ultimately limits our sustained thru-put to something less than half the maximum speed supported by the part. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: Add SPI master driver for DaVinci/DA8xxSandeep Paulraj2010-01-201-0/+1
| | | | | | | | | | | | This patch adds support for a SPI master driver for the DaVinci series of SOCs Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Philby John <pjohn@in.mvista.com> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: Add s3c64xx SPI Controller driverJassi Brar2009-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | Each SPI controller has exactly one CS line and as such doesn't provide for multi-cs. We implement a workaround to support multi-cs by _not_ configuring the mux'ed CS pin for each SPI controller. The CS mechanism is assumed to be fully machine specific - the driver doesn't even assume some GPIO pin is used to control the CS. The driver selects between DMA and POLLING mode depending upon the xfer size - DMA mode for xfers bigger than FIFO size, POLLING mode otherwise. The driver has been designed to be capable of running SoCs since s3c64xx and till date, for that reason some of the register fields have been passed via, SoC specific, platform data. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi_s3c24xx: add FIQ pseudo-DMA supportBen Dooks2009-12-171-1/+6
| | | | | | | | | | | | | | | | | Add pseudo-DMA by FIQ to the S3C24XX SPI driver. This allows the driver to get DMA-like performance where there are either no free DMA channels or when doing transfers that required both TX and RX data paths. Since this patch requires the addition of an assembly file to hold the FIQ code, we rename the module (instead of adding a rename of the .c file to this patch). We expect most users are loading this via udev and thus there should be no change to the userland configuration. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Simtec Linux Team <linux@simtec.co.uk> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: controller driver for Designware SPI coreFeng Tang2009-12-171-0/+2
| | | | | | | | | | | | | | Driver for the Designware SPI core, it supports multipul interfaces like PCI/APB etc. User can use "dw_apb_ssi_db.pdf" from Synopsys as HW datasheet. [randy.dunlap@oracle.com: fix build] [akpm@linux-foundation.org: build fix] Signed-off-by: Feng Tang <feng.tang@intel.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Add OMAP spi100k driverCory Maccarrone2009-12-131-0/+1
| | | | | | | | | | | | | This change adds the OMAP SPI 100k driver created by Fabrice Crohas <fcrohas@gmail.com>. This SPI bus is found on OMAP7xx-series smartphones, and for many, the touchscreen is attached to this bus. The lion's share of the work was done by Fabrice on this driver -- I am merely porting it from the Linwizard project on his behalf. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: NUC900: Add spi driver support for nuc900Wan ZongShun2009-12-131-0/+1
| | | | | Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi: SuperH MSIOF SPI Master driver V2Magnus Damm2009-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | This patch is V2 of SPI Master support for the SuperH MSIOF. Full duplex, spi mode 0-3, active high cs, 3-wire and lsb first should all be supported, but the driver has so far only been tested with "mmc_spi". The MSIOF hardware comes with 32-bit FIFOs for receive and transmit, and this driver simply breaks the SPI messages into FIFO-sized chunks. The MSIOF hardware manages the pins for clock, receive and transmit (sck/miso/mosi), but the chip select pin is managed by software and must be configured as a regular GPIO pin by the board code. Performance wise there is still room for improvement, but on a Ecovec board with the built-in sh7724 MSIOF0 this driver gets Mini-sd read speeds of about half a megabyte per second. Future work include better clock setup and merging of 8-bit transfers into 32-bit words to reduce interrupt load and improve throughput. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: add a platform driver using the xilinx_spi common module.Richard Röjfors2009-12-081-0/+1
| | | | | | | | This patch adds in a platform device driver using the xilinx_spi common module. Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* xilinx_spi: Split into of driver and generic part.Richard Röjfors2009-12-081-0/+1
| | | | | | | | | | | This patch splits the xilinx_spi driver into a generic part and a OF driver part. The reason for this is to later add in a platform driver as well. Tested-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc/5200: Add mpc5200-spi (non-PSC) device driverGrant Likely2009-11-041-0/+1
| | | | | | | Adds support for the dedicated SPI device on the Freescale MPC5200(b) SoC. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* spi-imx: rename source file to spi_imx.cUwe Kleine-König2009-10-011-1/+1
| | | | | | | | | | | This makes the filename match the Kconfig symbol and the driver name. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi: Freescale STMP driverdmitry pervushin2009-09-231-0/+1
| | | | | | | | | | | | Add SPI driver for Freescale STMP 3xxx-based boards [dbrownell@users.sourceforge.net: cleanup sequence, spi_unregister_master] Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Timur Tabi <timur@freescale.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi: add SPI driver for most known i.MX SoCsSascha Hauer2009-09-231-0/+1
| | | | | | | | | | | | | This driver has been tested on i.MX1/i.MX27/i.MX35 with an AT25 type EEPROM and on i.MX27/i.MX31 with a Freescale MC13783 PMIC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: David Brownell <david-b@pacbell.net> Cc: Andrea Paterniani <a.paterniani@swapp-eng.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi: add spi_ppc4xx driverSteven A. Falco2009-09-231-0/+1
| | | | | | | | | | | | | This adds a SPI driver for the SPI controller found in the IBM/AMCC 4xx PowerPC's. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi: remove i.MX SPI driverSascha Hauer2009-09-231-1/+0
| | | | | | | | | | | | | This driver is in a non working state at the moment and will be replaced by a bitbang driver which can also handle the newer i.MX variants Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: David Brownell <david-b@pacbell.net> Acked-by: Andrea Paterniani <a.paterniani@swapp-eng.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi_mpc8xxx: s/83xx/8xxx/gAnton Vorontsov2009-06-191-1/+1
| | | | | | | | | | | | | | Since we renamed the file, we might want to rename the file internals too. Though we don't bother with changing platform driver name and platform module alias. The stuff is legacy and hopefully we'll remove it soon. Suggested-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi_mpc83xx: rename spi_83xx.c to spi_8xxx.cAnton Vorontsov2009-06-191-1/+1
| | | | | | | | | | | | | The driver handles MPC83xx, MPC85xx and MPC86xx SPI controllers, so rename the file for clarity. Suggested-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [ARM] 5546/1: ARM PL022 SSP/SPI driver v3Linus Walleij2009-06-101-0/+1
| | | | | | | | | | | | | | This adds a driver for the ARM PL022 PrimeCell SSP/SPI driver found in the U300 platforms as well as in some ARM reference hardware, and in a modified version on the Nomadik board. Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com> Reviewed-by: Russell King <linux@arm.linux.org.uk> Reviewed-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* spi: Move at25 (for SPI eeproms) to /drivers/misc/eepromWolfram Sang2009-01-261-1/+0
| | | | | Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Jean Delvare <khali@linux-fr.org>
* spi_gpio driverDavid Brownell2009-01-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generalize the old at91rm9200 "bootstrap" bitbanging SPI master driver as "spi_gpio", so it works with arbitrary GPIOs and can be configured through platform_data. Such SPI masters support: - any number of bus instances (bus_num is the platform_device.id) - any number of chipselects (one GPIO per spi_device) - all four SPI_MODE values, and SPI_CS_HIGH - i/o word sizes from 1 to 32 bits; - devices configured as with any other spi_master controller When configured using platform_data, this provides relatively low clock rates. On platforms that support inlined GPIO calls, significantly improved transfer speeds are also possible with a semi-custom driver. (It's still painful when accessing flash memory, but less so.) Sanity checked by using this version to replace both native controllers on a board with six different SPI slaves, relying on three different SPI_MODE_* values and both SPI_CS_HIGH settings for correct operation. [akpm@linux-foundation.org: cleanups] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Magnus Damm <damm@igel.co.jp> Tested-by: Magnus Damm <damm@igel.co.jp> Cc: Torgil Svensson <torgil.svensson@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* spi: new orion_spi driverShadi Ammouri2008-08-051-0/+1
| | | | | | | | | | | | | | This adds an SPI driver for the SPI controller found in various Marvell Orion ARM SoCs. It currently supports only one slave, which must use SPI mode 0. [dbrownell@users.sourceforge.net: cleanups, meet specs, pass "sparse"] Signed-off-by: Shadi Ammouri <shadi@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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