| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
| |
kzalloc prints its own OOM message upon failure.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
|
|
|
| |
Propagate the error value returned by the function instead.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
array elements
Open coding the counting of elements in a dt-property is abstracted by the newly
introduced of_property_count_uXX_elems functions. Additionally the raw iteration
over the states element exposes the endian conversion and dtb-format details,
which according to Mark Rutland "would be nice to limit [...] to of_ helper
functions".
Thus change ti-abb-regulator to use the helper for element counting and
of_property_read_u32_index for retrieval of individual values.
This makes it possible to remove the raw access to the property entirely.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bqreaders.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Certain platforms such as DRA7 have quirky memory maps such as:
PRM_ABBLDO_DSPEVE_CTRL 0x4ae07e20
PRM_ABBLDO_IVA_CTRL 0x4ae07e24
other-registers
PRM_ABBLDO_DSPEVE_SETUP 0x4ae07e30
PRM_ABBLDO_IVA_SETUP 0x4ae07e34
These need the address range allocation to be either not reserved OR
unique allocation per register instance or use something like syscon
based solution.
By going with unique allocation per register, we are able to now have
a single compatible driver for all instances on all platforms which
use the IP block.
So, introduce a new "ti,abb-v3" compatible to allow for definitions
where explicit register definitions are provided, while maintaining
backward compatibility of older predefined register offsets provided
by "ti-abb-v1" and "ti-abb-v2".
As part of this change, we rename a few variables to indicate the
appropriate meaning.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
On platforms like OMAP4460, LDO override is never used. Even though
efuse determines the ABB bias mode to operate at, ABB voltage is
preconfigured in internal efuse registers without the need for
LDO override for bias voltage. So skip optional parameter if
property is not present.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|\ \ |
|
| |/
| |
| |
| |
| |
| |
| | |
devm_* simplifies the code.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
commit 40b1936e (regulator: Introduce TI Adaptive Body Bias(ABB) on-chip
LDO driver) missed a pair of brackets which cause the wrong vset data to be
picked up from efuse, resulting in bad VBB voltage values.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
|
|/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
As documented in Application Note SWPA117 v2.1(NDA), LDO override has a
requirement that when switching from Bias active + override active
mode(FBB/RBB) to Bypass(nominal) mode, LDO reset must be performed
*after* LDO transitions to Bypass(nominal) mode.
The same rule in reverse applies when switching from a ABB bypass mode
to ABB enabled - LDO override *must* be performed prior to transition to
required ABB mode, if we do not do that, the same glitch takes place.
Currently while transitioning to ABB bypass, we reset the LDO overide
prior to the transition which causes a few milliseconds where ABB LDO
voltage could go all the way to 800mV(based on SoC process node),
during this period, the delta voltage between VDD rail and VBB rail
could cause the system to improperly function.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove unneeded error handling on the result of a call to
platform_get_resource_byname when the value is passed to devm_ioremap_resource.
A simplified version of the semantic patch that makes this change is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression pdev,res,e,e1;
expression ret != 0;
identifier l;
@@
res = platform_get_resource_byname(...);
- if (res == NULL) { ... \(goto l;\|return ret;\) }
e = devm_ioremap_resource(e1, res);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Commit 75096579c3ac ("lib: devres: Introduce devm_ioremap_resource()")
introduced devm_ioremap_resource() and deprecated the use of
devm_request_and_ioremap().
While at it, remove the error message as devm_ioremap_resource prints a similar
error message.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
|
|
|
|
|
| |
abb->current_info_idx is used as array subscript to access volt_table,
thus the valid value range should be 0 ... desc->n_voltages - 1.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
|
Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Texas Instruments' SmartReflex 2 technology provides support for this
power management technique with Forward Body Biasing (FBB) and Reverse
Body Biasing (RBB). These modulate the body voltage of transistor
cells or blocks dynamically to gain performance and reduce leakage.
TI's SmartReflex white paper[1] has further information for usage in
conjunction with other power management techniques.
The application of FBB/RBB technique is determined for each unique
device in some process nodes, whereas, they are mandated on other
process nodes.
In a nutshell, ABB technique is implemented on TI SoC as an on-chip
LDO which has ABB module controlling the bias voltage. However, the
voltage is unique per device. These vary per SoC family and the manner
in which these techniques are used may vary depending on the Operating
Performance Point (OPP) voltage targeted. For example:
OMAP3630/OMAP4430: certain OPPs mandate usage of FBB independent of
devices.
OMAP4460/OMAP4470: certain OPPs mandate usage of FBB, while others may
optionally use FBB or optimization with RBB.
OMAP5: ALL OPPs may optionally use ABB, and ABB biasing voltage is
influenced by vset fused in s/w and requiring s/w override of
default values.
Further, two generations of ABB module are used in various TI SoCs.
They have remained mostly register field compatible, however the
register offset had switched between versions.
We introduce ABB LDO support in the form of a regulator which is
controlled by voltages denoting the desired Operating Performance
Point which is targeted. However, since ABB transition is part of OPP
change sequence, the sequencing required to ensure sane operation
w.r.t OPP change is left to the controlling driver (example: cpufreq
SoC driver) using standard regulator operations.
The driver supports all ABB modes and ability to override ABB LDO vset
control efuse based ABB mode detection etc.
Current implementation is heavily influenced by the original patch
series [2][3] from Mike Turquette. However, the current implementation
supports only device tree based information.
[1] http://www.ti.com/pdfs/wtbu/smartreflex_whitepaper.pdf
[2] http://marc.info/?l=linux-omap&m=134931341818379&w=2
[3] http://marc.info/?l=linux-arm-kernel&m=134931402406853&w=2
[nm@ti.com: co-developer]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|