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| * pinctrl: pinctrl-single: pin names for pinctrl-single.bitsManjunathappa, Prakash2013-06-161-5/+10
| | | | | | | | | | | | | | | | | | | | | | Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-single: enhance to configure multiple pins of different modulesManjunathappa, Prakash2013-06-161-33/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb68a21d5704839a192a46ebcf387773704), Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers: pinctrl sleep and idle states in the coreLinus Walleij2013-06-161-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a device have sleep and idle states in addition to the default state, look up these in the core and stash them in the pinctrl state container. Add accessor functions for pinctrl consumers to put the pins into "default", "sleep" and "idle" states passing nothing but the struct device * affected. Solution suggested by Kevin Hilman, Mark Brown and Dmitry Torokhov in response to a patch series from Hebbar Gururaja. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: add pinconf-generic define for a pin-default pullHeiko Stübner2013-06-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There exist controllers that don't support to set the pull to up or down separately but instead automatically set the pull direction based on embedded knowledge inside the controller, for example depending on the selected mux function of the pin. Therefore this patch adds another config option to use this default pull-state for a pin where it is not possible to know or decide if the pin will be pulled up or down. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: add VF610 pinctrl driverJingchang Lu2013-06-163-0/+347
| | | | | | | | | | | | | | | | | | Adds Freescale Vybrid VF610 pin controller driver to IMX common pinctrl driver framework. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: imx: add VF610 support to imx pinctrl frameworkJingchang Lu2013-06-162-11/+46
| | | | | | | | | | | | | | | | | | | | | | On some platforms such as VF610, offset of mux and pad ctrl register may be zero, and the mux_mode and config_val are in one 32-bit register. This patch adds support to imx core pinctrl framework to handle these cases. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: fix abx500_gpio_dbg_show_one() to show pull up/downPatrice Chotard2013-06-161-16/+70
| | | | | | | | | | | | | | | | | | | | - rework abx500_gpio_dbg_show_one() to take in account pull up/down feature available on AB8540 only. - add abx500_get_pull_updown() needed by abx500_gpio_dbg_show_one() - rename abx500_config_pull_updown() to abx500_set_pull_updown() Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: allow to set pull upPatrice Chotard2013-06-161-1/+23
| | | | | | | | | | | | | | | | | | | | On ABx500 chip family, all pins support only pull down except for AB8540 which supports pull up/down on some pins. Rework abx500_pin_config_set to be able to set pull up on pins which support this feature. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: fix abx500_config_pull_updownPatrice Chotard2013-06-161-1/+1
| | | | | | | | | | | | | | | | Fix abx500_config_pull_updown() to set correct bit in AB8540_GPIO_PULL_UPDOWN_REG. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinconf-generic: add BIAS_BUS_HOLD pinconfJames Hogan2013-06-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder pin mode (also known as bus keeper, or repeater). This is a weak latch which drives the last value on a tristate bus. Another device on the bus can drive the bus high or low before going tristate to change the value driven by the pin. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinconf-generic: add drive strength to debugfs outputJames Hogan2013-06-161-0/+1
| | | | | | | | | | | | | | | | Add the drive strength pinconf to debugfs output (with the unit "mA"). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: abx500: suppress unused mutexPatrice Chotard2013-06-161-10/+0
| | | | | | | | | | | | | | | | | | Suppress a mutex which was initialized on probe and destroyed on remove but never used. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: save the status in suspend and restore after resumingBarry Song2013-06-161-0/+56
| | | | | | | | | | | | | | | | | | this patch saves the status of pinctrl registers and restore them while resuming. this makes all drivers have coherent status for pinmux after suspending and resuming. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sink pinctrldev_list_mutexLinus Walleij2013-06-161-21/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrldev_list_mutex is sinked into the functions that actually traverse the list and lock it there. The code makes much more sense in this way. All the callers are in non-performance critical paths and the code is way more readable this way. Also refactor the function get_pinctrl_dev_from_devname() to follow the design pattern of get_pinctrl_dev_from_of_node() which is slightly simpler. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoCBarry Song2013-06-166-934/+1955
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | atlas6 is a SoC very similar with primaII, the register layput of pinctrl is same, but the pads, groups and functions of atlas6 have different layout with prima2, this patch 1. pull the definition of pads, groups and functions out of the pinctrl-sirf driver,and put them into soc-specific files 2. add pads, groups and functions tables for atlas6 3. let pads, groups and functions tables become the config data of the related dt compatible node, so the pinctrl-sirf can support all SiRF SoCs with the config data as private data. In this patch,we create a sirf dir, and let the old drivers/pinctrl/pinctrl-sirf.c = drivers/pinctrl/sirf/pinctrl-prima2.c + drivers/pinctrl/sirf/pinctrl-sirf.c drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the pin layout of atlas6. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers: pinctrl: vt8500: use devm_ioremap_resource()Laurent Navet2013-06-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | Replace a call to deprecated devm_request_and_ioremap by devm_ioremap_resource. Found with coccicheck and this semantic patch: scripts/coccinelle/api/devm_ioremap_resource.cocci Signed-off-by: Laurent Navet <laurent.navet@gmail.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: dove: add PMU functions to pinctrlSebastian Hesselbarth2013-06-161-28/+216
| | | | | | | | | | | | | | | | | | | | | | Dove power management unit can mux some special functions to mpp0-15. This patch adds support to set/get the current PMU function mapped to the corresponding mpp pins. The device tree documentation is also updated accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers/pinctrl/spear: don't check resource with devm_ioremap_resourceWolfram Sang2013-06-161-6/+1
| | | | | | | | | | | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: enable build of pinctrl-imx6sl driverShawn Guo2013-06-161-0/+1
| | | | | | | | | | | | | | The pinctrl-imx6sl is in place. Enable the build of it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers/pinctrl: don't check resource with devm_ioremap_resourceWolfram Sang2013-06-161-6/+1
| | | | | | | | | | | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: u300: remove unnecessary platform_set_drvdata()Jingoo Han2013-06-161-1/+0
| | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: remove unnecessary platform_set_drvdata()Jingoo Han2013-06-161-4/+1
| | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: mxs: remove unnecessary platform_set_drvdata()Jingoo Han2013-06-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: coh901: remove unnecessary platform_set_drvdata()Jingoo Han2013-06-161-1/+0
| | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'regmap-v3.11' of ↵Linus Torvalds2013-07-033-0/+1410
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "A small but useful set of regmap updates this time around: - An abstraction for bitfields within a register map contributed by Srinivas Kandagatla, allowing drivers to cope more easily when hardware designers randomly move things about (mainly when talking to things like system controllers). - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used from hard IRQ context. - Small improvements to the cache infrastructure and performance, including a default cache sync operation so now all regmaps can sync easily. There's also a pinctrl driver making use of the new bitfield API, merged here for dependency reasons. There will be a simple add/add conflict with the pinctrl tree as a result." * tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: pinctrl: st: Remove unnecessary use of of_match_ptr macro pinctrl: st: fix return value check pinctrl: st: Add pinctrl and pinconf support. regmap: debugfs: Suppress cache for partial register files regmap: Add regmap_field APIs regmap: core: Cache all registers by default when cache is enabled regmap: Implemented default cache sync operation regmap: Make regmap-mmio usable from atomic contexts regmap: regcache: Fixup locking for custom lock callbacks regmap: debugfs: Fix return from regmap_debugfs_get_dump_start regmap: debugfs: Don't mark lockdep as broken due to debugfs write regmap: rbtree: Use range information to allocate nodes regmap: rbtree: Factor out node allocation regmap: Make regmap_check_range_table() a public API regmap: Add support for discarding parts of the register cache
| * | pinctrl: st: Remove unnecessary use of of_match_ptr macroAxel Lin2013-06-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a DT only driver and st_pctl_of_match is always compiled in. Hence of_match_ptr is unnecessary. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | pinctrl: st: fix return value checkWei Yongjun2013-06-281-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. The function syscon_regmap_lookup_by_phandle() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | pinctrl: st: Add pinctrl and pinconf support.Srinivas KANDAGATLA2013-06-253-0/+1410
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinctrl support to ST SoCs. About hardware: ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle pin configurations. Each multi-function pin is controlled, driven and routed through the PIO multiplexing block. Each pin supports GPIO functionality (ALT0) and multiple alternate functions(ALT1 - ALTx) that directly connect the pin to different hardware blocks. When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO block. Otherwise the PIO multiplexing block configures these parameters and retiming the signal. About driver: This pinctrl driver manages both PIO and PIO-mux block using pinctrl, pinconf, pinmux, gpio subsystems. All the pinctrl related config information can only come from device trees. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
* | Merge tag 'late-for-linus' of ↵Linus Torvalds2013-07-023-0/+121
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late changes from Arnd Bergmann: "These are changes that arrived a little late before the merge window or that have multiple dependencies on previous branches so they did not fit into one of the earlier ones. There are 10 branches merged here, a total of 39 non-merge commits. Contents are a mixed bag for the above reasons: * Two new SoC platforms: ST microelectronics stixxxx and the TI 'Nspire' graphing calculator. These should have been in the 'soc' branch but were a little late * Support for the Exynos 5420 variant in mach-exynos, which is based on the other exynos branches to avoid conflicts. * Various small changes for sh-mobile, ux500 and davinci * Common clk support for MSM" * tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) ARM: ux500: bail out on alien cpus ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare ...
| * \ Merge tag 'soc-exynos5420-2' of ↵Olof Johansson2013-06-253-0/+121
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim, this adds pinctrl support for Exynos 5420. * tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: exynos: add exynos5420 SoC specific data ARM: dts: add pinctrl support to EXYNOS5420 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | pinctrl: exynos: add exynos5420 SoC specific dataLeela Krishna Amudala2013-06-193-0/+121
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Samsung EXYNOS5420 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5420. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | Merge tag 'renesas-cleanup-for-v3.11' of ↵Arnd Bergmann2013-06-2111-1529/+9944
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late From Simon Horman: Renesas ARM based SoC cleanups for v3.11 __initdata annotations for the r8a7790 SoC by Morimoto-san. * tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits) ARM: shmobile: r8a7790: add __initdata on resource and device data Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'drivers-for-linus' of ↵Linus Torvalds2013-07-028-26/+1074
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver specific changes from Arnd Bergmann: "These changes are all driver specific and cross over between arm-soc contents and some other subsystem, in these cases cpufreq, crypto, dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have these changes merged through arm-soc. As we proceed to untangle the dependencies between platform code and driver code, the amount of changes in this category is fortunately shrinking, for 3.11 we have 16 branches here and 101 non-merge changesets, the majority of which are for the stedma40 dma engine driver used in the ux500 platform. Cleaning up that code touches multiple subsystems, but gets rid of the dependency in the end. The mailbox code moved out from mach-omap2 to drivers/mailbox is an intermediate step and is still omap specific at the moment. Patches exist to generalize the subsystem and add other drivers with the same API, but those did not make it for 3.11." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits) crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static ARM: ux500: Remove mop500_snowball_ethernet_clock_enable() ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO ARM: ux500: Provide a AB8500 GPIO Device Tree node gpio: rcar: fix gpio_rcar_of_table gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections gpio-rcar: Reference core gpio documentation in the DT bindings clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung pinctrl: s3c24xx: use correct header for chained_irq functions ...
| * \ \ Merge tag 'renesas-pinmux2-for-v3.11' of ↵Arnd Bergmann2013-06-213-26/+403
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers From Simon Horman: Second Round of Renesas ARM based SoC pinmux and GPIO update for v3.11 tidyup MMC_D1 pin for r8a7778 SoC fix two pin numbers and add HSCIF pin groups to r8a7790 SoC add pinmux data for MMCIF and SDHI interfaces for r8a73a4 SoC * tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh-pfc: r8a7778: tidyup MMC_D1 pin pinctrl: r8a7790: fix two pin numbers sh-pfc: r8a7790: add HSCIF pin groups pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto2013-06-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | pinctrl: r8a7790: fix two pin numbersGuennadi Liakhovetski2013-06-171-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two erroneous MMCIF1 pin numbers on r8a7790. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | sh-pfc: r8a7790: add HSCIF pin groupsUlrich Hecht2013-06-121-15/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfacesGuennadi Liakhovetski2013-06-121-0/+198
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux groups and functions for the two MMCIF and three SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | Merge tag 's3c24xx-pinctrl-2' of ↵Arnd Bergmann2013-06-201-2/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim: based on s3c24xx-pinctrl - use correct header for chained_irq functions for s3c24xx-pinctrl * tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: s3c24xx: use correct header for chained_irq functions Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | pinctrl: s3c24xx: use correct header for chained_irq functionsHeiko Stuebner2013-06-191-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chained_irq_enter and chained_irq_exit moved to a real header under linux/pinctrl instead of asm/. Update the pinctrl driver to use the correct header and fix the build error. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>` Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | Merge tag 'renesas-gpio-rcar-for-v3.11' of ↵Olof Johansson2013-06-1411-1529/+9944
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers From Simon Horman: Renesas ARM based SoC GPIO R-Car updates for v3.11 DT support to GPIO R-Car driver by Laurent Pinchart. * tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (131 commits) gpio-rcar: Add DT support
| * | | | Merge branch 'v3.11-next/driver-pinctrl' into v3.11-next/s3c24xx-driverKukjin Kim2013-06-125-0/+672
| |\ \ \ \ | | | |/ / | | |/| / | | |_|/ | |/| |
| | * | pinctrl: Add pinctrl-s3c24xx driverHeiko Stuebner2013-05-215-0/+672
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s3c24xx pins follow a similar pattern as the other Samsung SoCs and can therefore reuse the already introduced infrastructure. The s3c24xx SoCs have one design oddity in that the first 4 external interrupts do not reside in the eint pending register but in the main interrupt controller instead. We solve this by forwarding the external interrupt from the main controller into the irq domain of the pin bank. The masking/acking of these interrupts is handled in the same way. Furthermore the S3C2412/2413 SoCs contain another oddity in that they keep the same 4 eints in the main interrupt controller and eintpend register and requiring ack operations to happen in both. This is solved by using different compatible properties for the wakeup eint node which set a property accordingly. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-07-021-3/+3
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits) ARM: at91: dt: rm9200ek: add spi support ARM: at91: dt: rm9200: add spi support ARM: at91/DT: at91sam9n12: add SPI DMA client infos ARM: at91/DT: sama5d3: add SPI DMA client infos ARM: at91/DT: fix SPI compatibility string ARM: Kirkwood: Fix the internal register ranges translation ARM: dts: bcm281xx: change comment to C89 style ARM: mmc: bcm281xx SDHCI driver (dt mods) ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support arm: mvebu: enable mini-PCIe connectors on Armada 370 RD ARM: shmobile: irqpin: add a DT property to enable masking on parent ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ...
| * \ \ \ Merge tag 'nomadik-dt-2' of ↵Arnd Bergmann2013-06-201-1/+1
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt From Linus Walleij: Nomadik DT and clock work: - Lee Jones' pinctrl compat ontology patches - A real clock driver for the Nomadik, 100% DT-based - Device tree changes for the Nomadik clocks * tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS Conflicts: arch/arm/boot/dts/ste-nomadik-s8815.dts Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platformsLee Jones2013-05-281-1/+1
| | | |/ / | | |/| | | | | | | | | | | | | | | | | Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'ux500-dt-for-arm-soc' of ↵Olof Johansson2013-06-141-2/+2
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt From Linus Walleij: Device tree patches for ux500, basically trees and auxdata: - Fix for the thermal node to be contained in the PRCMU node - Add the DTS and auxdata needed to boot the U8540 platform - Various regulators added and renamed - Rename base SoC node - A bunch of DMA patches adding channels for DT boots - A bunch of crypto+hash patches adding config for DT boots - A bunch of patches fixing the ALSA SoC support to work - Register the LP5521 LEDs - Fix a number of typos and naming errors * tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (39 commits) ARM: ux500: drop any 0x prefix from I2C DT devices ARM: ux500: Allocate correct amount of memory for the u8540 in DT ARM: ux500: Provide auxdata to ux500 ASoC driver ARM: ux500: Add DT regulators for ab8500-codec ARM: ux500: Correct anamic2 typo in DT files ARM: ux500: Fix trivial typo in v-anamic1 comment ARM: ux500: Reduce PRCMU reg-names to shorter form for u8540 DT ARM: ux500: Add an auxdata entry for MUSB for clock-name look-up ARM: ux500: cut chip-select GPIOs from SSP device ARM: ux500: use symbolic names for interrupt flags ARM: ux500: use #include syntax to include *.dtsi. ARM: ux500: bump MMC/SD max frequency for DT boots ARM: ux500: Apply other compatible name to the u8540 DTS file pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platforms ARM: ux500: Standardise Pinctrl compatible string for DBx5x based platforms ARM: ux500: Standardise DBx5x0 based Pinctrl compat string in the DTS crypto: ux500/hash - Enable DT probing of the driver crypto: ux500/cryp - Enable DT probing of the driver ARM: ux500: enable the crypto and hash on all dbx500 ARM: ux500: Provide an AUXDATA entry for ux500-hash ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platformsLee Jones2013-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | | Merge tag 'exynos-arch-2' of ↵Arnd Bergmann2013-06-201-2/+3
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: arch/arm/mach-exynos update - enable XHCI on exynos5 - enable Pinctrl on exynos4 and exynos5 - calling scu_enable() is only available on Cortex-A9 * tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: call scu_enable() only in case of cortex-A9 processor ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level ARM: EXYNOS: Enable XHCI support on exynos5 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip levelDoug Anderson2013-06-191-2/+3
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be missing the pincontrol definitions. Move PINCTRL selects to the arch level since we should be enabling the code for all exynos variants. Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not for exynos5440. Also add basic dependencies for the PINCTRL_EXYNOS kernel config. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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