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* pinctrl: nomadik: improve GPIO debug printsLinus Walleij2014-09-301-11/+25
| | | | | | | | | | The debugfs file would only define if the line was "pulled" and not which direction (pull up or pull down). Improve this by taking two print paths depending on whether the pin is set as input or output and use the data register directly to figure out whether the pin is set for pull up or pull down. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: abx500: refactor DT parser to take two pathsLinus Walleij2014-09-301-26/+28
| | | | | | | | We refactor the DT parser to look for either a config or a function and then look for further nodes and reserve maps, not the two things mixed up like prior to this patch. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: abx500: use helpers for map allocation/freeLinus Walleij2014-09-301-38/+5
| | | | | | | This switches the abx500 driver to use the pin control helper utils for allocating and free:ing maps. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: refactor DT parser to take two pathsLinus Walleij2014-09-291-29/+33
| | | | | | | | We refactor the DT parser to look for either a config or a function and then look for further nodes and reserve maps, not the two things mixed up like prior to this patch. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: use utils map free functionLinus Walleij2014-09-291-13/+2
| | | | | | | Stop brewing our own map free function and rely on the pinctrl utils helpers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: use util function to reserve mapsLinus Walleij2014-09-291-23/+2
| | | | | | | Stop brewing our own pin map reservation function and use the generic code. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: use restart_notifier mechanism for ps_holdJosh Cartwright2014-09-261-13/+18
| | | | | | | | | | | | | | | | | | | By converting to the restart_notifier mechanism for restart, we allow for other mechanisms, like the watchdog, to be used for restart in the case where PS_HOLD has failed to reset the chip. Since this mechanism may be one of several mechanisms registered, change the post-ps_hold write timeout to be a more reasonable 1 second instead of 10 seconds. Choose priority 128, as according to documentation, this mechanism "is sufficient to restart the entire system". Tested-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocationLaurent Pinchart2014-09-234-26/+5
| | | | | | | | | | The SoC data structure allocated at init time only holds a regulator pointer that is only used in the init function. Replace it with a local variable and get rid of the SoC data structure allocation altogether. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: fix the dt_free_map functionAntoine Tenart2014-09-231-20/+1
| | | | | | | | | | | | | | | The berlin_pinctrl_dt_free_map function tries to free memory allocated and handled by the of subsystem. This is wrong and already handled by pinctrl_dt_free_maps() which calls of_node_put(). This patch fixes the Berlin pinctrl way of freeing its maps, avoiding a kernel BUG(), by using the common pinctrl_utils_dt_free_map function instead. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: disable PD or PU before enabling PU or PDWenyou Yang2014-09-231-0/+6
| | | | | | | | | | Disable Pull-Down or Pull-Up property before enabling Pull-Up or Pull-Down, because the pin's Pull-Up and Pull-Down property is mutually exclusive. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: remove gpiochip in failure casesPramod Gurav2014-09-231-0/+1
| | | | | | | | | | | | This patch releases gpiochip related resources by calling gpiochip_remove when gpiochip_irqchip_add fails. Cc: Maxime Coquelin <maxime.coquelin@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: Fix error handling while doing gpiochio_irqchip_addPramod Gurav2014-09-231-4/+10
| | | | | | | | | | | | | | | | | | | This patch removes a call to panic function when gpiochio_irqchip_add fails and just returns the error to the calling function. Same return value is used to handle the error case and adds a lable to release resources on error. The error message has been improved to indicate failure to add irqchip to gpiochip. This also changes first argument to function at91_gpio_of_irq_setup from struct device_node to struct platform_device. Because The device_node argument was anyway not being used. Passed pdev so that on failure dev_err can use &pdev->dev and log can be associated with proper device. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: Fix failure path in at91_gpio_probe pathPramod Gurav2014-09-231-7/+13
| | | | | | | | | | | This fixes the whole error handling in probe function by capturing and returning error values on kernel function like clk_prepare, clk_enable, gpiochip_add etc. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: lantiq: Release gpiochip resources in fail casePramod Gurav2014-09-231-0/+2
| | | | | | | | | | This patch releases gpiochip resources with of_gpiochip_remove and gpiochip_remove in failure cases. CC: John Crispin <blogic@openwrt.org> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: detect uninitialized pinsStefan Agner2014-09-233-9/+9
| | | | | | | | | | | | | | The pinctrl driver initialized the register offsets for the pins with 0. On Vybrid an offset of 0 is a valid offset for the pinctrl mux register. So far, this was solved using the ZERO_OFFSET_VALID flag which allowed offsets of 0. However, this does not allow to verify whether a pins struct imx_pmx_func was initialized or not. Use signed offset values for register offsets and initialize those with -1 in order to detect uninitialized offset values reliable. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: Add MIPI pad controlSean Paul2014-09-191-0/+67
| | | | | | | | | | | | | | | | | | | | This patch adds MIPI CSI/DSIB pad control mux register from the APB misc block to tegra pinctrl. Without writing to this register, the dsib pads are muxed as csi, and cannot be used. The register is not yet documented in the TRM, here is the description: 70000820: APB_MISC_GP_MIPI_PAD_CTRL_0 [31:02] RESERVED [01:01] DSIB_MODE [CSI=0,DSIB=1] [00:00] RESERVED Signed-off-by: Sean Paul <seanpaul@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: Switch to using managed clk_getPramod Gurav2014-09-051-4/+2
| | | | | | | | | | This patch switches to using managed version of clk_get and hence removes clk_put from failure path. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: adi2: Remove duplicate gpiochip_remove_pin_rangesPramod Gurav2014-09-051-1/+0
| | | | | | | | | | | This patch removes call to gpiochip_remove_pin_ranges() from platform_driver remove function as it will anway be called by gpiochip_remove(). CC: Sonic Zhang <sonic.zhang@analog.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: fix freudian slipLinus Walleij2014-09-051-1/+1
| | | | | | | | | | commit 03e9f0cac5da6af85758276cb4624caf5911f2b9 "pinctrl: clean up after enable refactoring" renamed the vtable callback .enable to .set_mux. The renaming was done manually, and one of the alterations contained a freudian slip. I confess, I am human. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: add drive strength configurationMarek Roszko2014-09-051-1/+161
| | | | | | | | | | | | | | | | | | | | The SAMA5 and SAM9x5 series both have drive strength options for the PIOs. This patch adds the ability to set one of three hardware options for drive strengths of low, medium or high for the each pin. The actual current output of the chip based on the setting is defined in the datasheets and varies per pins separate from banks and with supply voltage. This patch adds three new dt-bindings that allow setting the strength when configuring pins. By default, no change will be made to the drive strength of a pin from its reset value. Due to the difference between the register addresses of the SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added. Signed-off-by: Marek Roszko <mark.roszko@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: prima2: add I2S 2ch, 6ch, nodin, mclk groupsRongjun Ying2014-09-041-6/+82
| | | | | | | | | we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we do same things for prima2. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: Remove gpiochip on failure casesPramod Gurav2014-09-041-1/+1
| | | | | | | | | | | | This patch releases gpiochip related resources by calling gpiochip_remove when gpiochip_irqchip_add fails. CC: Linus Walleij <linus.walleij@linaro.org> CC: Barry Song <Baohua.Song@csr.com> CC: Rongjun Ying <rongjun.ying@csr.com> CC: Yuping Luo <yuping.luo@csr.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Make the target processor value configurableGeorgi Djakov2014-09-047-3/+14
| | | | | | | | | | | | | Currently the value used to specify that interrupts from the gpio should be routed to the application processor is hardcoded for all Qualcomm SoCs. But the new APQ8084 SoC uses a different value. To resolve this, we make this value configurable for each SoC. For all existing SoCs we continue to use the current value, and only for APQ8084 we use the new value. Suggested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Add APQ8084 pinctrl supportGeorgi Djakov2014-09-043-0/+1252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset adds pinctrl support for the Qualcomm APQ8084 platform. This set of patches adds pinctrl support for the Qualcomm APQ8084 platform. The first patch adds the pin definitions. The second patch contains the devicetree binding documentation. The third patch adds the DT node. The last patch makes the INTR_TARGET_PROC_APPS value configurable and defines it for each existing SoC. Tested on IFC6540 board. Changes since v3: - Fixed the sdc valid pin values in the binding documentation - sdc2 instead of sdc3. (suggested by Bjorn Andersson) Changes since v2: - Fixed some incorrect bits and offsets. (suggested by Bjorn Andersson) - Updated binding documentation to follow the format of msm8960. (suggested by Bjorn Andersson) - Added fourth patch, which removes the hardcoded INTR_TARGET_PROC_APPS value and makes it configurable. Also we keep the current value for existing SoCs. (suggested by Bjorn Andersson) Changes since v1: - Updated the total number of pins (suggested by Bjorn Andersson) - Added the missing pin info (provided by Andy Gross) - Updated groups and functions to be consistent with other pinctrls. (suggested by Andy Gross) - Removed unused functions, qdss and test pins. (suggested by Andy Gross) - Updated the documentation with the possible functions. Reviewed-by: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: rename confusing pinmux ops variableLinus Walleij2014-09-044-8/+8
| | | | | | | | | | The vtable named *pinmux_ops in the affected files are not really about pin multiplexing, but a struct related to some PFC-specific operations, inclusing pin config (bias setting). Rename the variable so as to avoid confusions. Acked-by: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx/mxs: move freescale drivers to subdirLinus Walleij2014-09-0425-130/+132
| | | | | | | | | | | | | | | This moves all the Freescale-related drivers (i.MX and MXS) to its own subdirectory to clear the view. Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Anson Huang <b20788@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Denis Carikli <denis@eukrea.com> Cc: Markus Pargmann <mpa@pengutronix.de> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: clean up after enable refactoringLinus Walleij2014-09-0432-99/+105
| | | | | | | | | | | | | | | | | commit 2243a87d90b42eb38bc281957df3e57c712b5e56 "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Fan Wu <fwu@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Add support for reset for apq8064Pramod Gurav2014-09-022-1/+36
| | | | | | | | | | | | | This patch adds support for reset functions to reboot the boards with soc apq8064. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: remove gpiochip in failure casesPramod Gurav2014-09-021-0/+2
| | | | | | | | | | | | This patch releases gpiochip related resources by calling gpiochip_remove when either of gpiochip_add_pin_range and gpiochip_irqchip_add fails. CC: Linus Walleij <linus.walleij@linaro.org> CC: "Ivan T. Ivanov" <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: use a saner Kconfig symbolLinus Walleij2014-09-021-2/+1
| | | | | | | | | | | | There is currently a kludge to get the Makefile to move down to sh-pfc:s drivers: the arch definitions are used twice to get it done. However we can very well use the Kconfig symbol for the SH PFC pin control feature itself: it doesn't matter that it comes from a lower leaf in the Kconfig hierarchy which is completely orthogonal. Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: samsung: use CONFIG_PINCTRL_SAMSUNG symbol in makefileNaveen Krishna Chatradhi2014-08-291-1/+1
| | | | | | | | | | | | | | | Samsung Exynos7 is a ARM64bit processor. Which does not select the CONFIG_PLAT_SAMSUNG symbol. CONFIG_PINCTRL_SAMSUNG is being selected for both PLAT_SAMSUNG and ARCH_EXYNOS7 symbols. This patch modifes the pinctrl/Makefile to use CONFIG_PINCTRL_SAMSUNG symbol to compile the pinctrl/samsung/*.c Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: linus.walleij@linaro.org Cc: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: AM437x: Add pinctrl compatibilityKeerthy2014-08-291-0/+7
| | | | | | | | | | | | | AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin ctrl definitions, in that all 32 bits are used to describe a single pin Also the location of wakeupenable and event bits have changed. Signed-off-by: Keerthy <j-keerthy@ti.com> [nm@ti.com: minor updates] Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: Add DRA7 pinctrl compatibilityNishanth Menon2014-08-291-0/+7
| | | | | | | | | | | DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin ctrl definitions, in that all 32 bits are used to describe a single pin Also the location of wakeupenable and event bits have changed. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: atlas6: Add I2S external clock input pingroupRongjun Ying2014-08-291-0/+21
| | | | | | | | | | | | The I2S controller can use the external clock as reference clock with master mode. But based on different hardware or software design, this external clock might be needed or not needed. So the external input pin can be an independent pinctrl group, and the card driver can decice to get it or not. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: atlas6: take mclk pin out of i2s pingroupRongjun Ying2014-08-291-17/+24
| | | | | | | | | | | The I2S controller can output mclk to external audio codec. But by hardware design, some codecs need mclk and some codecs do not need mclk. So the mclk pin can be an independent pinctrl group, and the card driver can get it or not based on boards. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: fix lots of "line over 80 characters"Bin Shi2014-08-293-81/+128
| | | | | | | | | | According to key customer's requirement, fix "line over 80 characters". Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: fix "quoted string split across lines"Bin Shi2014-08-291-3/+3
| | | | | | | | | | | | | | | | | this patch fixes: WARNING: quoted string split across lines 902: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:902: +MODULE_AUTHOR("Rongjun Ying <rongjun.ying@csr.com>, " + "Yuping Luo <yuping.luo@csr.com>, " WARNING: quoted string split across lines 903: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:903: + "Yuping Luo <yuping.luo@csr.com>, " + "Barry Song <baohua.song@csr.com>"); Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx6sl: introduce MODULE_DEVICE_TABLE for module autoloadingKiran Padwal2014-08-291-0/+1
| | | | | | | Enable autoloading of pinctrl-imx6sl module when a corresponing DT entry is present. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Make of_device_id array constKiran Padwal2014-08-2921-21/+21
| | | | | | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Kiran Padwal <kiran.padwal21@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add i.MX21 pincontrol driverAlexander Shiyan2014-08-283-0/+350
| | | | | | | | This patch adds pincontrol driver for Freescale i.MX21 SOCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'drivers-for-3.17' of ↵Linus Torvalds2014-08-081-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "A handful of driver-related changes. We've had a bunch of them going in through other branches as well, so it's only a part of what we really have this release. Larger pieces are: - Removal of a now unused PWM driver for atmel [ This includes AVR32 changes that have been appropriately acked ] - Performance counter support for the arm CCN interconnect - OMAP mailbox driver cleanups and consolidation - PCI and SATA PHY drivers for SPEAr 13xx platforms - Redefinition (with backwards compatibility!) of PCI DT bindings for Tegra to better model regulators/power" Note: this merge also fixes up the semantic conflict with the new calling convention for devm_phy_create(), see commit f0ed817638b5 ("phy: core: Let node ptr of PHY point to PHY and not of PHY provider") that came in through Greg's USB tree. Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through the next tree. * tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits) bus: arm-ccn: Fix error handling at event allocation mailbox/omap: add a parent structure for every IP instance mailbox/omap: remove the private mailbox structure mailbox/omap: consolidate OMAP mailbox driver mailbox/omap: simplify the fifo assignment by using macros mailbox/omap: remove omap_mbox_type_t from mailbox ops mailbox/omap: remove OMAP1 mailbox driver mailbox/omap: use devm_* interfaces bus: ARM CCN: add PERF_EVENTS dependency bus: ARM CCN PMU driver PCI: spear: Remove spear13xx_pcie_remove() PCI: spear: Fix Section mismatch compilation warning for probe() ARM: tegra: Remove legacy PCIe power supply properties PCI: tegra: Remove deprecated power supply properties PCI: tegra: Implement accurate power supply scheme ARM: SPEAr13xx: Update defconfigs ARM: SPEAr13xx: Add pcie and miphy DT nodes ARM: SPEAr13xx: Add bindings and dt node for misc block ARM: SPEAr13xx: Fix static mapping table phy: Add drivers for PCIe and SATA phy on SPEAr13xx ...
* \ Merge tag 'dt-for-3.17' of ↵Linus Torvalds2014-08-083-0/+980
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree changes from Olof Johansson: "Unlike the board branch, this keeps having large sets of changes for every release, but that's quite expected and is so far working well. Most of this is plumbing for various device bindings and new platforms, but there's also a bit of cleanup and code removal for things that are moved from platform code to DT contents (some OMAP clock code in particular). There's also a pinctrl driver for tegra here (appropriately acked), that's introduced this way to make it more bisectable. I'm happy to say that there were no conflicts at all with this branch this release, which means that changes are flowing through our tree as expected instead of merged through driver maintainers (or at least not done with conflicts). There are several new boards added, and a couple of SoCs. In no particular order: - Rockchip RK3288 SoC support, including DTS for a dev board that they have seeded with some community developers. - Better support for Hardkernel Exynos4-based ODROID boards. - CCF conversions (and dtsi contents) for several Renesas platforms. - Gumstix Pepper (TI AM335x) board support - TI eval board support for AM437x - Allwinner A23 SoC, very similar to existing ones which mostly has resulted in DT changes for support. Also includes support for an Ippo tablet with the chipset. - Allwinner A31 Hummingbird board support, not to be confused with the SolidRun i.MX-based Hummingboard. - Tegra30 Apalis board support" * tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits) ARM: dts: Enable USB host0 (EHCI) on rk3288-evb ARM: dts: add rk3288 ehci usb devices ARM: dts: Turn on USB host vbus on rk3288-evb ARM: tegra: apalis t30: fix device tree compatible node ARM: tegra: paz00: Fix some indentation inconsistencies ARM: zynq: DT: Clarify Xilinx Zynq platform ARM: dts: rockchip: add watchdog node ARM: dts: rockchip: remove pinctrl setting from radxarock uart2 ARM: dts: Add missing pinctrl for uart0/1 for exynos3250 ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250 ARM: dts: Add TMU dt node to monitor the temperature for exynos3250 ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250 ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only ARM: dts: max77686 is exynos5250-snow only ARM: zynq: DT: Remove DMA from board DTs ARM: zynq: DT: Add CAN node ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table ARM: dts: Add PMU DT node for exynos5260 SoC ARM: EXYNOS: Add support for Exynos5410 PMU ARM: dts: Add PMU to exynos5410 ...
| * \ Merge tag 'tegra-for-3.17-xusb-padctl' of ↵Olof Johansson2014-07-193-0/+980
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Merge "ARM: tegra: Add XUSB pad controller support" from Thierry Reding: Adds device tree bindings and a driver for the XUSB pad controller found on Tegra114 and later. This is a prerequisites for PCIe, SATA and XUSB drivers which are all currently being reviewed or pending for merge. This is a separate branch in case it needs to be pulled into the pinctrl tree to resolve conflicts. * tag 'tegra-for-3.17-xusb-padctl' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: pinctrl: Add NVIDIA Tegra XUSB pad controller support of: Add NVIDIA Tegra XUSB pad controller binding Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | pinctrl: Add NVIDIA Tegra XUSB pad controller supportThierry Reding2014-07-113-0/+980
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads that lanes can be assigned to in order to support a variety of interface options: USB 2.0, USB 3.0, PCIe and SATA. In addition to the pin controller used to assign lanes to pads two PHYs are exposed to allow the bricks for PCIe and SATA to be powered up and down by PCIe and SATA drivers. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | | Merge tag 'pinctrl-v3.17-1' of ↵Linus Torvalds2014-08-0774-1550/+4198
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl updates from Linus Walleij: "This is the bulk pin control changes for the v3.17 merge development cycle: - get rid of the .disable() callback from the driver callback vtable. This callback was abused and counterintuitive since a pin or group of pins can be said to always be in some setting, and never really disabled. We now only enable a certain muxing, and move between some certain muxings, we never "disable" a mux setting - some janitorial moving the MSM, Samsung and Nomadik and drivers to their own subdirectories for a clearer view in the subsystem. This will continue - kill off the use of the return value from gpiochip_remove(), this will be done in parallel in the GPIO subsystem and hopefully not trigger too many unchecked return value warnings before we get rid of this altogether - a huge set of changes and improvements to the Allwinner sunxi drivers especially for their latest A23 and A31 SoCs, and some ground work for the new sun8i platform family - a large set of Rockchip driver improvements adding support for the RK3288 SoC - advances in migration of older Freescale platforms to pin control, especially i.MX1 - Samsung and Exynos improvements - support for the Qualcomm MSM8960 SoC - use the gpiolib irqchip helpers for the ST SPEAr and Intel Baytrail drivers - a bunch of nice janitorial work done with cppcheck" * tag 'pinctrl-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (61 commits) pinctrl: baytrail: Convert to use gpiolib irqchip pinctrl: sunxi: number gpio ranges starting from 0 pinctrl: sunxi: use gpiolib API to mark a GPIO used as an IRQ pinctrl: rockchip: add drive-strength control for rk3288 pinctrl: rockchip: add separate type for rk3288 pinctrl: rockchip: set is_generic in pinconf_ops pinctrl: msm: drop negativity check on unsigned value pinctrl: remove all usage of gpio_remove ret val in driver/pinctl pinctrl: qcom: Make muxing of gpio function explicit pinctrl: nomadik: move all Nomadik drivers to subdir pinctrl: samsung: Group all drivers in a sub-dir sh-pfc: sh73a0: Introduce the use of devm_regulator_register sh-pfc: Add renesas,pfc-r8a7791 to binding documentation pinctrl: msm: move all qualcomm drivers to subdir pinctrl: msm: Add msm8960 definitions pinctrl: samsung: Allow pin value to be initialized using pinfunc pinctrl: samsung: Allow grouping multiple pinmux/pinconf nodes pinctrl: exynos: Consolidate irq_chips of GPIO and WKUP EINTs pinctrl: samsung: Handle GPIO request and free using pinctrl helpers pinctrl: samsung: Decouple direction setting from pinctrl ...
| * | | pinctrl: baytrail: Convert to use gpiolib irqchipMika Westerberg2014-07-282-69/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: number gpio ranges starting from 0Chen-Yu Tsai2014-07-281-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl-sunxi driver originally used the pin number as the gpio range offset. This resulted in large, bogus gpio numbers for the new sun6i-a31-r pinctrl devices. This patch makes the driver number the gpios ranges starting from an offset of 0, by subtracting the pin_base number from the pin number. This also makes the system-wide gpio number match the pin number. Tested on sun8i with sysfs exported gpios. This patch also changes the GPIO bindings for R_PIO: gpios = <&r_pio B N flag>; Where B originally was the pinbank label (L or M) counted from A, with this patch it becomes (L or M) counted from its pinbank base (L). Thus gpios = <&r_pio 10 11 0>; /* PL11 */ becomes gpios = <&r_pio 0 11 0>; /* PL11 */ IMO this is correct, as the binding shows the bank offset and pin offset within the bank for the GPIO controller. But I'm worried it might be a bit confusing. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: use gpiolib API to mark a GPIO used as an IRQChen-Yu Tsai2014-07-281-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an IRQ is started on a GPIO line, mark this GPIO as IRQ in the gpiolib so we can keep track of the usage centrally. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: rockchip: add drive-strength control for rk3288Heiko Stübner2014-07-231-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rk3288 is the first Rockchip soc handling the drive strength on a per-pin basis, while the older ones can set the drive-strength only for specific pin-groups. Therefore limit setting the drive-strength to this soc for now. Signed-off-by: Heiko Stübner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: rockchip: add separate type for rk3288Heiko Stübner2014-07-231-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An upcoming pinctrl function of the rk3288 differs again from everything else, so we'll need a separate type for it. Signed-off-by: Heiko Stübner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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