summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/sh-pfc
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'pinctrl-v4.7-1' of ↵Linus Torvalds2016-05-197-28/+629
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This kernel cycle was quite calm when it comes to pin control and there is really just one major change, and that is the introduction of devm_pinctrl_register() managed resources. Apart from that linear development, details below. Core changes: - Add the devm_pinctrl_register() API and switch all applicable drivers to use it, saving lots of lines of code all over the place. New drivers: - driver for the Broadcom NS2 SoC - subdriver for the PXA25x SoCs - subdriver for the AMLogic Meson GXBB SoC Driver improvements: - the Intel Baytrail driver now properly supports pin control - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction() callback in the GPIO portions - continued development and stabilization of several SH-PFC SoC subdrivers: r8a7795, r8a7790, r8a7794 etc" * tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits) Revert "pinctrl: tegra: avoid parked_reg and parked_bank" pinctrl: meson: Fix eth_tx_en bit index pinctrl: tegra: avoid parked_reg and parked_bank pinctrl: tegra: Correctly check the supported configuration pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC pinctrl: rockchip: fix pull setting error for rk3399 pinctrl: stm32: Implement .pin_config_dbg_show() pinctrl: nomadik: hide nmk_gpio_get_mode when unused pinctrl: ns2: rename pinctrl_utils_dt_free_map pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable pinctrl: at91: Make at91_gpio_template const pinctrl: baytrail: fix some error handling in debugfs pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove() pinctrl: nomadik: implement .get_direction() pinctrl: nomadik: use BIT() with offsets consequently pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration ...
| * Merge tag 'sh-pfc-for-v4.7-tag2' of ↵Linus Walleij2016-05-021-0/+217
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.7 (take two) - Support for the Display Unit on R-Car E2.
| | * pinctrl: sh-pfc: r8a7794: Add DU pin groupsKoji Matsuoka2016-04-151-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r8a7794 PFC DU support from the R-Car Gen2 v1.9.4 BSP [Magnus: added the description, added missing dot clock output signals, separated CDE and DISP signals, broke out the ODDF signal from the sync group.] [Sergei: resolved rejects, folded in Magnus' patches, killed empty lines, reordered pin/mux arrays and pin groups, fixed up some comments to the pin arrays, removed the "du" function splitting its groups between the "du0" and "du1" functions.] Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove()Geert Uytterhoeven2016-04-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_PINCTRL_SH_PFC_GPIO=n: drivers/pinctrl/sh-pfc/core.c: In function 'sh_pfc_remove': drivers/pinctrl/sh-pfc/core.c:649:17: warning: unused variable 'pfc' [-Wunused-variable] Fixes: 67ec8d7b48463904 ("pinctrl: ish-pfc: Use devm_pinctrl_register() for pinctrl registration") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ish-pfc: Use devm_pinctrl_register() for pinctrl registrationLaxman Dewangan2016-04-213-15/+1
| |/ | | | | | | | | | | | | | | | | | | Use devm_pinctrl_register() for pin control registration. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-renesas-soc@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sh-pfc: r8a7795: Add drive strength supportLaurent Pinchart2016-03-291-8/+210
| | | | | | | | | | | | | | | | | | | | Define the drive strength registers for the R8A7795. As the PFC driver for the SoC only defines GPIO pins at the moment, limit drive strength support to those pins. Pins without GPIO capabilities will be supported later. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: Add drive strength supportLaurent Pinchart2016-03-294-0/+146
| | | | | | | | | | | | | | | | Add support for the drive-strengh pin configuration using the generic pinconf DT bindings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: IPSRx and MOD_SELx should be set before GPSRxKuninori Morimoto2016-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen2 / Gen3 datasheet will have below note in next version. This patch follows this note. IPSRx and MOD_SELx registers shall be set before setting GPSRx registers in case that they need to be configured. MOD_SELx registers can be set either earlier or later than setting IPSRx registers. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * pinctrl: sh-pfc: r8a7790: Implement voltage switching for SDHIWolfram Sang2016-03-291-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | All the SHDIs can operate with either 3.3V or 1.8V signals, depending on negotiation with the card. Implement the {get,set}_io_voltage operations and set the related capability flag for the associated pins. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | Merge tag 'gpio-v4.7-1' of ↵Linus Torvalds2016-05-171-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for kernel cycle v4.7: Core infrastructural changes: - Support for natively single-ended GPIO driver stages. This means that if the hardware has registers to configure open drain or open source configuration, we use that rather than (as we did before) try to emulate it by switching the line to an input to get high impedance. This is also documented throughly in Documentation/gpio/driver.txt for those of you who did not understand one word of what I just wrote. - Start to do away with the unnecessarily complex and unitelligible ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another evolutional artifact from the time when the GPIO subsystem was unmaintained. Archs can now just select GPIOLIB and be done with it, cleanups to arches will trickle in for the next kernel. Some minor archs ACKed the changes immediately so these are included in this pull request. - Advancing the use of the data pointer inside the GPIO device for storing driver data by switching the PowerPC, Super-H Unicore and a few other subarches or subsystem drivers in ALSA SoC, Input, serial, SSB, staging etc to use it. - The initialization now reads the input/output state of the GPIO lines, so that each GPIO descriptor knows - if this callback is implemented - whether the line is input or output. This also reflects nicely in userspace "lsgpio". - It is now possible to name GPIO producer names, line names, from the device tree. (Platform data has been supported for a while). I bet we will get a similar mechanism for ACPI one of those days. This makes is possible to get sensible producer names for e.g. GPIO rails in "lsgpio" in userspace. New drivers: - New driver for the Loongson1. - The XLP driver now supports Broadcom Vulcan ARM64. - The IT87 driver now supports IT8620 and IT8628. - The PCA953X driver now supports Galileo Gen2. Driver improvements: - MCP23S08 was switched to use the gpiolib irqchip helpers and now also suppors level-triggered interrupts. - 74x164 and RCAR now supports the .set_multiple() callback - AMDPT was converted to use generic GPIO. - TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994 support the new single ended callback for open drain and in some cases open source. - Implement the .get_direction() callback for a few more drivers like PL061, Xgene. Cleanups: - Paul Gortmaker combed through the drivers and de-modularized those who are not really modules. - Move the GPIO poweroff DT bindings to the power subdir where they belong. - Rename gpio-generic.c to gpio-mmio.c, which is much more to the point. That's what it is handling, nothing more, nothing less" * tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits) MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB gpio: zevio: make it explicitly non-modular gpio: timberdale: make it explicitly non-modular gpio: stmpe: make it explicitly non-modular gpio: sodaville: make it explicitly non-modular pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms gpio: dt-bindings: add wd,mbl-gpio bindings gpio: of: make it possible to name GPIO lines gpio: make gpiod_to_irq() return negative for NO_IRQ gpio: xgene: implement .get_direction() gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver gpio: tegra: Implement gpio_get_direction callback gpio: set up initial state from .get_direction() gpio: rename gpio-generic.c into gpio-mmio.c gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case gpio: dwapb: add gpio-signaled acpi event support gpio: dwapb: convert device node to fwnode gpio: dwapb: remove name from dwapb_port_property gpio/qoriq: select IRQ_DOMAIN ...
| * | pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on errorGeert Uytterhoeven2016-05-111-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currrently the gpio_chip.to_irq() callback returns -ENOSYS on error, which causes bad interactions with the serial_mctrl_gpio helpers. mctrl_gpio_init() returns -ENOSYS if GPIOLIB is not enabled, which is intended to be ignored by its callers. However, ignoring -ENOSYS when it was caused by a gpiod_to_irq() failure will lead to a crash later: Unable to handle kernel paging request at virtual address ffffffde ... PC is at mctrl_gpio_set+0x14/0x78 Fix this by returning zero instead, like gpiochip_to_irq() does. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: only use dummy states for non-DT platformsWolfram Sang2016-03-301-1/+3
|/ | | | | | | | | | | | | | | | | | | If pinctrl_provide_dummies() is used unconditionally, then the dummy state will be used even on DT platforms when the "init" state was intentionally left out. Instead of "default", the dummy "init" state will then be used during probe. Thus, when probing an I2C controller on cold boot, communication triggered by bus notifiers broke because the pins were not initialized. Do it like OMAP2: use the dummy state only for non-DT platforms. Cc: stable@vger.kernel.org Fixes: ef0eebc05130 ("drivers/pinctrl: Add the concept of an "init" state") Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: core: don't open code of_device_get_match_data()Wolfram Sang2016-03-091-1/+1
| | | | | | | | | | This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: make explicitly non-modularPaul Gortmaker2016-03-091-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig / Makefile currently controlling compilation of this code is: drivers/pinctrl/sh-pfc/Makefile:obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o drivers/pinctrl/sh-pfc/Makefile:sh-pfc-objs = core.o pinctrl.o drivers/pinctrl/sh-pfc/Kconfig:config PINCTRL_SH_PFC drivers/pinctrl/sh-pfc/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init already wasn't being used in this code, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: linux-renesas-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7795: Add CAN FD supportRamesh Shanmugasundaram2016-02-261-0/+37
| | | | | | | This patch adds CANFD[0-1] pinmux support to r8a7795 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7795: Add CAN supportRamesh Shanmugasundaram2016-02-261-0/+52
| | | | | | | This patch adds CAN[0-1] pinmux support to r8a7795 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7794: Fix GP2[29] muxingAndrey Gusakov2016-02-261-0/+1
| | | | | | | | | | | GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values are listed instead of 4... [Sergei: fixed up the formatting, renamed, added the changelog.] Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: Use ARCH_RENESASSimon Horman2016-02-261-1/+1
| | | | | | | | | | | Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7794: Add EtherAVB pin groupsSergei Shtylyov2016-02-181-0/+123
| | | | | | | | | Add the EtherAVB pin groups to the R8A7794 PFC driver. Based on the patches by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: Rework PFC GPIO supportMagnus Damm2016-02-183-41/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sh-pfc pinctrl driver is currently handling SoC-specific PFC hardware blocks on ARM64, ARM and SH architectures. For older SoCs using SH cores and some 32-bit ARM SoCs the PFC hardware also provides GPIO functionality. On the majority of 32-bit ARM SoCs from Renesas and so far all ARM64 SoCs the GPIO feature is provided by separate hardware blocks. So far GPIO support in the PFC driver has been compiled-in for the majority of the SoCs, but with this patch applied the SoCs with PFC support may select from one of the following: - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support This patch results in the following changes: - The GPIO functionality is only compiled-in on relevant SoCs - The number of lines of code is reduced Build tested using the following configurations: - r8a7795 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM64) - r8a7790 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM) - r8a7790 + r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - sh7751 -> CONFIG_PINCTRL_SH_PFC=n -> OK (SH rts7751r2d1) - sh7724 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (SH ecovec24) Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [geert: s/def_bool n/bool/] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7795: Add PWM supportTakeshi Kihara2016-02-181-0/+153
| | | | | | | | | This patch adds PWM[0-6] pinmux support to r8a7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [uli: adapted to mainline PFC driver] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7795: Add support for INTC-EX IRQ pinsMagnus Damm2016-02-181-0/+60
| | | | | | | | | | | | | | | Most pins on the r8a7795 SoC can be configured in GPIO mode for interrupt and GPIO functionality, while a couple of them can also be routed to the INTC-EX hardware block (formerly known as IRQC). On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and this patch adds support for them to the PFC driver as "intc_ex_irqN". Tested on r8a7795 Salvator-X with an external loop back adapter on EXIO_D that connects pin 9 (IRQ2/GP2_02) and pin 26 (ExA22/GP2_06). Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7794: Add audio clock pin groupsRyo Kataoka2016-02-181-0/+122
| | | | | | | | | | | | | Add the audio clock pin groups to the R8A7794 PFC driver. [Sergei: fixed pin group names to reflect the reality, fixed pin names in the comments to *_pins[], lowercased the separator comment, resolved rejects, added the changelog, renamed the patch.] Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7794: Add SSI pin groupsRyo Kataoka2016-02-181-2/+313
| | | | | | | | | | | | | | Add the SSI pin groups to the R8A7794 PFC driver. [Sergei: fixed inconsistent alternate pin group naming, split SSI5/6 pin groups into data/control ones, moved SSI7 data B group to its proper place, fixed pin names in the comments to *_pins[], extended Cogent Embedded's copyright, added the changelog, renamed the patch.] Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7795: Add USB2.0 host supportTakeshi Kihara2016-02-081-0/+43
| | | | | | | | This patch adds USB[0-2] (USB2.0 host) pinmux support to r8a7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: r8a7795: Remove bits SEL_VSP_1 and SEL_VSP_0Geert Uytterhoeven2016-02-081-3/+3
| | | | | | | | | | Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet. This has no user-visible impact, as the definitions were not really used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7795: Rename SSI_{WS,SCK}0129 to SSI_{WS,SCK}01239Geert Uytterhoeven2016-02-081-7/+7
| | | | | | | | | | Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet. This has no user-visible impact, as the string used for configuration ("ssi01239_ctrl") was already correct. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Rename PINMUX_IPSR_DATA() to PINMUX_IPSR_GPSR()Geert Uytterhoeven2016-02-088-2518/+2518
| | | | | | | | | | This macro describes a pinmux configuration that needs configuration in both a Peripheral Function Select Register (IPSR) and in a GPIO/Peripheral Function Select Register 1 (GPSR). Reflect that in the macro name for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* pinctrl: sh-pfc: Improve pinmux macros documentationGeert Uytterhoeven2016-02-081-8/+88
| | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* Merge tag 'gpio-v4.5-1' of ↵Linus Torvalds2016-01-171-11/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "Here is the bulk of GPIO changes for v4.5. Notably there are big refactorings mostly by myself, aimed at getting the gpio_chip into a shape that makes me believe I can proceed to preserve state for a proper userspace ABI (character device) that has already been proposed once, but resulted in the feedback that I need to go back and restructure stuff. So I've been restructuring stuff. On the way I ran into brokenness (return code from the get_value() callback) and had to fix it. Also, refactored generic GPIO to be simpler. Some of that is still waiting to trickle down from the subsystems all over the kernel that provide random gpio_chips, I've touched every single GPIO driver in the kernel now, oh man I didn't know I was responsible for so much... Apart from that we're churning along as usual. I took some effort to test and retest so it should merge nicely and we shook out a couple of bugs in -next. Infrastructural changes: - In struct gpio_chip, rename the .dev node to .parent to better reflect the fact that this is not the GPIO struct device abstraction. We will add that soon so this would be totallt confusing. - It was noted that the driver .get_value() callbacks was sometimes reporting negative -ERR values to the gpiolib core, expecting them to be propagated to consumer gpiod_get_value() and gpio_get_value() calls. This was not happening, so as there was a mess of drivers returning negative errors and some returning "anything else than zero" to indicate that a line was active. As some would have bit 31 set to indicate "line active" it clashed with negative error codes. This is fixed by the largeish series clamping values in all drivers with !!value to [0,1] and then augmenting the code to propagate error codes to consumers. (Includes some ACKed patches in other subsystems.) - Add a void *data pointer to struct gpio_chip. The container_of() design pattern is indeed very nice, but we want to reform the struct gpio_chip to be a non-volative, stateless business, and keep states internal to the gpiolib to be able to hold on to the state when adding a proper userspace ABI (character device) further down the road. To achieve this, drivers need a handle at the internal state that is not dependent on their struct gpio_chip() so we add gpiochip_add_data() and gpiochip_get_data() following the pattern of many other subsystems. All the "use gpiochip data pointer" patches transforms drivers to this scheme. - The Generic GPIO chip header has been merged into the general <linux/gpio/driver.h> header, and the custom header for that removed. Instead of having a separate mm_gpio_chip struct for these generic drivers, merge that into struct gpio_chip, simplifying the code and removing the need for separate and confusing includes. Misc improvements: - Stabilize the way GPIOs are looked up from the ACPI legacy specification. - Incremental driver features for PXA, PCA953X, Lantiq (patches from the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48 New drivers: - Add a GPIO chip to the ALSA SoC AC97 driver. - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but the branch is merged here too to account for infrastructural changes). - The sx150x driver now supports the sx1502" * tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits) gpio: generic: make bgpio_pdata always visible gpiolib: fix chip order in gpio list gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs() gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs() gpio: brcmstb: Allow building driver for BMIPS_GENERIC gpio: brcmstb: Set endian flags for big-endian MIPS gpio: moxart: fix build regression gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs() leds: pca9532: use gpiochip data pointer leds: tca6507: use gpiochip data pointer hid: cp2112: use gpiochip data pointer bcma: gpio: use gpiochip data pointer avr32: gpio: use gpiochip data pointer video: fbdev: via: use gpiochip data pointer gpio: pch: Optimize pch_gpio_get() Revert "pinctrl: lantiq: Implement gpio_chip.to_irq" pinctrl: nsp-gpio: use gpiochip data pointer pinctrl: vt8500-wmt: use gpiochip data pointer pinctrl: exynos5440: use gpiochip data pointer pinctrl: at91-pio4: use gpiochip data pointer ...
| * pinctrl: sh-pfc: use gpiochip data pointerLinus Walleij2016-01-051-10/+6
| | | | | | | | | | | | | | | | | | | | This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'v4.4-rc6' into develLinus Walleij2015-12-211-3/+3
| |\ | | | | | | | | | Linux 4.4-rc6
| * | gpio: change member .dev to .parentLinus Walleij2015-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: sh-pfc: add missing of_node_putJulia Lawall2015-12-221-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for_each_child_of_node performs an of_node_get on each iteration, so a goto out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ local idexpression n; expression e,e1; identifier l; @@ for_each_child_of_node(e1,n) { ... ( of_node_put(n); | e = n | return n; | + of_node_put(n); ? goto l; ) ... } l: ... when != n // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge branch 'sh-pfc-for-v4.5' of ↵Linus Walleij2015-12-225-0/+478
|\ \ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
| * | | pinctrl: sh-pfc: r8a7791: add EtherAVB pin groupsSergei Shtylyov2015-12-161-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the EtherAVB pin groups to the R8A7791 PFC driver. Also add the copyright for all the Cogent Embedded's past work on this file. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | pinctrl: sh-pfc: r8a7795: Add SATA supportTakeshi Kihara2015-12-161-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SATA0 pinmux support to r8a7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [uli: adjusted for new PFC driver] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | pinctrl: sh-pfc: r8a7795: Add SDHI supportTakeshi Kihara2015-12-161-0/+274
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SDHI[0-3] pinmux support to r8a7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | pinctrl: sh-pfc: r8a7794: Add SCIF_CLK supportGeert Uytterhoeven2015-12-161-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sh-pfc: r8a7790: Add SCIF_CLK supportGeert Uytterhoeven2015-12-161-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sh-pfc: r8a7779: Add SCIF_CLK supportGeert Uytterhoeven2015-12-161-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | | | Merge tag 'v4.4-rc5' into develLinus Walleij2015-12-171-3/+3
|\ \ \ \ | |/ / / |/| | / | | |/ | |/| Linux 4.4-rc5
| * | pinctrl: sh-pfc: sh7734: Add missing cfg macro parameter to fix buildGeert Uytterhoeven2015-12-011-3/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building for SH7734: drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:2: error: '_GP_DATA' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 ... drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:1: error: macro "_GP_INOUTSEL" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:53: error: '_GP_INOUTSEL' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: initialization makes integer from pointer without a cast [enabled by default] drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: (near initialization for '(anonymous)[0]') [enabled by default] ... drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:1: error: macro "_GP_INDT" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:47: error: '_GP_INDT' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: initialization makes integer from pointer without a cast [enabled by default] drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: (near initialization for '(anonymous)[0]') [enabled by default] ... Add the missing "cfg" macro parameters to the sh7734-specific _GP_DATA(), _GP_INOUTSEL(), and _GP_INDT() macros to fix this. Fixes: 22768fc60abbf58b ("pinctrl: sh-pfc: Add macros defining GP ports with config flags") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: r8a7795: Add SCIF_CLK supportGeert Uytterhoeven2015-12-081-0/+24
| | | | | | | | | | | | | | | | | | Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: r8a7791: Add SCIF_CLK supportGeert Uytterhoeven2015-12-081-0/+25
| | | | | | | | | | | | | | | | | | Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: sh73a0: Add MSIOF supportGeert Uytterhoeven2015-12-081-0/+546
| | | | | | | | | | | | | | | | Add pins, groups, and a function for the 4 MSIOF devices. Note that the pin function name of MSIOF3 is named BBIF1. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: sh-pfc: sh73a0: Correct comment for LCD2 data pinsGeert Uytterhoeven2015-12-081-1/+1
| | | | | | | | | | | | The 12 data pins of LCD2 are numbered 0..11, not 0..12. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: sh-pfc: r8a7740: Correct comment for LCD1 data pinsGeert Uytterhoeven2015-12-081-1/+1
| | | | | | | | | | | | The 12 data pins of LCD1 are numbered 0..11, not 0..12. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: sh-pfc: emev2: Correct comment for CFI data pinsGeert Uytterhoeven2015-12-081-1/+1
| | | | | | | | | | | | | | The 8 data pins of the Compact Flash Interface are numbered 0..7, not 0..8. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups, and functionsGeert Uytterhoeven2015-12-081-0/+858
| | | | | | | | | | | | | | | | Extracted from a big patch by Takeshi Kihara. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Correct MSIOF3 TXD_A/RXD_A pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
OpenPOWER on IntegriCloud