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path: root/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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* ath9k_hw: fix analog shift register writes on AR9003Felix Fietkau2010-08-041-1/+5
| | | | | | | | | | Writes to the analog shift registers, which are issues by the initval programming function, require a 100 usec delay (similar to AR9002, but in a different register range). Signed-off-by: Felix Fietkau <nbd@openwrt.org> Acked-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix invalid extension channel noisefloor readings in HT20Felix Fietkau2010-07-261-0/+3
| | | | | | | | | | When the hardware is configured in HT20 mode, noise floor readings for the extension channel often return invalid values, which keep the values in the NF history buffer at the hardware-specific maximum limit. Fix this by discarding the extension channel values when in HT20 mode. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: merge noisefloor load implementationsFelix Fietkau2010-07-121-101/+9
| | | | | | | | | | | | | | | | | AR5008+ and AR9003 currently use two separate implementations of the ath9k_hw_loadnf function. There are three main differences: - PHY registers for AR9003 are different - AR9003 always uses 3 chains, earlier versions are more selective - The AR9003 variant contains a fix for NF load timeouts This patch merges the two implementations into one, storing the register array in the ath_hw struct. The fix for NF load timeouts is not just relevant for AR9003, but also important for earlier hardware, so it's better to just keep one common implementation. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: clean up the noise floor calibration code to reduce code duplicationFelix Fietkau2010-07-021-31/+6
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: sanitize noise floor values properly on all chipsFelix Fietkau2010-07-021-57/+9
| | | | | | | | This refactors the noise floor range checks to make them generic, and adds proper ranges for each supported chip type. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: reduce delay on programming INI on AR9003Luis R. Rodriguez2010-06-141-9/+0
| | | | | | | | | All AR9003 devices are PCI-E only, the extra delay here is not required and only reduces the delay for loading the initial register values by at least 14ms. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: add new ANI implementation for AR9003Luis R. Rodriguez2010-06-141-99/+286
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for ANI for AR9003. The implementation for ANI for AR9003 is slightly different than the one used for the older chipset families. It can technically be used for the older families as well but this is not yet fully tested so we only enable the new ANI for the AR5008, AR9001 and AR9002 families with a module parameter, force_new_ani. The old ANI implementation is left intact. Details of the new ANI implemention: * ANI adjustment logic is now table driven so that each ANI level setting is parameterized. This makes adjustments much more deterministic than the old procedure based logic and allows adjustments to be made incrementally to several parameters per level. * ANI register settings are now relative to INI values; so ANI param zero level == INI value. Appropriate floor and ceiling values are obeyed when adjustments are combined with INI values. * ANI processing is done once per second rather that every 100ms. The poll interval is now a set upon hardware initialization and can be picked up by the core driver. * OFDM error and CCK error processing are made in a round robin fashion rather than allowing all OFDM adjustments to be made before CCK adjustments. * ANI adjusts MRC CCK off in the presence of high CCK errors * When adjusting spur immunity (SI) and OFDM weak signal detection, ANI now sets register values for the extension channel too * When adjusting FIR step (ST), ANI now sets register for FIR step low too * FIR step adjustments now allow for an extra level of immunity for extremely noisy environments * The old Noise immunity setting (NI), which changes coarse low, size desired, etc have been removed. Changing these settings could affect up RIFS RX as well. * CCK weak signal adjustment is no longer used * ANI no longer enables phy error interrupts; in all cases phy hw counting registers are used instead * The phy error count (overflow) interrupts are also no longer used for ANI adjustments. All ANI adjustments are made via the polling routine and no adjustments are possible in the ISR context anymore * A history settings buffer is now correctly used for each channel; channel settings are initialized with the defaults but later changes are restored when returning back to that channel * When scanning, ANI is disabled settings are returned to (INI) defaults. * OFDM phy error thresholds are now 400 & 1000 (errors/second units) for low/high water marks, providing increased stability/hysteresis when changing levels. * Similarly CCK phy error thresholds are now 300 & 600 (errors/second) Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add support for the AR9003 baseband watchdogLuis R. Rodriguez2010-06-021-0/+119
| | | | | | | | | | | | | | The baseband watchdog will monitor blocks of the baseband through timers and will issue an interrupt when things are detected to be stalled. It is only available on the AR9003 family. Cc: Sam Ng <sam.ng@atheros.com> Cc: Paul Shaw <paul.shaw@atheros.com> Cc: Don Breslin <don.breslin@atheros.com> Cc: Cliff Holden <cliff.holden@atheros.com Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix noisefloor timeout handling on AR9003Felix Fietkau2010-04-271-0/+1
| | | | | | | | | | When the noisefloor calibration times out, do not load -50 into the registers, since this might cause rx issues. Instead, leave enough time for the noise floor calibration to complete until the next check. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix fast clock handling for 5GHz channelsFelix Fietkau2010-04-271-2/+2
| | | | | | | | Combine multiple checks that were supposed to check for the same conditions, but didn't. Always enable fast PLL clock on AR9280 2.0 Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix pll clock setting for 5ghz on AR9003Felix Fietkau2010-04-271-10/+1
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add OFDM spur mitigation for AR9003Luis R. Rodriguez2010-04-161-2/+208
| | | | | | | | We add this now as OFDM spur mitigation required accessing the EEPROM for the AR9003 devices. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: complete AR9003 calibrationLuis R. Rodriguez2010-04-161-0/+100
| | | | | | | | | | This goes with some new shiny TX IQ calibration that AR9003 hardware family supports. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Split out the function for reading the noise floorFelix Fietkau2010-04-161-0/+110
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add all the AR9003 PHY callbacksLuis R. Rodriguez2010-04-161-11/+289
| | | | | Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Split off ANI control to the PHY opsFelix Fietkau2010-04-161-0/+8
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add helpers for processing the AR9003 INILuis R. Rodriguez2010-04-161-3/+183
| | | | | | Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Implement spur mitigation on AR9003Felix Fietkau2010-04-161-1/+49
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Implement PLL control on AR9003Felix Fietkau2010-04-161-2/+21
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Set the channel on AR9003Felix Fietkau2010-04-161-1/+46
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add AR9003 PHY register definitionsFelix Fietkau2010-04-161-0/+1
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add AR9003 PHY supportLuis R. Rodriguez2010-04-161-0/+147
This add stubs for PHY support for the AR9003 hardware family. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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