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path: root/drivers/net/wireless/ath/ath10k/pci.h
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* ath10k: enable pci soc powersavingMichal Kazior2015-05-221-48/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By using SOC_WAKE register it is possible to bring down power consumption of QCA61X4 from 36mA to 16mA when associated and idle. Currently the sleep threshold/grace period is at a very conservative value of 60ms. Contrary to QCA61X4 the QCA988X firmware doesn't have Rx/beacon filtering available for client mode and SWBA events are used for beaconing in AP/IBSS so the SoC needs to be woken up at least every ~100ms in most cases. This means that QCA988X is at a disadvantage and the power consumption won't drop as much as for QCA61X4. Due to putting irq-safe spinlocks on every MMIO read/write it is expected this can cause a little performance regression on some systems. I haven't done any thorough measurements but some of my tests don't show any extreme degradation. The patch removes some explicit pci_wake calls that were added in 320e14b8db51aa ("ath10k: fix some pci wake/sleep issues"). This is safe because all MMIO accesses are now wrapped and the device is woken up automatically if necessary. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: enable ASPMJanusz Dziedzic2015-05-221-0/+6
| | | | | | | | | | | | | | It is actually safe to enable ASPM after the device is booted up. This reduces power drain of QCA61X4 when driver is simply loaded (no interface is up) from 31mA to 14mA. QCA988X wasn't measured but doesn't seem to regress in any other way. Signed-off-by: Janusz Dziedzic <janusz.dziedzic@tieto.com> Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: fix target wakeup timeoutRajkumar Manoharan2015-01-291-1/+1
| | | | | | | | | | | | | During drv_start/drv_stop stress testing in ARM platform, sometimes target is taking more that 5ms to wake up. Similar behaviour also noted during driver load and unload iterations. On such cases, the wakup duration lies between 5-6ms. Hence increasing pci wakup timeout 10ms to be more safer. With this changes, able to complete power down/up >100 iterations without any issues. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: create a chip revision whitelistMichal Kazior2014-12-081-0/+5
| | | | | | | | This will make it easier to extend and maintain list of supported hardware. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: make target endianess more explicitMichal Kazior2014-08-271-9/+9
| | | | | | | | | | | | | | Some copy engine structures are target specific and are uploaded to the device during init/configuration. This also cleans up a bit diag_mem_read/write implicit byteswap mess leaving only diag_access_read/write with an implicit endianess byteswap. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove ar_pci->startedMichal Kazior2014-08-251-2/+0
| | | | | | | | | There are basically no more uses for ar_pci->started. It is also perfectly safe to call hif_stop without hif_start now. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: rework posting pci rx buffersMichal Kazior2014-08-251-0/+2
| | | | | | | | | | | | | It was possible on a host system running low on memory to end up with no rx buffers on pci pipes. This makes the driver more robust as it won't fail to start if it can't allocate all rx buffers right away. If it is fatal then upper layers will notice trouble anyway. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove early irq handlingMichal Kazior2014-08-251-1/+0
| | | | | | | | | | It's not really necessary to have a dedicated irq handler just for the sake of catching early fw crashes anymore. It is now safe to use one handler even during early stages of device boot up. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: provide firmware crash info via debugfsBen Greear2014-08-251-3/+0
| | | | | | | | | | | | Store the firmware registers and other relevant data to a firmware crash dump file and provide it to user-space via debugfs. Should help with figuring out why the firmware crashed. kvalo: remove dbglog support, rework and refactor the code to avoid ifdefs and otherwise simplify it as well Signed-off-by: Ben Greear <greearb@candelatech.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove pci features varMichal Kazior2014-08-121-9/+0
| | | | | | | | | | | | The ATH10K_PCI_FEATURE_MSI_X was originally introduced to support both chips QCA988Xv1 and QCA988Xv2. Since v1 isn't supported anymore it doesn't make sense to keep the feature flag around. Since this is the last one remove the whole thing. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove target soc ps codeMichal Kazior2014-08-121-55/+12
| | | | | | | | | | | | | | | | The soc powersave was disabled by default. It never was fully tested. Some hw apparently had problems with it and the implementation itself had a possible race. Just remove the refcounting and simply wake up the device when probing and put to sleep when removing. kvalo: make ath10k_pci_wake() and _sleep() static Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: embed ar_pci inside arMichal Kazior2014-08-121-1/+1
| | | | | | | | | | Use the common convention of embedding private structures inside parent structures. This reduces allocations and simplifies pci probing code. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: fix bmi exchange tx/rx raceMichal Kazior2014-07-151-1/+2
| | | | | | | | | | | | | | It was possible for tx completion not to be processed. In that case an old stack pointer was left on copy engine tx ring. Next bmi exchange would immediately pop it and use complete() on the completion struct there causing corruption. Make sure to wait for both tx and rx completions properly. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: delete ar_pci->fw_indicator_addressKalle Valo2014-03-281-3/+0
| | | | | | It always contains the same constant, no need to have a separate variable for it. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove pci completion listMichal Kazior2014-02-281-28/+0
| | | | | | | | | | | | | | | | | | | | | One of the premises was to guarantee serialized completion handling for upper layers (HTC/WMI/HTT). Since quite some time now it is no longer necessary. The other premise was to batch up tx/rx completions to take advantage of hot caches. However frame tx/rx completion indications come in on a single pipe already so they are already batched up. More meaningful batching is done in HTT itself. This means PCI completion is no longer necessary to keep around. It just wastes memory, cycles and SLOC. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: re-add support for early fw indicationMichal Kazior2013-11-271-0/+1
| | | | | | | | | | | | | | | It's possible for FW to panic during early boot. The patch re-introduces support to detect and print those crashes. This introduces an additional irq handler that is set for the duration of early boot and shutdown. The handler is then overriden with regular handlers upon hif start(). Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove ar_pci->ce_countMichal Kazior2013-11-121-3/+0
| | | | | | | | | | It wasn't really useful to have it to begin with. This makes it a little simpler to re-arrange PCI init code as some function depended on ar_pci->ce_count being set. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: implement ath10k_pci_soc_read/write32()Kalle Valo2013-10-211-0/+10
| | | | | | | To make it easier to access SOC registers. No functional changes. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove num_sends_allowedMichal Kazior2013-10-071-3/+0
| | | | | | | | The value provided by num_sends_allowed is now derived from CE source ringbuffer state. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: convert ath10k_pci_wake() to returnKalle Valo2013-09-031-3/+5
| | | | | | | | We should not try to access hw if wakeup fails so add proper error checking for that. Also add the timeout lenght to the warning message. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: convert ath10k_pci_reg_read/write32() to take struct ath10kKalle Valo2013-09-031-4/+8
| | | | | | This is consistent with all other functions. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove void pointer from struct ath10k_pci_complKalle Valo2013-09-031-1/+1
| | | | | | | | Void pointers are bad, mmkay. No functional changes. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: remove un ar_pci->cacheline_sz fieldKalle Valo2013-09-011-1/+0
| | | | | | cacheline_sz is not used anywhere and can be removed. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: rename ce_state to ath10k_ce_pipeMichal Kazior2013-09-011-4/+4
| | | | | | | The new naming makes more sense. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: rename hif_ce_pipe_info to ath10k_pci_pipeMichal Kazior2013-09-011-3/+3
| | | | | | | The new naming makes more sense. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: use inline ce_state structureMichal Kazior2013-09-011-1/+1
| | | | | | | Simplifies memory managament of ce_state. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: clean up PCI completion statesMichal Kazior2013-08-141-6/+7
| | | | | | | | Improve code readability by using enum and a switch-case. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: Remove qca98xx hw1.0 supportBartosz Markowski2013-08-121-21/+2
| | | | | | | | Since the firmware support is no longer available for hw1.0, drop all code (especially workarounds) for those units. Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: add SoC power save option to PCI features mapBartosz Markowski2013-08-071-4/+7
| | | | | | | | | | | | | | Unify the PCI options location. By default the SoC PS option is disabled to boost the performance and due to poor stability on early HW revisions. In future we can remove the module parameter and turn on/off the PS for given hardware. This change also makes the pci module parameter for SoC PS static. Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: fix typo in define nameMichal Kazior2013-07-301-2/+2
| | | | | Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ath10k: mac80211 driver for Qualcomm Atheros 802.11ac CQA98xx devicesKalle Valo2013-06-121-0/+355
Here's a new mac80211 driver for Qualcomm Atheros 802.11ac QCA98xx devices. A major difference from ath9k is that there's now a firmware and that's why we had to implement a new driver. The wiki page for the driver is: http://wireless.kernel.org/en/users/Drivers/ath10k The driver has had many authors, they are listed here alphabetically: Bartosz Markowski <bartosz.markowski@tieto.com> Janusz Dziedzic <janusz.dziedzic@tieto.com> Kalle Valo <kvalo@qca.qualcomm.com> Marek Kwaczynski <marek.kwaczynski@tieto.com> Marek Puzyniak <marek.puzyniak@tieto.com> Michal Kazior <michal.kazior@tieto.com> Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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