summaryrefslogtreecommitdiffstats
path: root/drivers/net/phy
Commit message (Collapse)AuthorAgeFilesLines
...
* | | | net: phy: micrel: add copyright entryJohan Hovold2014-11-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add myself to the list of copyright holders. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: refactor interrupt configJohan Hovold2014-11-211-42/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic interrupt-config callback and store interrupt-level bitmask in type data for PHY types not using bit 9. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: add support for clock-mode select to KSZ8081/KSZ8091Johan Hovold2014-11-211-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micrel KSZ8081 and KSZ8091 PHYs have the RMII Reference Clock Select bit, which is used to select 25 or 50 MHz clock mode. Note that on some revisions of the PHY (e.g. KSZ8081RND) the function of this bit is inverted so that setting it enables 25 rather than 50 MHz mode. Add a new device-tree property "micrel,rmii-reference-clock-select-25-mhz" to describe this. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: add generic clock-mode-select supportJohan Hovold2014-11-211-43/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic RMII-Reference-Clock-Select support. Several Micrel PHY have an RMII-Reference-Clock-Select bit to select 25 MHz or 50 MHz clock mode. Recently, support for configuring this through device tree for KSZ8021 and KSZ8031 was added. Generalise this support so that it can be configured for other PHY types as well. Note that some PHY revisions (of the same type) has this bit inverted. This should be either configurable through a new device-tree property, or preferably, determined based on PHY ID if possible. Also note that this removes support for setting 25 MHz mode from board files which was also added by the above mentioned commit 45f56cb82e45 ("net/phy: micrel: Add clock support for KSZ8021/KSZ8031"). Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: add has-broadcast-disable flag to type dataJohan Hovold2014-11-211-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add has_broadcast_disable flag to type-data and generic config_init. This allows us to remove the ksz8081 config_init callback. Note that ksz8021_config_init is kept for now due to a95a18afe4c8 ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"). Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: parse of nodes at probeJohan Hovold2014-11-211-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parse the "micrel,led-mode" property at probe, rather than at config_init time in the led-setup helper itself. Note that the bogus parent->of_node bit is removed. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | net: phy: micrel: add device-type abstractionJohan Hovold2014-11-211-13/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add structured device-type information and support for generic led-mode setup to the generic config_init callback. This is a first step in ultimately getting rid of device-type specific callbacks. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2014-11-142-14/+26
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/net/ethernet/chelsio/cxgb4vf/sge.c drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c sge.c was overlapping two changes, one to use the new __dev_alloc_page() in net-next, and one to use s->fl_pg_order in net. ixgbe_phy.c was a set of overlapping whitespace changes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | net: ptp: fix time stamp matching logic for VLAN packets.Richard Cochran2014-11-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ae5c6c6d "ptp: Classify ptp over ip over vlan packets" changed the code in two drivers that matches time stamps with PTP frames, with the goal of allowing VLAN tagged PTP packets to receive hardware time stamps. However, that commit failed to account for the VLAN header when parsing IPv4 packets. This patch fixes those two drivers to correctly match VLAN tagged IPv4/UDP PTP messages with their time stamps. This patch should also be applied to v3.17. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | net: phy: Correctly handle MII ioctl which changes autonegotiation.Brian Hill2014-11-111-12/+24
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When advertised capabilities are changed with mii-tool, such as: mii-tool -A 10baseT the existing handler has two errors. - An actual PHY register value is provided by mii-tool, and this must be mapped to internal state with mii_adv_to_ethtool_adv_t(). - The PHY state machine needs to be told that autonegotiation has again been performed. If not, the MAC will not be notified of the new link speed and duplex, resulting in a possible config mismatch. Signed-off-by: Brian Hill <Brian@houston-radar.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: bcm7xxx: add workaround for PHY revision E0 and F0Florian Fainelli2014-11-121-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | PHY revisions E0 and F0 share the same shorter workaround initialization sequence. Dedicate a special function for these two PHY revisions to perform the needed workaround sequence. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: bcm7xxx: add PHY revision D0 workaround sequenceFlorian Fainelli2014-11-121-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PHY revision D0 requires a specific workaround sequence which needs to be applied to get the HW to behave properly in all corner cases conditions. Do this based on the revision we just read out of the HW using a specific function. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: bcm7xxx: introduce r_rc_cal_reset helperFlorian Fainelli2014-11-121-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | This function performs a R/RC calibration reset and will start being used by more than one function in the next patches, create a helper function to factor code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaroundFlorian Fainelli2014-11-121-38/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm7445_config_init() was working around non-production version of the PHY HW block, so just remove it entirely. bcm7xxx_28nm_afe_config_init() was running for all PHY revisions greater than B0, but this workaround sequence is really specific to the B0 PHY revision, so rename the function accordingly and update the GPHY macro to use the generic config_init callback. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: bcm7xxx: only show PHY revision onceFlorian Fainelli2014-11-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm7xxx_28nm_config_init() can be called as frequently as needed by the PHY library upon suspend/resume cycles and interface bring up/down, just print the PHY revision once and for all in order not to spam kernel logs. Fixes: d8ebfed3f11b ("net: phy: bcm7xxx: utilize PHY revision in config_init") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: enable led-mode for KSZ8081/KSZ8091Johan Hovold2014-11-121-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable led-mode configuration for KSZ8081 and KSZ8091. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: clean up led-mode setupJohan Hovold2014-11-121-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | Clean up led-mode setup by introducing proper defines for PHY Control registers 1 and 2 and only passing the register to the setup function. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: refactor led-mode error handlingJohan Hovold2014-11-121-9/+10
| | | | | | | | | | | | | | | | | | | | | Refactor led-mode error handling. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: add led-mode sanity checkJohan Hovold2014-11-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Make sure never to update more than two bits when setting the led mode, something which could for example change the reference-clock setting. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: disable broadcast for KSZ8081/KSZ8091Johan Hovold2014-11-121-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that this can also be configured using the B-CAST_OFF pin on KSZ9091, but that KSZ8081 lacks this pin and is also limited to addresses 0 and 3. Specifically, this allows for dual KSZ8081 setups. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: refactor broadcast disableJohan Hovold2014-11-121-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor and clean up broadcast disable. Some Micrel PHYs have a broadcast-off bit in the Operation Mode Strap Override register which can be used to disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that the KSZPHY_OMSO_RMII_OVERRIDE bit is set by default on KSZ8021/8031. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: use BIT macroJohan Hovold2014-11-121-17/+17
| | | | | | | | | | | | | | | | | | | | | Use BIT macro for bitmask definitions. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: micrel: fix config_intr error handlingJohan Hovold2014-11-121-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Make sure never to update the control register with random data (an error code) by checking the return value after reading it. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: replace phy_drivers_register callsJohan Hovold2014-11-1216-218/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: replace phy_driver_register callsJohan Hovold2014-11-124-56/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace module init/exit which only calls phy_driver_register with module_phy_driver macro. Compile tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | amd-xgbe-phy: Let AMD_XGBE_PHY depend on HAS_IOMEMLendacky, Thomas2014-11-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The amd-xgbe-phy driver needs to perform ioremap calls, so add HAS_IOMEM to its build dependency. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | amd-xgbe-phy: Sync PCS and PHY modes after resetLendacky, Thomas2014-11-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to sync the states of the PCS and the PHY after a reset is performed. If the PCS and the PHY are not in the same state after reset an extra mode change would be performed. This extra mode change might not be needed if the PCS and the PHY are synced up after reset. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | net: phy: spi_ks8995: remove sysfs bin file by registered attributeVladimir Zapolskiy2014-11-041-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a sysfs binary file is asked to be removed, it is found by attribute name, so strictly speaking this change is not a fix, but just in case when attribute name is changed in the driver or sysfs internals are changed, it might be better to remove the previously created file using right the same binary attribute. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David S. Miller <davem@davemloft.net> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2014-11-011-1/+5
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/net/phy/marvell.c Simple overlapping changes in drivers/net/phy/marvell.c Signed-off-by: David S. Miller <davem@davemloft.net>
| * | net: phy: Add SGMII Configuration for Marvell 88E1145 InitializationVince Bridgers2014-10-281-0/+19
| |/ | | | | | | | | | | | | | | Marvell phy 88E1145 configuration & initialization was missing a case for initializing SGMII mode. This patch adds that case. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: Adding SGMII support for Marvell 88ee1145 driverViet Nga Dao2014-10-281-0/+19
| | | | | | | | | | | | | | | | Additional code to m88e1145_config_init function to allow the driver to support SGMII mode. Signed-off-by: Viet Nga Dao <vndao@altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | phy: marvell: Add support for 88E3016 FastEthernet PHYSebastian Hesselbarth2014-10-241-0/+46
|/ | | | | | | | | | Marvell 88E3016 is a FastEthernet PHY that also can be found in Marvell Berlin SoCs as integrated PHY. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: KSZ8031RNL RMII clock reconfiguration bugBruno Thomsen2014-10-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Bug: Unable to send and receive Ethernet packets with Micrel PHY. Affected devices: KSZ8031RNL (commercial temp) KSZ8031RNLI (industrial temp) Description: PHY device is correctly detected during probe. PHY power-up default is 25MHz crystal clock input and output 50MHz RMII clock to MAC. Reconfiguration of PHY to input 50MHz RMII clock from MAC causes PHY to become unresponsive if clock source is changed after Operation Mode Strap Override (OMSO) register setup. Cause: Long lead times on parts where clock setup match circuit design forces the usage of similar parts with wrong default setup. Solution: Swapped KSZ8031 register setup and added phy_write return code validation. Tested with Freescale i.MX28 Fast Ethernet Controler (fec). Signed-off-by: Bruno Thomsen <bth@kamstrup.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: Add clock support for KSZ8021/KSZ8031Sascha Hauer2014-10-101-2/+29
| | | | | | | | | | | The KSZ8021 and KSZ8031 support RMII reference input clocks of 25MHz and 50MHz. Both PHYs differ in the default frequency they expect after reset. If this differs from the actual input clock, then register 0x1f bit 7 must be changed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: adjust fixed_phy_register() return valuePetri Gynther2014-10-071-8/+8
| | | | | | | | | | | | | | | Adjust fixed_phy_register() to return struct phy_device *, so that it becomes easy to use fixed PHYs without device tree support: phydev = fixed_phy_register(PHY_POLL, &fixed_phy_status, NULL); fixed_phy_set_link_update(phydev, fixed_phy_link_update); phy_connect_direct(netdev, phydev, handler_fn, phy_interface); This change is a prerequisite for modifying bcmgenet driver to work without a device tree on Broadcom's MIPS-based 7xxx platforms. Signed-off-by: Petri Gynther <pgynther@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers/net/phy/Kconfig: Let MDIO_BCM_UNIMAC depend on HAS_IOMEMChen Gang2014-10-061-0/+1
| | | | | | | | | | | MDIO_BCM_UNIMAC needs HAS_IOMEM, so depend on it, the related error ( with allmodconfig under um): MODPOST 1205 modules ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined! Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: add BCM7425 and BCM7429 PHYsPetri Gynther2014-10-011-0/+28
| | | | | | Signed-off-by: Petri Gynther <pgynther@google.com> Acked-by: Florian Fainelli <f.fainelli@gmai.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2014-09-231-2/+1
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/mips/net/bpf_jit.c drivers/net/can/flexcan.c Both the flexcan and MIPS bpf_jit conflicts were cases of simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net/phy: micrel: Disable asymmetric pause for KSZ9031Mike Looijmans2014-09-151-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | The KSZ9031 appears to suffer from the same hardware bug as described for the KSZ9021 in commit 32fcafbcd1c9f6c7013016a22a5369b4acb93577 ("net/phy: micrel: Disable asymmetric pause for KSZ9021") you have to unplug the cable and plug it back to get it to work. Remove the SUPPORTED_Asym_Pause flag for the KSZ9031 to fix this. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: bcm7xxx: utilize PHY revision in config_initFlorian Fainelli2014-09-191-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GENET and SF2 drivers have been updated to communicate us what is the revision of the BCM7xxx integrated PHY, utilize that information in the config_init() callback to call into the appropriate workaround function based on our revision. While at it, we also print the revision and patch level to help debug new chips. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: bcm7xxx: do not use PHY_BRCM_100MBPS_WARFlorian Fainelli2014-09-191-2/+2
| | | | | | | | | | | | | | | | | | There is no need for the PHY driver to check PHY_BRCM_100MBPS_WAR since that is redundant with checking the PHY device supported features. Get rid of that workaround flag. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | dp83640: Make use of skb_queue_purge instead of reimplementing the codeAlexander Duyck2014-09-081-6/+2
| | | | | | | | | | | | | | | | | | This change makes it so that dp83640_remove can use skb_queue_purge instead of looping through itself to flush any entries out of the queue. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2014-09-071-9/+9
|\ \ | |/
| * phy: fix EEE checks inside the phy_init_eee.Giuseppe CAVALLARO2014-08-271-9/+9
| | | | | | | | | | | | | | | | | | | | | | According to the Std 802.3az if the EEE Adv (Reg 7.60), Link partner ability (Reg 7.61) and EEE capability (Register 3.20) bits return 0 this means no EEE is supported. So this patch fixes the checks inside the phy_init_eee function. Signed-off-by: Nandini Sharma <nandini.sharma@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: mdio-sun4i: don't select REGULATORBeniamino Galvani2014-09-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mdio-sun4i driver automatically selects REGULATOR and REGULATOR_FIXED_VOLTAGE because it uses the regulator API. But a driver selecting a subsystem increases the chance of generating circular Kconfig dependencies, especially when other drivers depend on the selected symbol. Since the regulator API functions are replaced with no-ops when REGULATOR is disabled, the driver can be built successfully even without regulator support and so those 'select' dependencies can be safely dropped. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | amd-xgbe-phy: Fix build break for missing declarationTom Lendacky2014-09-071-0/+1
| | | | | | | | | | | | | | | | | | | | A previous patch inadvertently deleted a declaration in the amd_xgbe_an_tx_training function causing the build to fail. Add the declaration for 'priv' back to the function. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net-timestamp: Make the clone operation stand-alone from phy timestampingAlexander Duyck2014-09-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The phy timestamping takes a different path than the regular timestamping does in that it will create a clone first so that the packets needing to be timestamped can be placed in a queue, or the context block could be used. In order to support these use cases I am pulling the core of the code out so it can be used in other drivers beyond just phy devices. In addition I have added a destructor named sock_efree which is meant to provide a simple way for dropping the reference to skb exceptions that aren't part of either the receive or send windows for the socket, and I have removed some duplication in spots where this destructor could be used in place of sock_edemux. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | amd-xgbe-phy: Checkpatch driver fixesLendacky, Thomas2014-09-051-4/+0
| | | | | | | | | | | | | | | | This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | amd-xgbe-phy: Enhance parallel detection to support KR speedLendacky, Thomas2014-09-051-2/+28
| | | | | | | | | | | | | | | | Add support to allow parallel detection to work in KR speed. With both speed modes of KX and KR supported, KX must be checked first. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | amd-xgbe-phy: Check device for current speed mode (KR/KX)Lendacky, Thomas2014-09-051-63/+72
| | | | | | | | | | | | | | | | | | | | | | Since device resets can change the current mode it's possible to think the device is in a different mode than it actually is. Rather than trying to determine every place that is needed to set/save the current mode, be safe and check the devices actual mode when needed rather than trying to track it. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
OpenPOWER on IntegriCloud