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path: root/drivers/net/ixgbe/ixgbe_dcb_82599.c
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* ixgbe: DCB, X540 devices do not respond to pause framesJohn Fastabend2011-04-131-2/+7
| | | | | | | | | | DCB enabled X540 devices are not responding to pause frames due to a missing register set that was added for these devices that did not exist in other devices. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, misallocated packet buffer size with X540 deviceJohn Fastabend2011-04-131-26/+42
| | | | | | | | | | | | | | | | | | The X540 device has a smaller packet buffer but the DCB configuration never took this into account. Under stress this can result in the DMA engine hanging and TX Unit hang occurring to reset the device. This patch reworks the packet buffer allocation routine used for DCB on 82599 and X540 devices to account for RX packet buffer sizes. This fixes the immediate hang. We should consolidate the various hardware specific routines for configuring features into a single routine. This will make it much harder to miss feature cases like this. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, PFC not cleared until reset occursJohn Fastabend2011-03-121-28/+26
| | | | | | | | | | | | | | | The PFC configuration is not cleared until the device is reset. This has not been a problem because setting DCB attributes forced a hardware reset. Now that we no longer require this reset to occur PFC remains configured even after being disabled until the device is reset. This removes a goto in the PFC hardware set routines for 82598 and 82599 devices that was short circuiting the clear. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: IEEE 802.1Qaz, implement priority assignment tableJohn Fastabend2011-03-121-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to use the priority assignment table in the ieee_ets structure to map priorities to traffic classes. Previously ixgbe only supported a 1:1 mapping. Now we can enable and disable hardware DCB support when multiple traffic classes are actually being used. This allows the default case all priorities mapped to traffic class 0 to work in normal hardware mode and utilize the full packet buffer. This patch does not address putting the hardware in 4TC mode so packet buffer space may be underutilized in this case. A follow up patch can address this optimization. But at least we have the hooks to do this now. Also CEE will behave as it always has and map priorities 1:1 with traffic classes. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: cleanup copyright string for 2011Don Skidmore2011-03-031-1/+1
| | | | | | | | | Updating the copyrights for 2011 as well as make the ixgbe_copyright string a constant. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, abstract out dcb_config from DCB hardware configurationJohn Fastabend2011-02-111-50/+65
| | | | | | | | | | | | | | | | | | | Currently the routines that configure the HW for DCB require a ixgbe_dcb_config structure. This structure was designed to support the CEE standard and does not match the IEEE standard well. This patch changes the HW routines in ixgbe_dcb_8259x.{ch} to use raw pfc and bandwidth values. This requires some parsing of the DCB configuration but makes the HW routines independent of the data structure that contains the DCB configuration. The primary advantage to doing this is we can do HW setup directly from the 802.1Qaz ops without having to arbitrarily encapsulate this data into the CEE structure. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB set PFC high and low water marks per data sheet specsJohn Fastabend2010-11-161-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the high and low water marks for PFC are being set conservatively for jumbo frames. This means the RX buffers are being underutilized in the default 1500 MTU. This patch fixes this so that the water marks are set as described in the data sheet considering the MTU size. The equation used is, RTT * 1.44 + MTU * 1.44 + MTU Where RTT is the round trip time and MTU is the max frame size in KB. To avoid floating point arithmetic FC_HIGH_WATER is defined ((((RTT + MTU) * 144) + 99) / 100) + MTU This changes how the hardware field fc.low_water and fc.high_water are used. With this change they are no longer storing the actual low water and high water markers but are storing the required head room in the buffer. This simplifies the logic and we do not need to account for the size of the buffer when setting the thresholds. Testing with iperf and 16 threads showed a slight uptick in throughput over a single traffic class .1-.2Gbps and a reduction in pause frames. Without the patch a 30 second run would show ~10-15 pause frames being transmitted with the patch ~2-5 are seen. Test were run back to back with 82599. Note RXPBSIZE is in KB and low and high water marks fields are also in KB. However the FCRT* registers are 32B granularity and right shifted 5 into the register, (((rx_pbsize - water_mark) * 1024) / 32) << 5 is the most explicit conversion here we simplify (rx_pbsize - water_mark) * 32 << 5 = (rx_pbsize - water_mark) << 10 This patch updates the PFC thresholds and legacy FC thresholds. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, fix TX hang occurring in stress condition with PFCJohn Fastabend2010-10-281-0/+5
| | | | | | | | | | | | | | | | The DCB credits refill quantum _must_ be greater than half the max packet size. This is needed to guarantee that TX DMA operations are not attempted during a pause state. Additionally, the min IFG must be set correctly for DCB mode. If a DMA operation is requested unexpectedly during the pause state the HW data store may be corrupted leading to a DMA hang. The DMA hang requires a reset to correct. This fixes the HW configuration to avoid this condition. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: declare functions as staticEmil Tantilov2010-10-141-6/+6
| | | | | | | | | | | | Following patch fixes warnings reported by `make namespacecheck` Reported by Stephen Hemminger CC: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: remove unused functionsEmil Tantilov2010-10-141-57/+0
| | | | | | | | | | | | | Remove functions that are declared, but not used in the driver. This patch fixes warnings reported by `make namespacecheck` Reported by Stephen Hemminger CC: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: dcb, set DPF bit when PFC is enabledJohn Fastabend2010-07-191-1/+1
| | | | | | | | | | | | | | Set the DPF bit when PFC is enabled. This will discard PFC frames so they do not get passed up the stack. The DPF bit is set for flow control, but not priority flow control this brings pfc inline with fc. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: update copyright datesShannon Nelson2010-01-131-1/+1
| | | | | | Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Properly disable DCB arbiters prior to applying changesPeter P Waskiewicz Jr2009-09-011-7/+14
| | | | | | | | | | | | When disabling the Rx and Tx data arbiters prior to configuration changes, the arbiters were not being shut down properly. This can create a race in the DCB hardware blocks, and potentially hang the arbiters. Also, the Tx descriptor arbiter shouldn't be disabled when applying configuration changes; disabling this arbiter can cause a Tx hang. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Fix 82599 adapter link flickering issuesMallikarjuna R Chilakala2009-06-071-1/+1
| | | | | | | | | | Fix autoneg restart issues in flow control path which might create endless link flickering due to known timing issues with 82599 adapters. Signed-off-by: Mallikarjuna R Chilakala <mallikarjuna.chilakakla@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Fix the DCB PFC thresholds for 82599PJ Waskiewicz2009-04-171-11/+17
| | | | | | | | | The thresholds for the DCB priority flow control are incorrect for 82599. This fixes the thresholds to be correct. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Allow Priority Flow Control settings to survive a device resetPJ Waskiewicz2009-03-261-3/+0
| | | | | | | | | | | When changing DCB parameters, ixgbe needs to have the MAC reset. The way the flow control code is setup today, PFC will be disabled on a reset. This patch adds a new flow control type for PFC, and then has the netlink layer take care of toggling which type of flow control to enable. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Fix some compiler warnings.David S. Miller2009-03-011-2/+0
| | | | | | | | 'pap' is never used in ixgbe_dcb_hw_config_82599() and 'eec' in ixgbe_acquire_eeptom() is only used when status == 0 but GCC has some trouble seeing that. Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: Add DCB for 82599, remove BCN supportPJ Waskiewicz2009-03-011-0/+472
This patch adds the DCB (Data Center Bridging) support for 82599 hardware. This is similar to how the 82598 DCB code works. This patch also removes the BCN (Backwards Congestion Notification) netlink configuration code from the driver. BCN was a pre-standard congestion notification framework, and was not what the IEEE body decided upon for standard congestion management. QCN (802.1Qau), Quantized Congestion Notification is the accepted standard, which is not supported by 82599, hence we remove the support altogether. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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