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* Merge commit 'origin'Benjamin Herrenschmidt2008-10-153-4/+4
|\ | | | | | | | | | | Manual fixup of conflicts on: arch/powerpc/include/asm/dcr-regs.h drivers/net/ibm_newemac/core.h
| * ibm_newemac: Fix EMAC soft reset on 460EX/GTVictor Gallardo2008-10-082-0/+23
| | | | | | | | | | | | | | | | This patch fixes EMAC soft reset on 460EX/GT when no external clock is available. Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * netdev: drop CONFIG_PPC_MERGE from KconfigKumar Gala2008-09-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that arch/ppc is dead CONFIG_PPC_MERGE is always defined for all powerpc platforms so we don't need to depend on it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * drivers/net: replace __FUNCTION__ with __func__Harvey Harrison2008-09-241-1/+1
| | | | | | | | | | | | | | | | __FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * ibm_newemac: MAL[12]_IER_EVENTS definition: 2x *_OTE -> *_DEroel kluin2008-09-031-2/+2
| | | | | | | | | | | | | | | | MAL[12]_IER_EVENTS definitions have MAL_IER_OTE twice but lack MAL_IER_DE Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | ibm_newemac: Add support for GPCS, SGMII and M88E1112 PHYVictor Gallardo2008-10-024-9/+143
| | | | | | | | | | | | | | | | | | | | Add support for the phy types found on the Arches and other PowerPC 460 based boards. Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | ibm_newemac: MAL support for PowerPC 405EZJosh Boyer2008-09-301-5/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PowerPC 405EZ SoC has some differences in the interrupt layout and handling for the MAL. The SERR, TXDE, and RXDE interrupts are OR'd into a single interrupt. Also, due to the possibility for interrupt coalescing, the TXEOB and RXEOB interrupts require an interrupt bit to be cleared in the ICINTSTAT SDR. This sets the proper MAL feature bits for 405EZ boards, and adds a common shared handler for SERR, TXDE, and RXDE. The defines for the ICINTSTAT DCR are added to the proper header file as well. This has been adapted from code originally written by Stefan Roese. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | ibm_newemac: Introduce mal_has_featureJosh Boyer2008-09-302-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some PowerPC SoCs that do odd things with the MAL handling. In order to accommodate them, we need to introduce a feature mechanism that is similar to the existing emac_has_feature function. This adds a feature variable to the mal_instance structure, and adds a mal_has_feature function. Two features are defined and are guarded by Kconfig options that are selected by the affected platforms. MAL_FTR_CLEAR_ICINSTAT is used for platforms that need to clear the interrupt bits in the ICINTSTAT SDR for txeob/rxeob. This is common on MAL implementations that have interrupt coalescing. MAL_FTR_COMMON_ERR_INT is used for platforms that have SERR, TXDE, and RXDE OR'd into a single interrupt bit. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | ibm_newemac: Allow the "no flow control" EMAC feature to workJosh Boyer2008-09-303-0/+9
|/ | | | | | | | | | | | | | | Some PowerPC 40x chips have errata that force us not to use the integrated flow control. We have the feature defined, but it currently can't be used because it is never added to EMAC_FTRS_POSSIBLE. This adds a Kconfig option for affected platforms to select and puts the feature in the EMAC_FTRS_POSSIBLE list. This is set for PowerPC 405EZ platforms as well. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* ibm_newemac: Don't call dev_mc_add() before device is registeredBenjamin Herrenschmidt2008-08-271-3/+3
| | | | | | | | | | We must not call dev_mc_add() from within our HW configure which happens before we initialize and register the netdev. Do it in open() instead. Thanks to Sebastian Siewior for tracking it down. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* Merge branch 'master' of ↵David S. Miller2008-07-185-66/+239
|\ | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 Conflicts: Documentation/powerpc/booting-without-of.txt drivers/atm/Makefile drivers/net/fs_enet/fs_enet-main.c drivers/pci/pci-acpi.c net/8021q/vlan.c net/iucv/iucv.c
| * ibm_newemac: Add MII mode support to the EMAC RGMII bridge.Grant Erickson2008-07-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to the RGMII handler in the EMAC driver for the MII PHY mode such that device tree entries of the form `phy-mode = "mii";' are recognized and handled appropriately. While logically, in software, "gmii" and "mii" modes are the same, they are wired differently, so it makes sense to allow DTS authors to specify each explicitly. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * Merge commit 'origin/HEAD' into test-mergeBenjamin Herrenschmidt2008-07-141-0/+8
| |\ | | | | | | Manual fixup of include/asm-powerpc/pgtable-ppc64.h
| * | ibm_newemac: Parameterize EMAC Multicast Match HandlingGrant Erickson2008-07-094-65/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various instances of the EMAC core have varying: 1) number of address match slots, 2) width of the registers for handling address match slots, 3) number of registers for handling address match slots and 4) base offset for those registers. As the driver stands today, it assumes that all EMACs have 4 IAHT and GAHT 32-bit registers, starting at offset 0x30 from the register base, with only 16-bits of each used for a total of 64 match slots. The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4 core. This core has 8 IAHT and GAHT registers, starting at offset 0x80 from the register base, with ALL 32-bits of each used for a total of 256 match slots. This adds a new compatible device tree entry "emac4sync" and a new, related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros and inlines which supply the appropriate parameterized value based on the presence or absence of the EMAC4SYNC feature. The code has further been reworked where appropriate to use those macros and inlines. In addition, the register size passed to ioremap is now taken from the device tree: c4 for EMAC4SYNC cores 74 for EMAC4 cores 70 for EMAC cores rather than sizeof (emac_regs). Finally, the device trees have been updated with the appropriate compatible entries and resource sizes. This has been tested on an AMCC Haleakala board such that: 1) inbound ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11 and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from 'haleakala.local' to those same systems in the '.local' domain via MDNS now work. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | drivers/net: Use linux/of_{device,platform}.h instead of asmStephen Rothwell2008-06-301-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | | netdev: Add netdev->addr_list_lock protection.David S. Miller2008-07-151-0/+4
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | Add netif_addr_{lock,unlock}{,_bh}() helpers. Use them to protect operations that operate on or read the network device unicast and multicast address lists. Also use them in cases where the code simply wants to block calls into the driver's ->set_rx_mode() and ->set_multicast_list() methods. Signed-off-by: David S. Miller <davem@davemloft.net>
* | ibm_newemac: Fixes entry of short packetsSathya Narayanan2008-07-041-0/+6
| | | | | | | | | | | | | | | | | | | | Short packets has to be discarded by the driver. So this patch addresses the issue of discarding the short packets of size lesser then ethernet header size. Signed-off-by: Sathya Narayanan <sathyan@teamf1.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | ibm_newemac: Fixes kernel crashes when speed of cable connected changesSathya Narayanan2008-07-041-0/+2
|/ | | | | | | | | | | The descriptor pointers were not initialized to NIL values, so it was poiniting to some random addresses which was completely invalid. This fix takes care of initializing the descriptor to NIL values and clearing the valid descriptors on clean ring operation. Signed-off-by: Sathya Narayanan <sathyan@teamf1.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: select CRC32 in KconfigJosh Boyer2008-06-171-0/+1
| | | | | | | | | | | | | | | | | The ibm_newemac driver requires ether_crc to be defined. Apparently it is possible to generate a .config without CONFIG_CRC32 set which causes the following link errors if IBM_NEW_EMAC is selected: LD .tmp_vmlinux1 drivers/built-in.o: In function `emac_hash_mc': core.c:(.text+0x2f524): undefined reference to `crc32_le' core.c:(.text+0x2f528): undefined reference to `bitrev32' make: *** [.tmp_vmlinux1] Error 1 This patch has IBM_NEW_EMAC select CRC32 so we don't hit this error. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: Increase MDIO timeoutsBenjamin Herrenschmidt2008-04-251-4/+4
| | | | | | | | This patch doubles the MDIO timeouts in EMAC as there are field cases where they are two short to communicate with some PHYs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaroundValentine Barshak2008-04-252-2/+47
| | | | | | | | | | | | | | | | This patch adds ibm_newemac PHY clock workaround for 440EP/440GR EMAC attached to a PHY which doesn't generate RX clock if there is no link. The code is based on the previous ibm_emac driver stuff. The 440EP/440GR allows controlling each EMAC clock separately as opposed to global clock selection for 440GX. BenH: Made that #ifdef CONFIG_PPC_DCR_NATIVE for now as dcri_* stuff doesn't exist for MMIO type DCRs like Cell. Some future rework & improvements of the DCR infrastructure will make that cleaner but for now, this makes it work. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: PowerPC 440GX EMAC PHY clock workaroundValentine Barshak2008-04-252-3/+23
| | | | | | | | | | | | | | | | | | | The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error) if there's no link. Because of that it fails to find PHY chip. The older ibm_emac driver had a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros, which toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch does the same for "ibm,emac-440gx" compatible chips. The workaround forces clock on -all- EMACs, so we select clock under global emac_phy_map_lock. BenH: Made that #ifdef CONFIG_PPC_DCR_NATIVE for now as dcri_* stuff doesn't exist for MMIO type DCRs like Cell. Some future rework & improvements of the DCR infrastructure will make that cleaner but for now, this makes it work. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac Use status property for unused/unwired EMACsJosh Boyer2008-04-251-2/+5
| | | | | | | | | | | Convert ibm_newemac to use the of_device_is_available function when checking for unused/unwired EMACs. We leave the current check for an "unused" property to maintain backwards compatibility for older device trees. Newer device trees should simply use the standard "status" property in the EMAC node. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: Fix section mismatch warningsJosh Boyer2008-04-255-6/+6
| | | | | | | | | | | | | This patch fixes several section mismatch warnings in the ibm_newemac driver similar to: WARNING: vmlinux.o(.devinit.text+0x3a04): Section mismatch in reference from the function emac_probe() to the function .devexit.text:tah_detach() The function __devinit emac_probe() references a function __devexit tah_detach(). Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: Add support for 460EX/GT-type MAL rx-channel handlingStefan Roese2008-04-251-0/+16
| | | | | | | | | | On some 4xx PPC's (e.g. 460EX/GT), the rx channel number is a multiple of 8 (e.g. 8 for EMAC1, 16 for EMAC2), but enabling in MAL_RXCASR needs the divided by 8 value for the bitmask. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: Fix problem with jumbo frame support and EMAC V4.patchStefan Roese2008-04-251-1/+4
| | | | | | | | | | | This fixes the jumbo frame support on EMAC V4 systems. Now the correct bit is set depending on the EMAC version configured. Tested on Kilauea (405EX) and Canyonlands (460EX). Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ibm_newemac: emac_tx_csum typo fixValentine Barshak2008-03-281-2/+2
| | | | | | | | Move the "&& skb->ip_summed == CHECKSUM_PARTIAL" part out of emac_has_feature parameters. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* NEWEMAC: Add compatible "ibm,tah" to tah matching tableStefan Roese2008-03-171-0/+4
| | | | | | | | | Add "ibm,tah" to the compatible matching table of the ibm_newemac tah driver. The type "tah" is still preserved for compatibility reasons. New dts files should use the compatible property though. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* NEWEMAC: fix support for pause packetsPravin M. Bathija2008-03-171-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Problem Description and Fix --------------------------- When a pause packet(with destination as reserved Multicast address) is received by the EMAC hardware to control the flow of frames being transmitted by it, it is dropped by the hardware unless the reserved Multicast address is hashed in to the GAHT[1-4] registers. This code fix adds the default reserved multicast address to the GAHT[1-4] registers in the EMAC(s) present on the chip. The flow control with Pause packets will only work if the following register bits are programmed in EMAC: EMACx_MR1[APP] = 1 EMACx_RMR[BAE] = 1 EMACx_RMR[MAE] = 1 Behavior that may be observed in a running system ------------------------------------------------- A host transferring data from a PPC based system may send a Pause packet to the PPC EMAC requesting it to slow down the flow of packets. If the default reserved multicast MAC address is not programmed into the GAHT[1-4] registers this Pause packet will be dropped by PPC EMAC and no Flow Control will be done. Signed-off-by: Pravin M. Bathija <pbathija@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [POWERPC] net: NEWEMAC: Remove "rgmii-interface" from rgmii matching tableStefan Roese2008-02-151-1/+0
| | | | | | | | | | | With the removal the the "rgmii-interface" device_type property from the dts files, the newemac driver needs an update to only rely on compatible property. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* Merge branch 'linux-2.6'Paul Mackerras2008-01-311-10/+4
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| * net: NEWEMAC: Fix problem with mtu > 4080 on non TAH equipped 4xx PPC'sStefan Roese2008-01-281-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, all non TAH equipped 4xx PPC's call emac_start_xmit() upon xmit. This routine doesn't check if the frame length exceeds the max. MAL buffer size. This patch now changes the driver to call emac_start_xmit_sg() on all GigE platforms and not only the TAH equipped ones (440GX). This enables an MTU of 9000 instead 4080. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* | [POWERPC] Add of_find_matching_node() helper functionGrant Likely2008-01-171-0/+1
|/ | | | | | | | | | | | | | Similar to of_find_compatible_node(), of_find_matching_node() and for_each_matching_node() allow you to iterate over the device tree looking for specific nodes, except that they take of_device_id tables instead of strings. This also moves of_match_node() from driver/of/device.c to driver/of/base.c to colocate it with the of_find_matching_node which depends on it. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Net: ibm_newemac, remove SPIN_LOCK_UNLOCKEDJiri Slaby2007-12-141-1/+1
| | | | | | | | | SPIN_LOCK_UNLOCKED is deprecated, use DEFINE_SPINLOCK instead Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Update file headers copyright noticesBenjamin Herrenschmidt2007-12-0715-0/+75
| | | | | | | | This updates the copyright notices of the new EMAC driver to avoid confusion as who is to be blamed for new bugs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Call dev_set_drvdata() before tah_reset()Valentine Barshak2007-12-071-1/+2
| | | | | | | | | The patch moves dev_set_drvdata(&ofdev->dev, dev) up before tah_reset(ofdev) is called to avoid a NULL pointer dereference, since tah_reset uses drvdata. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Fix typo reading TAH channel infoValentine Barshak2007-12-071-1/+1
| | | | | | | | | This patch fixes a typo in ibm_newemac/core.c (tah_port should be used instead of tah_ph) Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Correct opb_bus_freq valueValentine Barshak2007-12-071-1/+1
| | | | | | | | | The EMAC4_MR1_OBCI(freq) macro expects freg in MHz, while opb_bus_freq is kept in Hz. Correct this. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Skip EMACs that are marked unused by the firmwareHugh Blemings2007-12-071-0/+4
| | | | | | | | | | | Depending on how the 44x processors are wired, some EMAC cells might not be useable (and not connected to a PHY). However, some device-trees may choose to still expose them (since their registers are present in the MMIO space) but with an "unused" property in them. Signed-off-by: Hugh Blemings <hugh@blemings.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Cleanup/fix support for STACR register variantsBenjamin Herrenschmidt2007-12-072-13/+16
| | | | | | | | | | There are a few variants of the STACR register that affect more than just the "AXON" version of EMAC. Replace the current test of various chip models with tests for generic properties in the device-tree. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Cleanup/Fix RGMII MDIO support detectionBenjamin Herrenschmidt2007-12-072-11/+14
| | | | | | | | | | More than just "AXON" version of EMAC RGMII supports MDIO, so replace the current test with a generic property in the device-tree that indicates such support. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Workaround reset timeout when no linkBenjamin Herrenschmidt2007-12-071-6/+14
| | | | | | | | | | | | | | | | With some PHYs, when the link goes away, the EMAC reset fails due to the loss of the RX clock I believe. The old EMAC driver worked around that using some internal chip-specific clock force bits that are different on various 44x implementations. This is an attempt at doing it differently, by avoiding the reset when there is no link, but forcing loopback mode instead. It seems to work on my Taishan 440GX based board so far. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Fix ZMII refcounting bugBenjamin Herrenschmidt2007-12-071-1/+3
| | | | | | | | | | When using ZMII for MDIO only (such as 440GX with RGMII for data and ZMII for MDIO), the ZMII code would fail to properly refcount, thus triggering a BUG_ON(). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Add ET1011c PHY supportStefan Roese2007-12-071-0/+37
| | | | | | | | | This adds support for the Agere ET1011c PHY as found on the AMCC Taishan board. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Add BCM5248 and Marvell 88E1111 PHY supportStefan Roese2007-12-071-0/+39
| | | | | | | | | | | This patch adds BCM5248 and Marvell 88E1111 PHY support to NEW EMAC driver. These PHY chips are used on PowerPC 440EPx boards. The PHY code is based on the previous work by Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ibm_newemac: Fix possible lockup on closeBenjamin Herrenschmidt2007-11-232-11/+21
| | | | | | | | | | | It's a bad idea to call flush_scheduled_work from within a netdev->stop because the linkwatch will occasionally take the rtnl lock from a workqueue context, and thus that can deadlock. This reworks things a bit in that area to avoid the problem. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* fix EMAC driver for proper napi_synchronize APIBenjamin Herrenschmidt2007-10-171-1/+1
| | | | | | | | | The EMAC driver "fix" was merged by mistake before the dust had settled on the new napi synchronize interface (and before it got merged). The final version of that function is spelled without underscores. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* net: Fix new EMAC driver for NAPI changesBenjamin Herrenschmidt2007-10-161-8/+17
| | | | | | | | | | | | | | net: Fix new EMAC driver for NAPI changes This fixes the new EMAC driver for the NAPI updates. The previous patch by Roland Dreier (already applied) to do that doesn't actually work. This applies on top of it makes it work on my test Ebony machine. This patch depends on "net: Add __napi_sycnhronize() to sync with napi poll" posted previously. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Use dcr_host_t.base in dcr_unmap()Michael Ellerman2007-10-151-1/+1
| | | | | | | | | With the base stored in dcr_host_t, there's no need for callers to pass the dcr_n into dcr_unmap(). In fact this removes the possibility of them passing the incorrect value, which would then be iounmap()'ed. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Add dcr_host_t.base in dcr_read()/dcr_write()Michael Ellerman2007-10-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we can save them the trouble and do it in dcr_read()/dcr_write(). As some background to why we just went through all this jiggery-pokery, benh sayeth: Initially the goal of the dcr_read/dcr_write routines was to operate like mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx hardware, indirect DCR access is a pain (goes through a table of instructions) and it's useful to have the compiler resolve an absolute DCR inline. We decided that wasn't worth the API bastardisation since most places where absolute DCR values are used are low level 4xx-only code which may as well continue using mfdcr/mtdcr, while the new API is designed for device "instances" that can exist on 4xx and Axon type platforms and may be located at variable DCR offsets. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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