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path: root/drivers/net/ethernet/marvell/mvpp2.c
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* net: mvpp2: Split the PPv2 driver to a dedicated directoryMaxime Chevallier2018-06-011-9159/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As the mvpp2 driver is growing, move this driver to a dedicated directory and split it into several files. Since this driver has a lot of register defines and structure definitions, it can benefit from having all of this into a dedicated header file, named mvpp2.h. A good chunk of the mvpp2 code is dedicated to Header Parser handling, so we introduce mvpp2_prs.h where all Header Parser definitions are located, and mvpp2_prs.c containing the related code. In the same way, mvpp2_cls.h and mvpp2_cls.c are created to contain Classifier and RSS related code. The former 'mvpp2.c' file is renamed 'mvpp2_main.c' so that we can keep the driver binary named 'mvpp2'. This commit is only about spliting the driver into multiple files and doesn't introduce any new function, feature or fix besides removing 'static' keywords when needed. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Add missing VLAN tag detectionMaxime Chevallier2018-05-191-0/+3
| | | | | | | | | | | | | | | Marvell PPv2 Header Parser sets some bits in the 'result_info' field in each lookup iteration, to identify different packet attributes such as DSA / VLAN tag, protocol infos, etc. This is used in further classification stages in the controller. It's the DSA tag detection entry that is in charge of detecting when there is a single VLAN tag. This commits adds the missing update of the result_info in this case. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: typo and cosmetic fixesAntoine Tenart2018-05-181-8/+4
| | | | | | | | | | This patch on the Marvell PPv2 driver is only cosmetic. Two typos are removed as well as other cosmetic fixes, such as extra new lines or tabs vs spaces. Suggested-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: print rx error with rate-limitYan Markman2018-05-171-6/+8
| | | | | | | | | | Prevent flood of RX error prints during heavy traffic with weak signal in link by checking net_ratelimit() before using netdev_err(). Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: small rework, commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: set mac address does not require the stop/start sequenceYan Markman2018-05-171-31/+7
| | | | | | | | | | | | Remove special stop/start handling from the set_mac_address callback. All this special care is not needed, and can be removed. It also simplifies the up/down status in the driver and helps avoiding possible link status mismatch issues. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: avoid checking for free aggregated descriptors twiceYan Markman2018-05-171-4/+3
| | | | | | | | | | Avoid repeating the check for free aggregated descriptors when it already failed at the beginning of the function. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: 2500baseX supportAntoine Tenart2018-05-171-12/+39
| | | | | | | | | This patch adds the 2500Base-X PHY mode support in the Marvell PPv2 driver. 2500Base-X is quite close to 1000Base-X and SGMII modes and uses nearly the same code path. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: 1000baseX supportAntoine Tenart2018-05-171-21/+51
| | | | | | | | | This patch adds the 1000Base-X PHY mode support in the Marvell PPv2 driver. 1000Base-X is quite close the SGMII and uses nearly the same code path. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: phylink supportAntoine Tenart2018-05-171-338/+508
| | | | | | | | | | | | | | | | | | Convert the PPv2 driver to implement phylink helpers, and use phylink in DT mode. The other mode supported is ACPI, which will need further work in order to be entirely compatible with phylink. The MAC and GoP configuration functions were completely moved to fit into the phylink helpers. When a PHY is always present between the MAC and the physical port, phylink only is used, but when this is not the case (the MAC directly is connected to the physical port) the link IRQ is used to detect changes in the link state and call phylink_mac_change. The ACPI mode do not uses phylink as of now, and the changes shouldn't impact its use. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: align the ethtool ops definitionAntoine Tenart2018-05-171-12/+12
| | | | | | | | Cosmetic patch to align the ethtool functions to ops definitions. This patch does not change in any way the driver's behaviour. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Fix clock resource by adding missing mg_core_clkMaxime Chevallier2018-04-271-2/+17
| | | | | | | | | | | | Marvell's PPv2.2 IP needs an additional clock named "MG Core clock". This is required on Armada 7K and 8K. This commit adds the required clock in mvpp2, making sure it's only used on PPv2.2. Fixes: c7e92def1ef4 ("clk: mvebu: cp110: Fix clock tree representation") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Fix clk error path in mvpp2_probeMaxime Chevallier2018-04-271-7/+8
| | | | | | | | | | | When clk_prepare_enable fails for the axi_clk, the mg_clk isn't properly cleaned up. Add another jump label to handle that case, and make sure we jump to it in the later error cases. Fixes: 4792ea04bcd0 ("net: mvpp2: Fix clock resource by adding an optional bus clock") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Fix DMA address mask sizeMaxime Chevallier2018-04-191-5/+7
| | | | | | | | | | | PPv2 TX/RX descriptors uses 40bits DMA addresses, but 41 bits masks were used (GENMASK_ULL(40, 0)). This commit fixes that by using the correct mask. Fixes: e7c5359f2eed ("net: mvpp2: introduce PPv2.2 HW descriptors and adapt accessors") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Fix TCAM filter reserved rangeMaxime Chevallier2018-04-161-1/+1
| | | | | | | | | | | | | | | | | | | Marvell's PPv2 controller has a Packet Header parser, which uses a fixed-size TCAM array of filter entries. The mvpp2 driver reserves some ranges among the 256 TCAM entries to perform MAC and VID filtering. The rest of the TCAM ids are freely usable for other features, such as IPv4 proto matching. This commit fixes the MVPP2_PE_LAST_FREE_TID define that sets the end of the "free range", which included the MAC range. This could therefore allow some other features to use entries dedicated to MAC filtering, lowering the number of unicast/multicast addresses that could be allowed before switching to promiscuous mode. Fixes: 10fea26ce2aa ("net: mvpp2: Add support for unicast filtering") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Fix parser entry init boundary checkMaxime Chevallier2018-04-051-1/+1
| | | | | | | | | | Boundary check in mvpp2_prs_init_from_hw must be done according to the passed "tid" parameter, not the mvpp2_prs_entry index, which is not yet initialized at the time of the check. Fixes: 47e0e14eb1a6 ("net: mvpp2: Make mvpp2_prs_hw_read a parser entry init function") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Use relaxed I/O in data pathYan Markman2018-03-271-13/+30
| | | | | | | | | | | Use relaxed I/O on the hot path. This achieves significant performance improvements. On a 10G link, this makes a basic iperf TCP test go from an average of 4.5 Gbits/sec to about 9.40 Gbits/sec. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Maxime: Commit message, cosmetic changes] Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Don't use dynamic allocs for local variablesMaxime Chevallier2018-03-271-161/+125
| | | | | | | | | | | | | | | | | | | | | Some helper functions that search for given entries in the TCAM filter on PPv2 controller make use of dynamically alloced temporary variables, allocated with GFP_KERNEL. These functions can be called in atomic context, and dynamic alloc is not really needed in these cases anyways. This commit gets rid of dynamic allocs and use stack allocation in the following functions, and where they're used : - mvpp2_prs_flow_find - mvpp2_prs_vlan_find - mvpp2_prs_double_vlan_find - mvpp2_prs_mac_da_range_find For all these functions, instead of returning an temporary object representing the TCAM entry, we simply return the TCAM id that matches the requested entry. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Make mvpp2_prs_hw_read a parser entry init functionMaxime Chevallier2018-03-271-29/+19
| | | | | | | | | | | | | | | | The mvpp2_prs_hw_read function uses the 'index' field of the struct mvpp2_prs_entry to initialize the rest of the fields. This makes it unclear from a caller's perspective, who needs to manipulate a struct that is not entirely initialized. This commit makes it an init function for prs_entry, by passing it the index as a parameter. The function now zeroes the entry, and sets the index field before doing all other init from HW. The function is renamed 'mvpp2_prs_init_from_hw' to make that clear. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: use correct index on array mvpp2_poolsColin Ian King2018-03-221-1/+1
| | | | | | | | | | | | Array mvpp2_pools is being indexed by long_log_pool, however this looks like a cut-n-paste bug and in fact should be short_log_pool. Detected by CoverityScan, CID#1466113 ("Copy-paste error") Fixes: 576193f2d579 ("net: mvpp2: jumbo frames support") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Add support for unicast filteringMaxime Chevallier2018-03-071-135/+161
| | | | | | | | | | | | | | | | | | | | Marvell PPv2 controller can be used to implement packet filtering based on the destination MAC address. This is already used to implement multicast filtering. This patch adds support for Unicast filtering. Filtering is based on so-called "TCAM entries" to implement filtering. Due to their limited number and the fact that these are also used for other purposes, we reserve 80 entries for both unicast and multicast filters. On top of the broadcast address, and each interface's own MAC address, we reserve 25 entries per port, 4 for unicast filters, 21 for multicast. Whenever unicast or multicast range for one port is full, the filtering is disabled and port goes into promiscuous mode for the given type of addresses. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Simplify MAC filtering function parametersMaxime Chevallier2018-03-071-15/+15
| | | | | | | | | | | | | | The mvpp2_prs_mac_da_accept function takes into parameter both the struct representing the controller and the port id. This is meaningful when we want to create TCAM entries for non-initialized ports, but in this case we expect the port to be initialized before starting adding or removing MAC addresses to the per-port filter. This commit changes the function so that it takes struct mvpp2_port as a parameter instead. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: mvpp2_check_hw_buf_num() can be statickbuild test robot2018-03-071-1/+1
| | | | | | Fixes: effbf5f58d64 ("net: mvpp2: update the BM buffer free/destroy logic") Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: jumbo frames supportStefan Chulski2018-03-051-23/+75
| | | | | | | | | | | | | This patch adds the support for jumbo frames in the Marvell PPv2 driver. A third buffer pool is added with 10KB buffers, which is used if the MTU is higher than 1518B for packets larger than 1518B. Please note only the port 0 supports hardware checksum offload due to the Tx FIFO size limitation. Signed-off-by: Stefan Chulski <stefanc@marvell.com> [Antoine: cosmetic cleanup, commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: enable UDP/TCP checksum over IPv6Antoine Tenart2018-03-051-1/+2
| | | | | | | | | | This patch adds the NETIF_F_IPV6_CSUM to the driver's features to enable UDP/TCP checksum over IPv6. No extra configuration of the engine is needed on top of the IPv4 counterpart, which already is in the features list (NETIF_F_IP_CSUM). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: use a data size of 10kB for Tx FIFO on port 0Yan Markman2018-03-051-5/+22
| | | | | | | | | | | | This patch sets the Tx FIFO data size on port 0 to 10kB. This prepares the PPv2 driver for the Jumbo frame support addition as the hardware will need big enough Tx FIFO buffers when dealing with frames going through an interface with an MTU of 9000. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message, small reworks.] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: update the BM buffer free/destroy logicStefan Chulski2018-03-051-7/+38
| | | | | | | | | | | | The buffer free routine is updated to release only given a number of buffers, and the destroy routine now checks the actual number of buffers in the (BPPI and BPPE) HW counters before draining the pools. This change helps getting jumbo frames support. Signed-off-by: Stefan Chulski <stefanc@marvell.com> [Antoine: cosmetic cleanup, commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: use the same buffer pool for all portsStefan Chulski2018-03-051-39/+37
| | | | | | | | | | | This patch configures the buffer manager long pool for all ports part of the same CP. Long pool separation between ports is redundant since there are no performance improvement when different pools are used. Signed-off-by: Stefan Chulski <stefanc@marvell.com> [Antoine: cosmetic cleanup, commit message] Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Add hardware offloading for VLAN filteringMaxime Chevallier2018-02-281-34/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell PPv2 controller allows for generic packet filtering. This commit adds entries to implement VLAN filtering. The approach taken is : - Filter entries that would match on the presence of the VLAN tag (existing VLAN detection, DSA / EDSA detection) will set the next lookup ID to be for the VID. - For each VLAN existing on a given port, we add an entry that matches this specific VID. If the incoming packet matches the VID entry, it is set for the next lookup in the chain (LU_L2). - A Guard entry is added for each port, that will match if the incoming packet didn't match any of the above VID entries. This entry tags the packet to be dropped. Due to this design, and the fact that the total 256 filter entries are also used for other purposes, we have a limit of 10 VLANs per port. To accommodate the case where we would need more VLANS on one port, this patch implements the ndo_set_features to allow for disabling of VLAN filtering using ethtool. The default config has VLAN filtering disabled. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mvpp2: fix multicast address filterMikulas Patocka2018-02-111-3/+8
| | | | | | | | | | | | | | | | | | IPv6 doesn't work on the MacchiatoBIN board. It is caused by broken multicast address filter in the mvpp2 driver. The driver loads doesn't load any multicast entries if "allmulti" is not set. This condition should be reversed. The condition !netdev_mc_empty(dev) is useless (because netdev_for_each_mc_addr is nop if the list is empty). This patch also fixes a possible overflow of the multicast list - if mvpp2_prs_mac_da_accept fails, we set the allmulti flag and retry. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: enable ACPI support in the driverMarcin Wojtas2018-01-221-39/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces an alternative way of obtaining resources - via ACPI tables provided by firmware. Enabling coexistence with the DT support, in addition to the OF_*->device_*/fwnode_* API replacement, required following steps to be taken: * Add mvpp2_acpi_match table * Omit clock configuration and obtain tclk from the property - in ACPI world, the firmware is responsible for clock maintenance. * Disable comphy and syscon handling as they are not available for ACPI. * Modify way of obtaining interrupts - use newly introduced fwnode_irq_get() routine * Until proper MDIO bus and PHY handling with ACPI is established in the kernel, use only link interrupts feature in the driver. For the RGMII port it results in depending on GMAC settings done during firmware stage. * When booting with ACPI MVPP2_QDIST_MULTI_MODE is picked by default, as there is no need to keep any kind of the backward compatibility. Moreover, a memory region used by mvmdio driver is usually placed in the middle of the address space of the PP2 network controller. The MDIO base address is obtained without requesting memory region (by devm_ioremap() call) in mvmdio.c, later overlapping resources are requested by the network driver, which is responsible for avoiding a concurrent access. In case the MDIO memory region is declared in the ACPI, it can already appear as 'in-use' in the OS. Because it is overlapped by second region of the network controller, make sure it is released, before requesting it again. The care is taken by mvpp2 driver to avoid concurrent access to this memory region. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: use device_*/fwnode_* APIs instead of of_*Marcin Wojtas2018-01-221-21/+24
| | | | | | | | | | | | | OF functions can be used only for the driver using DT. As a preparation for introducing ACPI support in mvpp2 driver, use struct fwnode_handle in order to obtain properties from the hardware description. This patch replaces of_* function with device_*/fwnode_* where possible in the mvpp2. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: simplify maintaining enabled ports' listMarcin Wojtas2018-01-221-21/+11
| | | | | | | | | | | | | | | 'port_count' field of the mvpp2 structure holds an overall amount of available ports, based on DT nodes status. In order to be prepared to support other HW description, obtain the value by incrementing it upon each successful port initialization. This allowed for simplifying port indexing in the controller's private array, whose size is now not dynamically allocated, but fixed to MVPP2_MAX_PORTS. This patch simplifies creating and filling list of enabled ports and is a part of the preparation for adding ACPI support in the mvpp2 driver. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: adjust the coalescing parametersAntoine Tenart2017-12-131-2/+2
| | | | | | | | | This patch adjust the coalescing parameters to the vendor recommendations for the PPv2 network controller. Suggested-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: report the tx-usec coalescing information to ethtoolAntoine Tenart2017-12-131-0/+1
| | | | | | | | | This patch adds the tx-usec value to the informations reported to ethtool by the get_coalesce function. Suggested-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: align values in ethtool get_coalesceAntoine Tenart2017-12-131-3/+3
| | | | | | | | Cosmetic patch aligning values in the ethtool get_coalesce function. This patch do not modify in anyway the driver's behaviour. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: split the max ring size from the default oneYan Markman2017-12-131-11/+13
| | | | | | | | | | | The Rx/Tx ring sizes can be adjusted thanks to ethtool given specific network needs. This commit splits the default ring size from its max value to allow ethtool to vary the parameters in both ways. Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message] Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: only free the TSO header buffers when it was allocatedAntoine Tenart2017-12-131-4/+8
| | | | | | | | This patch adds a check to only free the TSO header buffer when its allocation previously succeeded. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix the RSS table entry offsetAntoine Tenart2017-12-081-1/+1
| | | | | | | | | | The macro used to access or set an RSS table entry was using an offset of 8, while it should use an offset of 0. This lead to wrongly configure the RSS table, not accessing the right entries. Fixes: 1d7d15d79fb4 ("net: mvpp2: initialize the RSS tables") Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: allocate zeroed tx descriptorsYan Markman2017-11-301-1/+1
| | | | | | | | | | | | | | Reserved and unused fields in the Tx descriptors should be 0. The PPv2 driver doesn't clear them at run-time (for performance reasons) but these descriptors aren't zeroed when allocated, which can lead to unpredictable behaviors. This patch fixes this by using dma_zalloc_coherent instead of dma_alloc_coherent. Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message] Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: check ethtool sets the Tx ring size is to a valid min valueAntoine Tenart2017-11-281-0/+6
| | | | | | | | | | | | This patch fixes the Tx ring size checks when using ethtool, by adding an extra check in the PPv2 check_ringparam_valid helper. The Tx ring size cannot be set to a value smaller than the minimum number of descriptors needed for TSO. Fixes: 1d17db08c056 ("net: mvpp2: limit TSO segments and use stop/wake thresholds") Suggested-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: do not disable GMAC paddingYan Markman2017-11-281-9/+0
| | | | | | | | | | | | Short fragmented packets may never be sent by the hardware when padding is disabled. This patch stop modifying the GMAC padding bits, to leave them to their reset value (disabled). Fixes: 3919357fb0bb ("net: mvpp2: initialize the GMAC when using a port") Signed-off-by: Yan Markman <ymarkman@marvell.com> [Antoine: commit message] Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: cleanup probed ports in the probe error pathAntoine Tenart2017-11-281-2/+9
| | | | | | | | | This patches fixes the probe error path by cleaning up probed ports, to avoid leaving registered net devices when the driver failed to probe. Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network unit") Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix the txq_init error pathAntoine Tenart2017-11-281-18/+2
| | | | | | | | | | | | | | | | | | When an allocation in the txq_init path fails, the allocated buffers end-up being freed twice: in the txq_init error path, and in txq_deinit. This lead to issues as txq_deinit would work on already freed memory regions: kernel BUG at mm/slub.c:3915! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP This patch fixes this by removing the txq_init own error path, as the txq_deinit function is always called on errors. This was introduced by TSO as way more buffers are allocated. Fixes: 186cd4d4e414 ("net: mvpp2: software tso support") Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix GOP statistics loop start and stop conditionsMiquel Raynal2017-11-111-32/+30
| | | | | | | | | | | | | | | | GOP statistics from all ports of one instance of the driver are gathered with one work recalled in loop in a workqueue. The loop is started when a port is up, and stopped when a port is down. This last condition is obviously wrong. Fix this by having a work per port. This way, starting and stoping it when the port is up or down will be fine, while minimizing unnecessary CPU usage. Fixes: 118d6298f6f0 ("net: mvpp2: add ethtool GOP statistics") Reported-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2017-11-101-0/+4
|\ | | | | | | | | | | | | | | | | | | Simple cases of overlapping changes in the packet scheduler. Must easier to resolve this time. Which probably means that I screwed it up somehow. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: Prevent userspace from changing TX affinitiesMarc Zyngier2017-11-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mvpp2 driver can't cope at all with the TX affinities being changed from userspace, and spit an endless stream of [ 91.779920] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing [ 91.779930] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing [ 91.780402] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing [ 91.780406] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing [ 91.780415] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing [ 91.780418] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing rendering the box completely useless (I've measured around 600k interrupts/s on a 8040 box) once irqbalance kicks in and start doing its job. Obviously, the driver was never designed with this in mind. So let's work around the problem by preventing userspace from interacting with these interrupts altogether. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mvpp2: add ethtool GOP statisticsMiquel Raynal2017-11-081-5/+223
| | | | | | | | | | | | | | | | | | | | | | Add ethtool statistics support by reading the GOP statistics from the hardware counters. Also implement a workqueue to gather the statistics every second or some 32-bit counters could overflow. Suggested-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mvpp2: simplify the Tx desc set DMA logicAntoine Tenart2017-11-011-26/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Two functions were always used to set the DMA addresses in Tx descriptors, because this address is split into a base+offset in the descriptors. A mask was used to come up with the base and offset addresses and two functions were called, mvpp2_txdesc_dma_addr_set() and mvpp2_txdesc_offset_set(). This patch moves the base+offset calculation logic to mvpp2_txdesc_dma_addr_set(), and removes mvpp2_txdesc_offset_set() to simplify things. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mvpp2: use the aggr txq size define everywhereAntoine Tenart2017-11-011-3/+3
| | | | | | | | | | | | | | | | | | Cosmetic patch using the MVPP2_AGGR_TXQ_SIZE everywhere instead of the size field of aggr_txq, as the size never change and is always equal to the MVPP2_AGGR_TXQ_SIZE define. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mvpp2: limit TSO segments and use stop/wake thresholdsAntoine Tenart2017-11-011-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | Too many TSO descriptors can be required for the default queue size, when using small MSS values for example. Prevent this by adding a maximum number of allowed TSO segments (300). In addition set a stop and a wake thresholds to stop the queue when there's no room for a 1 "worst case scenario skb". Wake up the queue when the number of descriptors is low enough. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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