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path: root/drivers/net/dsa/bcm_sf2_regs.h
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* net: dsa: bcm_sf2: Advertise number of egress queuesFlorian Fainelli2017-09-051-0/+3
| | | | | | | | | | The switch supports 8 egress queues per port, so indicate that such that net/dsa/slave.c::dsa_slave_create can allocate the right number of TX queues. While at it use SF2_NUM_EGRESS_QUEUE as a define for the number of queues we support. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Add CFP registers definitionsFlorian Fainelli2017-01-301-0/+146
| | | | | | | | Add Compact Field Processor definitions for the Broadcom Starfighter 2 and compatible versions of the switch. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Configure traffic classes to queue mappingFlorian Fainelli2017-01-301-0/+4
| | | | | | | | | By default, all traffic goes to queue 0, re-configure the traffic classes to quality of service mapping such that priority X maps to queue X, where X is from 0 through 7. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Add support for BCM7278 integrated switchFlorian Fainelli2017-01-221-0/+4
| | | | | | | | | | | | | | Add support for the integrated switch found on BCM7278: - core_reg_align is set to 1, to force a translation into the target address space which is 8 bytes aligned - an alternate SWITCH_REG layout is provided since registers are largely bit/masks compatible but have different offsets - conditional for all CORE_STS_OVERRIDE_{IMP,GMII_P} since those got moved way out of the traditional register space Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Prepare for different register layoutsFlorian Fainelli2017-01-221-17/+26
| | | | | | | | | | | | | In preparation for supporting a new device with a slightly different register layout, affecting the SWITCH_REG and SWITCH_CORE address spaces, perform a few preparatory steps: - allow matching the compatible string against a data description - convert the SWITCH_REG register accesses into an indirection table - prepare for supporting a SWITCH_CORE register alignment requirement Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Remove duplicate codeFlorian Fainelli2016-08-261-122/+0
| | | | | | | | | | | Now that we are using b53_common for most VLAN, FDB and bridge operations, delete all the redundant code that we had in bcm_sf2.c to keep only the integration specific logic that we have to deal with: power management, link management and the external interfaces (RGMII, MDIO). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Add VLAN registers definitionsFlorian Fainelli2016-06-091-0/+70
| | | | | | | | Add the definitions for the VLAN registers that we are going to manipulate in subsequent patches. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Implement FDB operationsFlorian Fainelli2015-10-261-0/+43
| | | | | | | | | | | | | | Add support for the FDB add, delete, and dump operations. The add and delete operations are implemented using directed ARL operations using the specified MAC address and consist in a read operation, write and readback operation. The dump operation consists in using the ARL search and software filtering entries which are not for the desired port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: add HW bridging supportFlorian Fainelli2015-02-251-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | Implement the bridge join, leave and set_stp callbacks by making that we do the following: - when a port joins the bridge, all existing ports in the bridge get their VLAN control register updated with that joining port - the joining port is including all existing bridge ports in its own VLAN control register The leave operation is fairly similar, special care must be taken to make sure that port leaving the bridging is not removing itself from its own VLAN control register. Since the various BR_* states apply directly to our HW semantics, we just need to translate these constants into their corresponding HW settings, and voila! We make sure to trigger a fast-ageing process for ports that are joining/leaving the bridge and transition from incompatible states, this is equivalent to triggering an ARL flush for that port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: implement GPHY power downFlorian Fainelli2015-02-071-0/+4
| | | | | | | | | | | | | | Implement the power on/off recommended procedure for the Single GPHY we have on our Starfighter 2 switch. In order to make sure we get proper LED link/activity signaling during suspend, switch the link indication from the Switch/MAC to the PHY. Finally, since the GPHY needs to be reset to be put in low power mode, we will loose any context applied to it: workarounds, EEE etc.. so we need to call phy_init_hw() to get our fixups re-applied successfully. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: add support for controlling EEEFlorian Fainelli2014-09-281-0/+3
| | | | | | | | | | | | | When EEE is enabled, negotiate this feature with the PHY and make sure that the capability checking, local EEE advertisement, link partner EEE advertisement and auto-negotiation resolution returned by phy_init_eee() is positive, and enable EEE at the switch level. While querying the current EEE settings, verify the low-power indication and indicate its status. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: communicate integrated PHY revision to PHY driverFlorian Fainelli2014-09-191-0/+1
| | | | | | | | | | | | | The integrated BCM7xxx PHY contains no useful revision information in its MII_PHYSID2 bits 3:0, that information is instead contained in the SWITCH_REG_PHY_REVISION register. Read this register, store its value, and return it by implementing the dsa_switch::get_phy_flags() callback accordingly. The register layout is already matching what the BCM7xxx PHY driver is expecting to find. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: add Broadcom SF2 switch driverFlorian Fainelli2014-08-271-0/+227
Add support for the Broadcom Starfigther 2 switch chip using a DSA driver. This switch driver supports the following features: - configuration of the external switch port interface: MII, RevMII, RGMII and RGMII_NO_ID are supported - support for the per-port MIB counters - support for link interrupts for special ports (e.g: MoCA) - powering up/down of switch memories to conserve power when ports are unused Finally, update the compatible property for the DSA core code to match our switch top-level compatible node. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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