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* ubi: Don't bypass ->getattr()Richard Weinberger2016-06-142-13/+20
| | | | | | | | | | | | | Directly accessing inode fields bypasses ->getattr() and can cause problems when the underlying filesystem does not have the default ->getattr() implementation. So instead of obtaining the backing inode via d_backing_inode() use vfs_getattr() and obtain what we need from the kstat struct. Cc: Al Viro <viro@zeniv.linux.org.uk> Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
* Revert "mtd: switch open_mtd_by_chdev() to use of vfs_stat()"Richard Weinberger2016-06-141-5/+8
| | | | | | | | | This reverts commit 87f15d4add758fb7fc76655721af94be57a4c17d. vfs_stat() can only be used on user supplied buffers. Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
* Revert "mtd: switch ubi_open_volume_path() to vfs_stat()"Richard Weinberger2016-06-141-8/+11
| | | | | | | | | | | | | | This reverts commit 322ea0bbf3003df17b6253f76e572c37d79a6810. vfs_stat() can only be used on user supplied buffers. UBI's kapi.c is the API to the kernel and therefore vfs_stat() is inappropriate. This solves the problem that mounting any UBIFS will immediately fail with -EINVAL. Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
* Merge tag 'upstream-4.7-rc1' of git://git.infradead.org/linux-ubifsLinus Torvalds2016-05-278-32/+32
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull UBI/UBIFS updates from Richard Weinberger: "This contains mostly cleanups and minor improvements of UBI and UBIFS" * tag 'upstream-4.7-rc1' of git://git.infradead.org/linux-ubifs: ubifs: ubifs_dump_inode: Fix dumping field bulk_read UBI: Fix static volume checks when Fastmap is used UBI: Set free_count to zero before walking through erase list UBI: Silence an unintialized variable warning UBI: Clean up return in ubi_remove_volume() UBI: Modify wrong comment in ubi_leb_map function. UBI: Don't read back all data in ubi_eba_copy_leb() UBI: Add ro-mode sysfs attribute
| * UBI: Fix static volume checks when Fastmap is usedRichard Weinberger2016-05-243-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ezequiel reported that he's facing UBI going into read-only mode after power cut. It turned out that this behavior happens only when updating a static volume is interrupted and Fastmap is used. A possible trace can look like: ubi0 warning: ubi_io_read_vid_hdr [ubi]: no VID header found at PEB 2323, only 0xFF bytes ubi0 warning: ubi_eba_read_leb [ubi]: switch to read-only mode CPU: 0 PID: 833 Comm: ubiupdatevol Not tainted 4.6.0-rc2-ARCH #4 Hardware name: SAMSUNG ELECTRONICS CO., LTD. 300E4C/300E5C/300E7C/NP300E5C-AD8AR, BIOS P04RAP 10/15/2012 0000000000000286 00000000eba949bd ffff8800c45a7b38 ffffffff8140d841 ffff8801964be000 ffff88018eaa4800 ffff8800c45a7bb8 ffffffffa003abf6 ffffffff850e2ac0 8000000000000163 ffff8801850e2ac0 ffff8801850e2ac0 Call Trace: [<ffffffff8140d841>] dump_stack+0x63/0x82 [<ffffffffa003abf6>] ubi_eba_read_leb+0x486/0x4a0 [ubi] [<ffffffffa00453b3>] ubi_check_volume+0x83/0xf0 [ubi] [<ffffffffa0039d97>] ubi_open_volume+0x177/0x350 [ubi] [<ffffffffa00375d8>] vol_cdev_open+0x58/0xb0 [ubi] [<ffffffff8124b08e>] chrdev_open+0xae/0x1d0 [<ffffffff81243bcf>] do_dentry_open+0x1ff/0x300 [<ffffffff8124afe0>] ? cdev_put+0x30/0x30 [<ffffffff81244d36>] vfs_open+0x56/0x60 [<ffffffff812545f4>] path_openat+0x4f4/0x1190 [<ffffffff81256621>] do_filp_open+0x91/0x100 [<ffffffff81263547>] ? __alloc_fd+0xc7/0x190 [<ffffffff812450df>] do_sys_open+0x13f/0x210 [<ffffffff812451ce>] SyS_open+0x1e/0x20 [<ffffffff81a99e32>] entry_SYSCALL_64_fastpath+0x1a/0xa4 UBI checks static volumes for data consistency and reads the whole volume upon first open. If the volume is found erroneous users of UBI cannot read from it, but another volume update is possible to fix it. The check is performed by running ubi_eba_read_leb() on every allocated LEB of the volume. For static volumes ubi_eba_read_leb() computes the checksum of all data stored in a LEB. To verify the computed checksum it has to read the LEB's volume header which stores the original checksum. If the volume header is not found UBI treats this as fatal internal error and switches to RO mode. If the UBI device was attached via a full scan the assumption is correct, the volume header has to be present as it had to be there while scanning to get known as mapped. If the attach operation happened via Fastmap the assumption is no longer correct. When attaching via Fastmap UBI learns the mapping table from Fastmap's snapshot of the system state and not via a full scan. It can happen that a LEB got unmapped after a Fastmap was written to the flash. Then UBI can learn the LEB still as mapped and accessing it returns only 0xFF bytes. As UBI is not a FTL it is allowed to have mappings to empty PEBs, it assumes that the layer above takes care of LEB accounting and referencing. UBIFS does so using the LEB property tree (LPT). For static volumes UBI blindly assumes that all LEBs are present and therefore special actions have to be taken. The described situation can happen when updating a static volume is interrupted, either by a user or a power cut. The volume update code first unmaps all LEBs of a volume and then writes LEB by LEB. If the sequence of operations is interrupted UBI detects this either by the absence of LEBs, no volume header present at scan time, or corrupted payload, detected via checksum. In the Fastmap case the former method won't trigger as no scan happened and UBI automatically thinks all LEBs are present. Only by reading data from a LEB it detects that the volume header is missing and incorrectly treats this as fatal error. To deal with the situation ubi_eba_read_leb() from now on checks whether we attached via Fastmap and handles the absence of a volume header like a data corruption error. This way interrupted static volume updates will correctly get detected also when Fastmap is used. Cc: <stable@vger.kernel.org> Reported-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Set free_count to zero before walking through erase listHeiko Schocher2016-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set free_count to zero before walking through ai->erase list in wl_init(). Found in U-Boot as U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0 in U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Silence an unintialized variable warningDan Carpenter2016-05-241-1/+2
| | | | | | | | | | | | | | | | My static checker complains that "val" is uninitialized when kstrtoint() fails. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Clean up return in ubi_remove_volume()Dan Carpenter2016-05-241-1/+1
| | | | | | | | | | | | | | | | | | My static checker says that "err" can be uninitialized if "vol->reserved_pebs" is <= 0. I don't think that can happen but returning a literal is cleaner anyway. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Modify wrong comment in ubi_leb_map function.z001895122016-05-241-1/+1
| | | | | | | | | | Signed-off-by: z00189512 <abc.zhangliang@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Don't read back all data in ubi_eba_copy_leb()Richard Weinberger2016-05-241-26/+0
| | | | | | | | | | | | | | | | | | | | | | Drop this paranoia check from the old days. If our MTD driver or the flash is so bad that we even cannot trust it to write data we have bigger problems. If one really does not trust the flash and wants write-verify she can enable UBI io checks using debugfs. Signed-off-by: Richard Weinberger <richard@nod.at>
| * UBI: Add ro-mode sysfs attributeEzequiel Garcia2016-05-241-0/+5
| | | | | | | | | | | | | | | | | | | | On serious situations, UBI may detect serious device corruption, and switch to read-only mode to protect the data and allow debugging. This commit exposes this ro-mode on sysfs, so it can be obtained by userspace tools. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Richard Weinberger <richard@nod.at>
* | Merge tag 'for-linus-20160527' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-272-29/+9
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD fixes from Brian Norris: "We've already noticed a few flaws in the MTD work for v4.7-rc1: - The Atmel folks got ahead of themselves on trying to support their latest hardware and were working off incorrect documentation. Fix up the NAND driver to get this correct. - Fix up device tree example documentation to use the latest recommendations for describing NAND ECC algorithms" * tag 'for-linus-20160527' of git://git.infradead.org/linux-mtd: Documentation: dt: mtd: drop "soft_bch" from example Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
| * | Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"Wenyou Yang2016-05-252-29/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-2458-2194/+3366
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
| * | mtd: spi-nor: support GigaDevice gd25lq64cBrian Norris2016-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also note the GigaDevice JEDEC ID. No write-protect support yet, since this flash uses a different status register layout. Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * | mtd: nand_bch: fix spelling of "probably"Brian Norris2016-05-061-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | Merge tag 'nand/for-4.7' of github.com:linux-nand/linuxBrian Norris2016-05-0548-2185/+3324
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates from Boris Brezillon: This pull request contains the following infrastructure changes: * introduction of the ECC algo concept to extend the ECC mode one * replacement of the nand_ecclayout infrastructure by something more future-proof. * addition of an mtd-activity led trigger to replace the nand-activity one And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * rework of the OMAP GPMC and NAND drivers * prepare the sunxi NAND driver to receive DMA support * handle bitflips in erased pages on GPMI revisions that do not support this in hardware. * tag 'nand/for-4.7' of github.com:linux-nand/linux: (152 commits) mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident() mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident() ...
| | * | mtd: brcmnand: respect ECC algorithm set by NAND subsystemBrian Norris2016-05-051-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is more obvious than guessing based on ECC strength. It allows using NAND on devices with BCH-1 (e.g. D-Link DIR-885L). This maintains DT backward compatibility by defaulting to Hamming if a 1-bit ECC algorithm is specified without a corresponding algorithm selection. i.e., to use BCH-1, you must specify: nand-ecc-strength = <1>; nand-ecc-step-size = <512>; nand-ecc-algo = "bch"; Also adds a check to ensure we haven't allowed someone to get by with SW ECC. If we want to support SW ECC, we need to refactor some other pieces of this driver. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | gpmi-nand: Handle ECC Errors in erased pagesMarkus Pargmann2016-05-051-5/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ECC is only calculated for written pages. As erased pages are not actively written the ECC is always invalid. For this purpose the Hardware BCH unit is able to check for erased pages and does not raise an ECC error in this case. This behaviour can be influenced using the BCH_MODE register which sets the number of allowed bitflips in an erased page. Unfortunately the unit is not capable of fixing the bitflips in memory. To avoid complete software checks for erased pages, we can simply check buffers with uncorrectable ECC errors because we know that any erased page with errors is uncorrectable by the BCH unit. This patch adds the generic nand_check_erased_ecc_chunk() to gpmi-nand to correct erased pages. To have the valid data in the buffer before using them, this patch moves the read_page_swap_end() call before the ECC status checking for-loop. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> [Squashed patches by Stefan and Boris to check ECC area] Tested-by: Stefan Christ <s.christ@phytec.de> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: add support for "nand-ecc-algo" DT propertyRafał Miłecki2016-05-051-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: mtd: drop NAND_ECC_SOFT_BCH enum valueRafał Miłecki2016-05-056-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mappingRafał Miłecki2016-05-051-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There isn't any difference between handling NAND_ECC_SOFT and NAND_ECC_SOFT_BCH now. What matters is the new field called "algo". Please note we're keeping backward DT compatibility. We are still treating "soft_bch" value as the one setting Hamming algorithm, it's just handled in of_get_nand_ecc_algo now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: read ECC algorithm from the new fieldRafał Miłecki2016-05-051-61/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have all drivers properly setting this new field we can start using it. For a very short period of time we should support both values: NAND_ECC_SOFT and NAND_ECC_SOFT_BCH treating them the same. It's because of_get_nand_ecc_mode may still be setting NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: fsmc: validate ECC setup by checking algorithm directlyRafał Miłecki2016-05-051-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: set ECC algorithm to Hamming on fallbackRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: atmel: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: davinci: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: bf5xx: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: omap2: Fix high memory dma prefetch transferCooper Jr., Franklin2016-05-051-11/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on DMA documentation and testing using high memory buffer when doing dma transfers can lead to various issues including kernel panics. To workaround this simply use cpu copy. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: omap2: Start dma request before enabling prefetchCooper Jr., Franklin2016-05-051-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The prefetch engine sends a dma request once a FIFO threshold has been met. No other requests are received until the previous request is handled. Starting a dma transfer (dma_async_issue_pending) results in any previous event for the dma channel to be cleared. Therefore, starting the prefetch engine before initiating the dma transfer may result in the prefetch triggering a dma request but instead of it being handled it can end up being cleared. This will result in a hang since the code will continue to wait for the dma request to complete. By initiating the dma request before enabling the prefetch engine this race condition is avoided and no dma request are missed/cleared. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nandsim: add __init attributeJulia Lawall2016-05-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add __init attribute on functions that are only called from other __init functions and that are not inlined, at least with gcc version 4.8.4 on an x86 machine with allyesconfig. Currently, the functions are put in the .text.unlikely segment. Declaring them as __init will cause them to be put in the .init.text and to disappear after initialization. The result of objdump -x on the functions before the change is as follows: 000000000000059a l F .text.unlikely 0000000000000239 alloc_device 000000000000034e l F .text.unlikely 000000000000002e get_partition_name 00000000000007d3 l F .text.unlikely 00000000000005da init_nandsim And after the change it is as follows: 0000000000000029 l F .init.text 0000000000000234 alloc_device 0000000000000000 l F .init.text 0000000000000029 get_partition_name 000000000000025d l F .init.text 00000000000005d5 init_nandsim Done with the help of Coccinelle. The semantic patch checks for local static non-init functions that are called from an __init function and are not called from any other function. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: move of_get_nand_xxx() helpers into nand_base.cBoris Brezillon2016-05-051-1/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all drivers go through nand_set_flash_node() to parse the generic NAND properties, we can move all of_get_nand_xxx() helpers in to nand_base.c, make them static and remove of_mtd.c and of_mtd.h. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-22/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: lpc32xx: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-16/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: hisi504: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: davinci: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-45/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: gpmi: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-05-051-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Han xu <han.xu@nxp.com>
| | * | mtd: nand: omap2: fix compare_const_fl.cocci warningsJulia Lawall2016-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move constants to the right of binary operators. Generated by: scripts/coccinelle/misc/compare_const_fl.cocci CC: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: jz4740: Remove unused local variableMaarten ter Huurne2016-05-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Harvey Hunt <harvey.hunt@imgtec.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: fsl_elbc: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: fsl_ifc: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: fsl_upm: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: cmx270: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: mpc5121_nfc: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: au1550nd: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sh_flctl: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: s3c2410: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: omap2: set ECC algorithm explicitlyRafał Miłecki2016-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: kill the nand_ecclayout structBoris Brezillon2016-05-052-123/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all MTD drivers have moved to the mtd_ooblayout_ops model we can safely remove the struct nand_ecclayout definition, and all the remaining places where it was still used. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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