summaryrefslogtreecommitdiffstats
path: root/drivers/mtd
Commit message (Collapse)AuthorAgeFilesLines
* mtd: nand: refactor erase_cmd() to return chip statusBrian Norris2014-05-093-13/+14
| | | | | | | | | | | | | | | | | | | | | | | The nand_chip::erase_cmd callback previously served a dual purpose; for one, it allowed a per-flash-chip override, so that AG-AND devices could use a different erase command than other NAND. These AND devices were dropped in commit 14c6578683367b1e7af0c3c09e872b45a45183a7 (mtd: nand: remove AG-AND support). On the other hand, some drivers (denali and doc-g4) need to use this sort of callback to implement controller-specific erase operations. To make the latter operation easier for some drivers (e.g., ST's new BCH NAND driver), it helps if the command dispatch and wait functions can be lumped together, rather than called separately. This patch does two things: 1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return the status from this callback 2. Rename erase_cmd() to just erase(), since this callback does a little more than just send a command Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Lee Jones <lee.jones@linaro.org>
* mtd: nand: fix a typo in a comment lineMasahiro Yamada2014-04-291-1/+1
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: mtd_oobtest: generate consistent data for verificationAkinobu Mita2014-04-171-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | mtd_oobtest writes OOB, read it back and verify. The verification is not correctly done if oobsize is not multiple of 4. Although the data to be written and the data to be compared are generated by several prandom_byte_state() calls starting with the same seed, these two are generated with the different size and different number of calls. Due to the implementation of prandom_byte_state() if the size on each call is not multiple of 4, the resulting data is not always same. This fixes it by just calling prandom_byte_state() once and using correct range instead of calling it multiple times for each. Reported-by: George Cherian <george.cherian@ti.com> Reported-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Cc: George Cherian <george.cherian@ti.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Lee Jones <lee.jones@linaro.org> Cc: linux-mtd@lists.infradead.org Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge branch 'spinor'Brian Norris2014-04-1610-1415/+2412
|\ | | | | | | | | Addition of the spi-nor framework, plus updates to the ST SPI FSM driver.
| * mtd: st_spi_fsm: only build for ARMBrian Norris2014-04-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | COMPILE_TEST allows us to build this driver on other arch'es. But not all arch'es have the right I/O accessors -- particularly, x86 is missing readsl() and writesl(). So just restrict this driver to ARCH_STI. It's still buildable for a multiplatform ARM kernel, so it can get decent compile coverage. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org>
| * mtd: st_spi_fsm: correct type issuesBrian Norris2014-04-161-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compile-testing for a 64-bit arch uncovers several bad casts: In file included from include/linux/linkage.h:4:0, from include/linux/kernel.h:6, from drivers/mtd/devices/st_spi_fsm.c:15: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_read_fifo’: drivers/mtd/devices/st_spi_fsm.c:758:11: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] BUG_ON((((uint32_t)buf) & 0x3) || (size & 0x3)); ... Use uintptr_t instead of uint32_t, since it's guaranteed to be pointer-sized. We also see this warning, if size_t is not 32 bits wide: In file included from drivers/mtd/devices/st_spi_fsm.c:15:0: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_mtd_write’: include/linux/kernel.h:712:17: warning: comparison of distinct pointer types lacks a cast [enabled by default] (void) (&_min1 == &_min2); \ ^ drivers/mtd/devices/st_spi_fsm.c:1704:11: note: in expansion of macro ‘min’ bytes = min(FLASH_PAGESIZE - page_offs, len); ^ Just use min_t() to force the type conversion, since we don't really want to upgrade 'page_offs' and 'bytes' to size_t; they only should be handling <= 256 byte offsets. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org>
| * mtd: fsl-quadspi: fix __iomem annotationsBrian Norris2014-04-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This corrects some sparse warnings: drivers/mtd/spi-nor/fsl-quadspi.c:281:31: warning: incorrect type in initializer (different address spaces) [sparse] drivers/mtd/spi-nor/fsl-quadspi.c:281:31: expected void *[noderef] <asn:2>base [sparse] drivers/mtd/spi-nor/fsl-quadspi.c:281:31: got void [noderef] <asn:2>*iobase [sparse] (etc.) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com>
| * mtd: spi-nor: allow to be built as moduleBrian Norris2014-04-141-2/+2
| | | | | | | | | | | | | | | | There's no reason this can't be a module. Also, give SPI-NOR its own submenu. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * mtd: st_spi_fsm: begin using spi-nor.h opcodesBrian Norris2014-04-142-24/+5
| | | | | | | | | | | | | | | | | | Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h. Let's begin to unify them. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
| * mtd: st_spi_fsm: replace FLACH_CMD_* with SPINOR_OP_*Brian Norris2014-04-142-87/+87
| | | | | | | | | | | | | | | | | | Begin to unify the differences between serial_flash_cmds.h and spi-nor.h. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
| * mtd: st_spi_fsm: kill duplicate CMD definitionsBrian Norris2014-04-141-36/+0
| | | | | | | | | | | | | | | | | | These are also in serial_flash_cmds.h. (FWIW, I didn't know the C preprocessor allowed redefinitions without warning like this.) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
| * mtd: st_spi_fsm: fixup Kconfig dependencyBrian Norris2014-04-141-1/+1
| | | | | | | | | | | | | | | | | | | | I hear that this driver should depend on ARCH_STI, and that "SH" is not actually a real symbol. At the same time, let's allow compile-testing on other ARCH'es. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
| * mtd: spi-nor: shorten Kconfig namingBrian Norris2014-04-144-6/+11
| | | | | | | | | | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Huang Shijie <b32955@freescale.com>
| * mtd: spi-nor: unify read opcode variants with ST SPI FSMBrian Norris2014-04-142-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | serial_flash_cmds.h defines our opcodes a little differently. Let's borrow its naming, since it's borrowed from the SFDP standard, and it's more extensible. This prepares us for merging serial_flash_cmds.h and spi-nor.h opcode listing. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Huang Shijie <b32955@freescale.com>
| * mtd: spi-nor: re-name OPCODE_* to SPINOR_OP_*Brian Norris2014-04-143-63/+63
| | | | | | | | | | | | | | | | | | Qualify these with a better namespace, and prepare them for use in more drivers. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Huang Shijie <b32955@freescale.com>
| * mtd: spi-nor: add the copyright informationHuang Shijie2014-04-141-1/+5
| | | | | | | | | | | | | | Add the copyright information for spi-nor.c and spi-nor.h. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Add support for Macronix MX25L3255EAngus Clark2014-04-141-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Macronix MX25L3255E device. Unlike the other Macronix devices we have seen, this device supports WRITE_1_4_4 at reasonable frequencies. Rather than masking out WRITE_1_4_4 support altogether, we now rely on the table parameters to indicate whether or not WRITE_1_4_4 should be used. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Add Spansion S25FL032P to device tableAngus Clark2014-04-141-0/+2
| | | | | | | | | | | | | | | | Add Spansion S25FL032P to the list of known devices. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Refactor status register operationsAngus Clark2014-04-141-84/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the fsm_read_status() and fsm_write_status() code to support 1 or 2 byte operations, with a specified command. This allows us to remove device/register specific code, such as the N25Q fsm_wrvcr() function. The 'QE' configuration code is updated accordingly, with minor tweaks to ensure the register values are only written if actually required. One notable change in this area is that the 'W25Q_STATUS_QE' bit-field is now defined with respect to the 'SR2' register, rather than the combined 'SR1+SR2' register which is only used for write operations. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Update Macronix 'QE' configurationAngus Clark2014-04-141-4/+19
| | | | | | | | | | | | | | | | | | Update the configuration of the Macronix 'QE' bit, such that we only set or clear the bit if required. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Update Macronix 32-bit addressing supportAngus Clark2014-04-141-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the Macronix 32-bit addressing scheme was originally developed using the MX25L25635E device. As is often the case, it was found that the presence of a "WAIT" instruction was required for the "EN4B/EX4B" FSM Sequence to complete. (It is known that the SPI FSM Controller makes certain undocumented assumptions regarding what constitutes a valid sequence.) However, further testing suggested that a small delay was required after issuing the "EX4B" command; without this delay, data corruptions were observed, consistent with the device not being ready to retrieve data. Although the issue was not fully understood, the workaround of adding a small delay was implemented, while awaiting clarification from Macronix. The same behaviour has now been found with a second Macronix device, the MX25L25655E. However, with this device, it seems that the delay is also required after the 'EN4B' commands. This discovery has prompted us to revisit the issue. Although still not conclusive, further tests have suggested that the issue is down to the SPI FSM Controller, rather than the Macronix devices. Furthermore, an alternative workaround has emerged which is to set the WAIT time to 0x00000001, rather then 0x00000000. (Note, the WAIT instruction is used purely for the purpose of achieving "sequence validity", rather than actually implementing a delay!) The issue is now being investigated by the Design and Validation teams. In the meantime, we implement the alternative workaround, which reduces the effective delay from 1us to 1ns. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Add Macronix MX25L25655E deviceAngus Clark2014-04-141-0/+3
| | | | | | | | | | | | | | | | Add Macronix MX25L25655E to the list of known devices. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: spi-nor: EXPORT symbols which could be used by module driversBrian Norris2014-04-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | Fix errors like this: ERROR: "spi_nor_ids" [drivers/mtd/devices/m25p80.ko] undefined! ERROR: "spi_nor_scan" [drivers/mtd/devices/m25p80.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: spi-nor: Add Freescale QuadSPI driverHuang Shijie2014-04-143-0/+1016
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (0) What is the QuadSPI controller? The QuadSPI(Quad Serial Peripheral Interface) acts as an interface to one single or two external serial flash devices, each with up to 4 bidirectional data lines. (1) The QuadSPI controller is driven by the LUT(Look-up Table) registers. The LUT registers are a look-up-table for sequences of instructions. A valid sequence consists of four LUT registers. (2) The definition of the LUT register shows below: --------------------------------------------------- | INSTR1 | PAD1 | OPRND1 | INSTR0 | PAD0 | OPRND0 | --------------------------------------------------- There are several types of INSTRx, such as: CMD : the SPI NOR command. ADDR : the address for the SPI NOR command. DUMMY : the dummy cycles needed by the SPI NOR command. .... There are several types of PADx, such as: PAD1 : use a singe I/O line. PAD2 : use two I/O lines. PAD4 : use quad I/O lines. .... (3) Test this driver with the JFFS2 and UBIFS: For jffs2: ------------- #flash_eraseall /dev/mtd0 #mount -t jffs2 /dev/mtdblock0 tmp #bonnie++ -d tmp -u 0 -s 10 -r 5 For ubifs: ------------- #flash_eraseall /dev/mtd0 #ubiattach /dev/ubi_ctrl -m 0 #ubimkvol /dev/ubi0 -N test -m #mount -t ubifs ubi0:test tmp #bonnie++ -d tmp -u 0 -s 10 -r 5 Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: spi-nor: add a helper to find the spi_device_idHuang Shijie2014-04-141-0/+12
| | | | | | | | | | | | | | | | | | Add the spi_nor_match_id() to find the proper spi_device_id with the NOR flash's name in the spi_nor_ids table. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: m25p80: use the SPI nor frameworkBrian Norris2014-04-142-1199/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | Use the new SPI nor framework, and rewrite the m25p80: (0) remove all the NOR comands. (1) change the m25p->command to an array. (2) implement the necessary hooks, such as m25p80_read/m25p80_write. Tested with the m25p32. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> [Brian: rebased] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: spi-nor: add the framework for SPI NORHuang Shijie2014-04-145-0/+1098
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cloned most of the m25p80.c. In theory, it adds a new spi-nor layer. Before this patch, the layer is like: MTD ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip After this patch, the layer is like: MTD ------------------------ spi-nor ------------------------ m25p80 ------------------------ spi bus driver ------------------------ SPI NOR chip With the spi-nor controller driver(Freescale Quadspi), it looks like: MTD ------------------------ spi-nor ------------------------ fsl-quadspi ------------------------ SPI NOR chip New APIs: spi_nor_scan: used to scan a spi-nor flash. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Marek Vasut <marex@denx.de> [Brian: rebased to include additional m25p_ids[] entry] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: gpmi: add gpmi_devdata{} to simplify the codeHuang Shijie2014-04-163-40/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More and more chips use the GPMI controller, but these chips may use different version of the IPs for GPMI and BCH. Different IPs have different features, such as the BCH's maximum ECC strength: imx23/imx28 -- the BCH's maximum ECC strength is 20 imx6q -- the BCH's maximum ECC strength is 40 imx6sx -- the BCH's maximum ECC strength is 62 This patch does the following things: [1] add a new data structure, gpmi_devdata{}, to store the information for each IP. Besides the IP version, we store the following information: <1> BCH's maximum ECC strength. <2> the maximum chain delay in ns used by the EDO mode. but we may add more information in future. [2] add the gpmi_devdata_imx{23|28|6q} to replace the gpmi_ids. [3] simplify the code by using the ECC strength from gpmi_devdata, such as gpmi_check_ecc() and legacy_set_geometry(); [4] use the maximum chain delay to initialize the EDO mode, see gpmi_compute_edo_timing(). [5] rewrite the macros, such GPMI_IS_MX{23|28|6Q}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: add line feed to pr_errRaphaël Poggi2014-04-161-1/+1
| | | | | | | | | | | | | | Add line feed to pr_err. Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: davinci-nand: disable subpage write for keystone-nandMurali Karicheri2014-04-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Sub page write doesn't work because of hw issue in controller found on Keystone SOCs. AEMIF controller is also used on DaVinci SOCs which don't seems to have any issue. So add "ti,keysone-nand" compatible to nand driver in order to set NAND_NO_SUBPAGE_WRITE option. Cc: Warner Losh <imp@bsdimp.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: mtd_blkdevs: handle REQ_FLUSH request and do explicit flush of ↵Roman Peniaev2014-04-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | writeback buffer mtd_blkdevs is device with volatile cache (writeback buffer), so it should support REQ_FLUSH to do explicit flush. Without this patch 'sync' does not guarantee that writeback buffer will be flushed on disk in case of power off, e.g.: $ cp some_file /mnt $ sync ### POWER OFF In case of this sequence writeback buffer will not be flushed on disk. This patch fixes this behaviour and explicitly reports to block layer that flush requests are being supported. Signed-off-by: Roman Peniaev <r.peniaev@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: use the nand_read_subpage index everywhereRon2014-04-151-2/+1
| | | | | | | | | | | | | | | | Now that the index variable is correctly set earlier in this function we can use it in other places that compute the same thing too. Signed-off-by: Ron Lee <ron@debian.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: omap: fix compile warning on ‘erased_sector_bitflips’Christian Engelmayer2014-04-151-1/+1
|/ | | | | | | | | | | | | Commit 2c9f2365 (mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch4 in omap_calculate_ecc_bch) introduced minor compile warning "‘erased_sector_bitflips’ defined but not used [-Wunused-function]" when compiling without CONFIG_MTD_NAND_OMAP_BCH. Move function erased_sector_bitflips() into the same ifdef section as the only caller. Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'for-linus-20140405' of git://git.infradead.org/linux-mtdLinus Torvalds2014-04-0771-603/+2941
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: - A few SPI NOR ID definitions - Kill the NAND "max pagesize" restriction - Fix some x16 bus-width NAND support - Add NAND JEDEC parameter page support - DT bindings for NAND ECC - GPMI NAND updates (subpage reads) - More OMAP NAND refactoring - New STMicro SPI NOR driver (now in 40 patches!) - A few other random bugfixes * tag 'for-linus-20140405' of git://git.infradead.org/linux-mtd: (120 commits) Fix index regression in nand_read_subpage mtd: diskonchip: mem resource name is not optional mtd: nand: fix mention to CONFIG_MTD_NAND_ECC_BCH mtd: nand: fix GET/SET_FEATURES address on 16-bit devices mtd: omap2: Use devm_ioremap_resource() mtd: denali_dt: Use devm_ioremap_resource() mtd: devices: elm: update DRIVER_NAME as "omap-elm" mtd: devices: elm: configure parallel channels based on ecc_steps mtd: devices: elm: clean elm_load_syndrome mtd: devices: elm: check for hardware engine's design constraints mtd: st_spi_fsm: Succinctly reorganise .remove() mtd: st_spi_fsm: Allow loop to run at least once before giving up CPU mtd: st_spi_fsm: Correct vendor name spelling issue - missing "M" mtd: st_spi_fsm: Avoid duplicating MTD core code mtd: st_spi_fsm: Remove useless consts from function arguments mtd: st_spi_fsm: Convert ST SPI FSM (NOR) Flash driver to new DT partitions mtd: st_spi_fsm: Move runtime configurable msg sequences into device's struct mtd: st_spi_fsm: Supply the W25Qxxx chip specific configuration call-back mtd: st_spi_fsm: Supply the S25FLxxx chip specific configuration call-back mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back ...
| * Fix index regression in nand_read_subpageRon2014-04-041-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7351d3a5dbf42ba3299af71db3296be447bc1516 added an index variable as part of fixing checkpatch warnings, presumably as a tool to make some long lines shorter, however it only set that index in the case of there being no gaps in eccpos for the fragment being read. Which means the later step of filling ecccode from oob_poi will use the wrong indexing into eccpos in that case. This patch restores the behaviour that existed prior to that change. Signed-off-by: Ron Lee <ron@debian.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: diskonchip: mem resource name is not optionalSasha Levin2014-03-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | Passing a name to request_mem_region() isn't optional and can't just be NULL. Passing NULL causes a NULL ptr deref later in the boot process. Signed-off-by: Sasha Levin <sasha.levin@oracle.com> Tested-by: Alexander Shiyan <shc_work@mail.ru> Cc: <stable@vger.kernel.org> # 3.14 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: fix mention to CONFIG_MTD_NAND_ECC_BCHErico Nunes2014-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Mention to CONFIG_MTD_ECC_BCH in the warning message can be confusing as this doesn't match the exact name of the configuration option. This warning showed up once to me when I was starting to set up BCH. After checking my .config file, it took a moment before realizing it is CONFIG_MTD_NAND_ECC_BCH instead of CONFIG_MTD_ECC_BCH. Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: omap2: Use devm_ioremap_resource()Jingoo Han2014-03-251-20/+3
| | | | | | | | | | | | | | | | | | | | | | Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Also, 'unsigned long mem_size' is removed from 'struct omap_nand_info', because the 'mem_size' variable is not necessary anymore. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: denali_dt: Use devm_ioremap_resource()Jingoo Han2014-03-251-31/+8
| | | | | | | | | | | | | | | | | | | | | | Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource_byname() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: devices: elm: update DRIVER_NAME as "omap-elm"Pekon Gupta2014-03-251-1/+3
| | | | | | | | | | | | | | | | use "omap-elm" as DRIVER_NAME Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: devices: elm: configure parallel channels based on ecc_stepsPekon Gupta2014-03-251-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | ELM hardware can process up to maximum of 8 hannels in parallel for ECC error detection. Currently the number of channels getting configured for processing is static determined by macro ERROR_VECTOR_MAX. However, the actual number of channels that need to be processed is the ECC step number. This patch just avoids configuring extra unused channels. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: devices: elm: clean elm_load_syndromePekon Gupta2014-03-251-7/+11
| | | | | | | | | | | | | | | | | | | | This patch refactors elm_load_syndrome() to make it scalable for newer ECC schemes by removing scheme specific macros (like ECC_BYTES*xx), and instead using ECC control information passed during elm_config. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: devices: elm: check for hardware engine's design constraintsPekon Gupta2014-03-252-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ELM hardware engine is used by BCH ecc-schemes for detecting and locating ECC errors. This patch adds the following checks for ELM hardware engine: - ELM internal buffers are of 1K, so it cannot process data with ecc-step-size > 1K. - ELM engine can execute upto maximum of 8 threads in parallel, so in *page-mode* (when complete page is processed in single iteration), ELM cannot support ecc-steps > 8. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Succinctly reorganise .remove()Lee Jones2014-03-201-6/+1
| | | | | | | | | | | | Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Allow loop to run at least once before giving up CPULee Jones2014-03-201-2/+2
| | | | | | | | | | | | Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Correct vendor name spelling issue - missing "M"Lee Jones2014-03-201-1/+1
| | | | | | | | | | | | Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Avoid duplicating MTD core codeLee Jones2014-03-201-8/+0
| | | | | | | | | | | | Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Remove useless consts from function argumentsLee Jones2014-03-201-8/+7
| | | | | | | | | | | | | | Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Brian: tweaked a bit] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Convert ST SPI FSM (NOR) Flash driver to new DT partitionsLee Jones2014-03-201-1/+5
| | | | | | | | | | | | | | | | | | | | | | The old API expected a "partitions" property provided a phandle to a separate partitions node, which itself contained yet more nodes each representing one partition. The new API rids the requirement for the superfluous intermediary partitions node. This patch provides the added information required for automatic parsing by the core. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: st_spi_fsm: Move runtime configurable msg sequences into device's structLee Jones2014-03-201-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | Until now the dynamically configurable message sequences for read, write and enable 32bit addressing have been global. Brian makes a good point why this should not be the case. If there are ever two FSM's located on the same platform, we could be potentially introducing a race condition on "needlessly shared data". Suggested-by: Brian Norris <computersforpeace@gmail.com> Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
OpenPOWER on IntegriCloud