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* mtd: nand: pxa3xx: Remove unneeded ifdef CONFIG_OFEzequiel Garcia2013-09-171-7/+0
| | | | | | | | | | There's no need to enclose this code within idef CONFIG_OF, because the OF framework provides no-op stubs if CONFIG_OF=n. Cc: devicetree@vger.kernel.org Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'for-linus-20130909' of git://git.infradead.org/linux-mtdLinus Torvalds2013-09-0937-1671/+1724
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull mtd updates from David Woodhouse: - factor out common code from MTD tests - nand-gpio cleanup and portability to non-ARM - m25p80 support for 4-byte addressing chips, other new chips - pxa3xx cleanup and support for new platforms - remove obsolete alauda, octagon-5066 drivers - erase/write support for bcm47xxsflash - improve detection of ECC requirements for NAND, controller setup - NFC acceleration support for atmel-nand, read/write via SRAM - etc * tag 'for-linus-20130909' of git://git.infradead.org/linux-mtd: (184 commits) mtd: chips: Add support for PMC SPI Flash chips in m25p80.c mtd: ofpart: use for_each_child_of_node() macro mtd: mtdswap: replace strict_strtoul() with kstrtoul() mtd cs553x_nand: use kzalloc() instead of memset mtd: atmel_nand: fix error return code in atmel_nand_probe() mtd: bcm47xxsflash: writing support mtd: bcm47xxsflash: implement erasing support mtd: bcm47xxsflash: convert to module_platform_driver instead of init/exit mtd: bcm47xxsflash: convert kzalloc to avoid invalid access mtd: remove alauda driver mtd: nand: mxc_nand: mark 'const' properly mtd: maps: cfi_flagadm: add missing __iomem annotation mtd: spear_smi: add missing __iomem annotation mtd: r852: Staticize local symbols mtd: nandsim: Staticize local symbols mtd: impa7: add missing __iomem annotation mtd: sm_ftl: Staticize local symbols mtd: m25p80: add support for mr25h10 mtd: m25p80: make CONFIG_M25PXX_USE_FAST_READ safe to enable mtd: m25p80: Pass flags through CAT25_INFO macro ...
| * mtd cs553x_nand: use kzalloc() instead of memsetDan Carpenter2013-08-301-5/+1
| | | | | | | | | | | | | | | | | | It's cleaner to use kzalloc() instead of zeroing out in a separate call to memset(). Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: fix error return code in atmel_nand_probe()Wei Yongjun2013-08-301-0/+1
| | | | | | | | | | | | | | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: remove alauda driverJussi Kivilinna2013-08-303-731/+0
| | | | | | | | | | | | | | | | | | | | The driver has very low utility. Devices in question are limited to about 400kB/s and the only known user (me) discarded the hardware several years back. Signed-off-by: Joern Engel <joern@logfs.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: mxc_nand: mark 'const' properlyJingoo Han2013-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The values pointed by the pointer are used as read-only. Also, mtd_device_parse_register() uses 'part_probes[]' as the second argument which is defined as 'const char * const *types'. Thus, the 'const' should be moved to be after the '*'. drivers/mtd/nand/mxc_nand.c:269:25: warning: duplicate const Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: r852: Staticize local symbolsJingoo Han2013-08-301-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These local symbols are used only in this file. Fix the following sparse warnings: drivers/mtd/nand/r852.c:232:6: warning: symbol 'r852_write_buf' was not declared. Should it be static? drivers/mtd/nand/r852.c:264:6: warning: symbol 'r852_read_buf' was not declared. Should it be static? drivers/mtd/nand/r852.c:315:6: warning: symbol 'r852_cmdctl' was not declared. Should it be static? drivers/mtd/nand/r852.c:360:5: warning: symbol 'r852_wait' was not declared. Should it be static? drivers/mtd/nand/r852.c:389:5: warning: symbol 'r852_ready' was not declared. Should it be static? drivers/mtd/nand/r852.c:400:6: warning: symbol 'r852_ecc_hwctl' was not declared. Should it be static? drivers/mtd/nand/r852.c:432:5: warning: symbol 'r852_ecc_calculate' was not declared. Should it be static? drivers/mtd/nand/r852.c:464:5: warning: symbol 'r852_ecc_correct' was not declared. Should it be static? drivers/mtd/nand/r852.c:532:6: warning: symbol 'r852_engine_enable' was not declared. Should it be static? drivers/mtd/nand/r852.c:550:6: warning: symbol 'r852_engine_disable' was not declared. Should it be static? drivers/mtd/nand/r852.c:560:6: warning: symbol 'r852_card_update_present' was not declared. Should it be static? drivers/mtd/nand/r852.c:575:6: warning: symbol 'r852_update_card_detect' was not declared. Should it be static? drivers/mtd/nand/r852.c:589:9: warning: symbol 'r852_media_type_show' was not declared. Should it be static? drivers/mtd/nand/r852.c:600:1: warning: symbol 'dev_attr_media_type' was not declared. Should it be static? drivers/mtd/nand/r852.c:604:6: warning: symbol 'r852_update_media_status' was not declared. Should it be static? drivers/mtd/nand/r852.c:633:5: warning: symbol 'r852_register_nand_device' was not declared. Should it be static? drivers/mtd/nand/r852.c:671:6: warning: symbol 'r852_unregister_nand_device' was not declared. Should it be static? drivers/mtd/nand/r852.c:685:6: warning: symbol 'r852_card_detect_work' was not declared. Should it be static? drivers/mtd/nand/r852.c:824:6: warning: symbol 'r852_probe' was not declared. Should it be static? drivers/mtd/nand/r852.c:964:6: warning: symbol 'r852_remove' was not declared. Should it be static? drivers/mtd/nand/r852.c:995:6: warning: symbol 'r852_shutdown' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nandsim: Staticize local symbolsJingoo Han2013-08-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | These local symbols are used only in this file. Fix the following sparse warnings: drivers/mtd/nand/nandsim.c:1436:5: warning: symbol 'do_read_error' was not declared. Should it be static? drivers/mtd/nand/nandsim.c:1448:6: warning: symbol 'do_bit_flips' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: MTD_NAND_DENALI should depend on HAS_DMAGeert Uytterhoeven2013-08-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If NO_DMA=y: drivers/built-in.o: In function `denali_remove': drivers/mtd/nand/denali.c:1605: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `denali_read_page_raw': drivers/mtd/nand/denali.c:1190: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `denali_read_page': drivers/mtd/nand/denali.c:1140: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `write_page': drivers/mtd/nand/denali.c:1051: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `denali_init': drivers/mtd/nand/denali.c:1433: undefined reference to `dma_set_mask' drivers/mtd/nand/denali.c:1438: undefined reference to `dma_map_single' drivers/mtd/nand/denali.c:1442: undefined reference to `dma_mapping_error' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc_nand: simplify platform_get_resource_byname/devm_ioremap_resourceJulia Lawall2013-08-301-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded error handling on the result of a call to platform_get_resource_byname when the value is passed to devm_ioremap_resource. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,e,e1; expression ret != 0; identifier l; @@ res = platform_get_resource_byname(...); - if (res == NULL) { ... \(goto l;\|return ret;\) } e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: pmecc: fix failure to correct bit error in 1024-bytes sectorJosh Wu2013-08-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be found in §5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: fixup kerneldoc, rename parameterBrian Norris2013-08-301-5/+6
| | | | | | | | | | | | | | | | | | | | | | First, the function argument is 'offset' not 'column'. Second, the 'data_buf' name is inconsistent with the rest of this file. Just use 'buf'. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Gupta, Pekon <pekon@ti.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: gpmi: remove the nand_scan()Huang Shijie2013-08-301-30/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to make the nand_scan() work, the current code uses the hack code to init the @nand_chip->ecc.size and the @nand_chip->ecc.strength. and re-init some the ECC info in the gpmi_pre_bbt_scan(). This code is really a little ugly. The patch does following changes: (1) Use the nand_scan_ident()/nand_scan_tail() to replace the nand_scan(). (2) Init all the necessary values in the gpmi_init_last() before we call the nand_scan_tail(). (3) remove the code setting the ECC info, let the mtd layer to do the real job. (4) remove the gpmi_scan_bbt(). we do not need this function any more. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: set ONFI nand's default hooks in nand_set_defaults()Huang Shijie2013-08-301-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | We may do some ONFI get/set features operations before we call the nand_scan_tail(). So move the default ONFI nand hooks into nand_set_defaults(). Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: set the ecc step size for master/slave mtd_infoHuang Shijie2013-08-301-0/+1
| | | | | | | | | | | | | | | | | | Set the ecc step size for master/slave mtd_info{}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: silence some shift wrap warningsDan Carpenter2013-08-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | There are static checkers which complain when we declare variables as 64 bit bitfields but only use the lower 32 bits because of shift wrapping. In this case "len" is declared as u64 as opposed to unsigned long or something which might be 32 bits. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: simplify use of devm_ioremap_resourceJulia Lawall2013-08-301-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: Allow to build pxa3xx_nand on Orion platformsEzequiel Garcia2013-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | The Armada 370 and Armada XP SoC families, selected by PLAT_ORION, have a Nand Flash Controller (NFC) IP very similar to the one present in PXA platforms. Therefore, we want to build this driver on PLAT_ORION. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Allow devices with no dma resourcesEzequiel Garcia2013-08-301-23/+28
| | | | | | | | | | | | | | | | | | | | | | When use_dma=0 there's no point in requesting resources for dma, since they won't be used anyway. Therefore we remove that requirement, therefore allowing devices without dma to pass the driver probe. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Add __maybe_unused keyword to enable_int()Ezequiel Garcia2013-08-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have added ARCH_HAS_DMA conditional the function enable_int() may be unused. Declare it as __maybe_unused, in order to remove the following warning, when the function is not used: drivers/mtd/nand//pxa3xx_nand.c:343:24: warning: 'enable_int' defined but not used [-Wunused-function] Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Make dma code dependent on dma capable platformsEzequiel Garcia2013-08-301-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a macro ARCH_HAS_DMA to compile-out arch specific dma code, namely pxa_request_dma() and pxa_free_dma(). These symbols are available only in pxa, which makes impossible to build the driver in other platforms than ARCH_PXA. In order to handle non-dma capable platforms, we implement a fallbacks that allocate buffers as if 'use_dma=false', putting the dma related code under the ARCH_HAS_DMA conditional. Please note that the correct way to handle this is to migrate the dma code to use of the mmp_pdma dmaengine driver. However, currently this is not possible because the two dmaengine drivers can't work together. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Move cached registers to info structureEzequiel Garcia2013-08-301-19/+17
| | | | | | | | | | | | | | | | | | | | This registers are not per-chip (aka host) but controller-wide, so it's better to store them in the global 'info' structure. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Remove unneeded internal cmdsetEzequiel Garcia2013-08-301-46/+17
| | | | | | | | | | | | | | | | | | | | | | Use the defined macros for NAND command instead of using a constant internal structure. This commit is only a cleanup, there's no functionality modification. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Remove hardcoded mtd nameEzequiel Garcia2013-08-301-4/+2
| | | | | | | | | | | | | | | | | | | | There's no advantage in using a hardcoded name for the mtd device. Instead use the provided by the platform_device. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Add a local loop variableEzequiel Garcia2013-08-301-2/+3
| | | | | | | | | | | | | | | | | | This is just a cosmetic change, to make the code more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Use 'length override' in ONFI paramater page readEzequiel Garcia2013-08-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The ONFI command 'parameter page read' needs a non-standard length. Therefore, we enable the 'length override' field in NDCB0 and set a non-zero 'length count' in NDCB3. Additionally, the 'spare enable' bit must be disabled for any command that sets a non-zero 'length count' in NDCB3. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Support command buffer #3Ezequiel Garcia2013-08-301-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Some newer controllers support a fourth command buffer. This additional command buffer allows to set an arbitrary length count, using the NDCB3.NDLENCNT field, to perform non-standard length operations such as the ONFI parameter page read. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Allow to set/clear the 'spare enable' fieldEzequiel Garcia2013-08-301-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Some commands (such as the ONFI parameter page read) need to clear the 'spare enable' bit. This commit allows to set/clear depending on the prepared command, instead of having it always set. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Handle ECC and DMA enable/disable properlyEzequiel Garcia2013-08-301-2/+11
| | | | | | | | | | | | | | | | | | | | When ECC is not selected, the ECC enable bit must be cleared in the NAND control register. Same applies to DMA. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: pxa3xx: Introduce 'marvell,armada370-nand' compatible stringEzequiel Garcia2013-08-301-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports NFCv1 (as found in PXA SoC) and NFCv2 (as found in Armada 370/XP SoC). As both controller has a few differences, a way of distinguishing between the two is needed. This commit introduces a new compatible string 'marvell,armada370-nand' and assigns a compatible data of type enum pxa3xx_nand_variant to allow such distinction. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: gpmi: set the BCH's geometry with the ecc infoHuang Shijie2013-08-301-1/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | If the nand chip provides us the ECC info, we can use it firstly. The set_geometry_by_ecc_info() will use the ECC info, and calculate the parameters we need. Rename the old code to legacy_set_geometry() which will takes effect when there is no ECC info from the nand chip or we fails in the ECC info case. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: add the ecc info for some full-id nand chipsHuang Shijie2013-08-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: parse out the ECC info for the full-id nand chipsHuang Shijie2013-08-301-0/+2
| | | | | | | | | | | | | | | | Parse out the ECC information for the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: replace the hardcode with the onfi_feature()Huang Shijie2013-08-301-2/+4
| | | | | | | | | | | | | | | | | | | | | | The current code uses the hardcode to detect the 16-bit bus width. Use the onfi_feature() to replace it. Signed-off-by: Huang Shijie <b32955@freescale.com> [Brian: small fixup] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: get the ECC info from the Extended Parameter PageHuang Shijie2013-08-301-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the ONFI 2.1, the onfi spec adds the Extended Parameter Page to store the ECC info. The onfi spec tells us that if the nand chip's recommended ECC codeword size is not 512 bytes, then the @ecc_bits is 0xff. The host _SHOULD_ then read the Extended ECC information that is part of the extended parameter page to retrieve the ECC requirements for this device. This patch implement the reading of the Extended Parameter Page, and parses the sections for ECC type, and get the ECC info from the ECC section. Tested this patch with Micron MT29F64G08CBABAWP. Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: get the ECC info from the parameter page for ONFI nandHuang Shijie2013-08-301-0/+5
| | | | | | | | | | | | | | | | | | | | From the ONFI spec, we can just get the ECC info from the @ecc_bits field of the parameter page. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: move the sanity check to the beginning of pmecc_enable()Josh Wu2013-08-301-4/+4
| | | | | | | | | | | | | | | | | | It is better to do the sanity check for the parameter before any hardware operation. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: use dev_get_platdata()Jingoo Han2013-08-3018-35/+37
| | | | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: denali: use NAND_CI_CELLTYPE_MSK instead of hardcoded constantAkinobu Mita2013-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | Use NAND_CI_CELLTYPE_MSK to extract the cell type from nand_chip.cellinfo instead of hardcoded constant. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: gpmi-nand: use more sensible error codes at various placesLothar Waßmann2013-08-301-3/+3
| | | | | | | | | | | | | | Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: fix the warning when CONFIG_OF is not definedJosh Wu2013-08-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix following warning: drivers/mtd/nand/atmel_nand.c:2007: warning: 'atmel_nand_nfc_match' defined but not used This patch add '#if defined(CONFIG_OF)' block to guard around the definition of atmel_nand_nfc_match, in order to avoid the warning when the kernel is configured without DT support. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: remove NAND_BBT_SCANEMPTYBrian Norris2013-08-302-29/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND_BBT_SCANEMPTY is a strange, badly-supported option with omap as its single remaining user. NAND_BBT_SCANEMPTY was likely used by accident in omap2[1]. And anyway, omap2 doesn't scan the chip for bad blocks (courtesy of NAND_SKIP_BBTSCAN), and so its use of this option is irrelevant. This patch drops the NAND_BBT_SCANEMPTY option. [1] http://lists.infradead.org/pipermail/linux-mtd/2012-July/042902.html Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Ivan Djelic <ivan.djelic@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: hide in-memory BBT implementation detailsBrian Norris2013-08-302-23/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_base.c shouldn't have to know the implementation details of nand_bbt's in-memory BBT. Specifically, nand_base shouldn't perform the bit masking and shifting to isolate a BBT entry. Instead, just move some of the BBT code into a new nand_markbad_bbt() interface. This interface allows external users (i.e., nand_base) to mark a single block as bad in the BBT. Then nand_bbt will take care of modifying the in-memory BBT and updating the flash-based BBT (if applicable). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: refactor chip->block_markbad interfaceBrian Norris2013-08-305-75/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The chip->block_markbad pointer should really only be responsible for writing a bad block marker for new bad blocks. It should not take care of BBT-related functionality, nor should it handle bookkeeping of bad block stats. This patch refactors the 3 users of the block_markbad interface (plus the default nand_base implementation) so that the common code is kept in nand_block_markbad_lowlevel(). It removes some inconsistencies between the various implementations and should allow for more centralized improvements in the future. Because gpmi-nand no longer needs the nand_update_bbt() function, let's stop exporting it as well. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com> (for gpmi-nand parts) Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: eliminate castBrian Norris2013-08-301-3/+2
| | | | | | | | | | | | | | | | Just make 'res' an int. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: remove multiplied-by-2 block logicBrian Norris2013-08-301-48/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parent commit 771c568bcf915e708ae819ef9d07d862f7e2da86 ("mtd: nand: add accessors, macros for in-memory BBT") makes the following comment obsolete: /* * Note that numblocks is 2 * (real numblocks) here, see i+=2 * below as it makes shifting and masking less painful */ I don't think it ever could have been "less painful" to have to shift an extra bit (or 2, or 3) at various points in nand_bbt.c (and even outside, since we leak our in-memory format). But now it is certainly more painful, since we have nice macros and functions to retrieve the relevant portions of the BBT. This patch removes any points where the block number is doubled/halved/otherwise-shifted, instead representing the block number in its most natural form: as the actual block number. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: add accessors, macros for in-memory BBTBrian Norris2013-08-301-22/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an abundance of magic numbers and complicated shifting/masking logic in the in-memory BBT code which makes the code unnecessary complex and hard to read. This patch adds macros to represent the 00b, 01b, 10b, and 11b memory-BBT magic numbers, as well as two accessor functions for reading and marking the memory-BBT bitfield for a given block. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: enable Nand Flash Controller (NFC) write via sramJosh Wu2013-08-051-5/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enable writing nand flash via NFC SRAM. It will minimize the CPU overhead. The SRAM write only support ECC_NONE and ECC_HW with PMECC. To enable this NFC write by SRAM feature, you can add a string in dts under NFC driver node. This driver has been tested on SAMA5D3X-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Here is part of mtd_speedtest (writing test) result, compare with non-NFC writing, it reduces %65 cpu load with loss %12 speed. - commands use to test: # insmod /mnt/mtd_speedtest.ko dev=2 & # top -n 30 -d 1 | grep speedtest - test result: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock write speed 509 495 root D 1164 0% 7% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 8% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 5% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5194 KiB/s mtd_speedtest: testing page write speed 509 495 root D 1164 0% 32% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 27% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 25% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 30% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5024 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: enable Nand Flash Controller (NFC) read data via sramJosh Wu2013-08-051-6/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NFC has embedded sram which can use to transfer data. This patch enable reading nand flash via NFC SRAM. It will minimize the CPU overhead. This driver has been tested on SAMA5D3X-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Here puts the part of mtd_speedtest (read test) result as following: Compare with non-NFC mtd_speedtest result, reading will reduce %45 cpu load with increase %80 speed. - commands use to test: # insmod /mnt/mtd_speedtest.ko dev=2 & # top -n 30 -d 1 | grep speedtest - test result: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock read speed 509 495 root D 1164 0% 28% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 25% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 26% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 9403 KiB/s mtd_speedtest: testing page read speed 509 495 root R 1164 0% 31% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 57% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 53% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 71% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 9258 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: atmel_nand: add Nand Flash Controller (NFC) supportJosh Wu2013-08-052-33/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nand Flash Controller (NFC) can handle automatic transfers, sending the commands and address cycles to the NAND Flash. To use NFC in this driver, user needs to add NFC child node in nand flash driver. The NFC child node includes NFC's compatible string and regiters of the address and size of NFC command registers, NFC registers (embedded in HSMC) and NFC SRAM. Also user need to set up the HSMC irq, which use to check whether nfc command is finish or not. This driver has been tested on SAMA5D3X-EK board with JFFS2, YAFFS, UBIFS and mtd-utils. I put the part of the mtd_speedtest result here for your information. >From the mtd_speedtest, we can see the NFC will reduce the %50 of cpu load when writing nand flash. No change when reading. In the meantime, the speed will be slow about %8. - commands use to test: #insmod /mnt/mtd_speedtest.ko dev=2 & #top -n 30 -d 1 | grep speedtest - test result: Before the patch: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 515 495 root R 1164 0% 93% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 99% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5768 KiB/s mtd_speedtest: testing eraseblock read speed 515 495 root R 1164 0% 92% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 5932 KiB/s mtd_speedtest: testing page write speed 515 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5770 KiB/s mtd_speedtest: testing page read speed 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 89% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 5910 KiB/s After the patch: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock write speed 509 495 root D 1164 0% 49% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 50% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 47% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5370 KiB/s mtd_speedtest: testing eraseblock read speed 509 495 root R 1164 0% 92% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 95% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 5715 KiB/s mtd_speedtest: testing page write speed 509 495 root D 1164 0% 48% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 47% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 50% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5224 KiB/s mtd_speedtest: testing page read speed 509 495 root R 1164 0% 89% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 93% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 5641 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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