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* mtd: nand: use usual return values for the ->erase() hookMiquel Raynal2017-12-011-2/+8
| | | | | | | | | | Avoid using specific defined values for checking returned status of the ->erase() hook. Instead, use usual negative error values on failure, zero otherwise. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: fix interpretation of NAND_CMD_NONE in nand_command[_lp]()Miquel Raynal2017-11-301-2/+7
| | | | | | | | | | | | | | | | | | Some drivers (like nand_hynix.c) call ->cmdfunc() with NAND_CMD_NONE and a column address and expect the controller to only send address cycles. Right now, the default ->cmdfunc() implementations provided by the core do not filter out the command cycle in this case and forwards the request to the controller driver through the ->cmd_ctrl() method. The thing is, NAND controller drivers can get this wrong and send a command cycle with a NAND_CMD_NONE opcode and since NAND_CMD_NONE is -1, and the command field is usually casted to an u8, we end up sending the 0xFF command which is actually a RESET operation. Add conditions in nand_command[_lp]() functions to sending the initial command cycle when command == NAND_CMD_NONE. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* Merge tag 'nand/for-4.15' of git://git.infradead.org/l2-mtdRichard Weinberger2017-11-021-8/+26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: " Core changes: * Add a flag to mark NANDs that require 3 address cycles to encode a page address * Set a default ECC/free layout when NAND_ECC_NONE is requested * Fix a bug in panic_nand_write() Driver changes: * Another batch of cleanups for the denali driver * Fix PM support in the atmel driver * Remove support for platform data in the omap driver * Fix subpage write in the omap driver * Fix irq handling in the mtk driver * Change link order of mtk_ecc and mtk_nand drivers to speed up boot time * Change log level of ECC error messages in the mxc driver * Patch the pxa3xx driver to support Armada 8k platforms * Add BAM DMA support to the qcom driver * Convert gpio-nand to the GPIO desc API * Fix ECC handling in the mt29f driver "
| * mtd: nand: Fix writing mtdoops to nand flash.Brent Taylor2017-10-311-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When mtdoops calls mtd_panic_write(), it eventually calls panic_nand_write() in nand_base.c. In order to properly wait for the nand chip to be ready in panic_nand_wait(), the chip must first be selected. When using the atmel nand flash controller, a panic would occur due to a NULL pointer exception. Fixes: 2af7c6539931 ("mtd: Add panic_write for NAND flashes") Cc: <stable@vger.kernel.org> Signed-off-by: Brent Taylor <motobud@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Export nand_reset() symbolBoris Brezillon2017-10-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | Commit 6e532afaca8e ("mtd: nand: atmel: Add PM ops") started to use the nand_reset() function which was not yet exported by the NAND framework (because it was only used internally before that). Export this symbol to avoid build errors when the driver is enabled as a module. Fixes: 6e532afaca8e ("mtd: nand: atmel: Add PM ops") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: introduce NAND_ROW_ADDR_3 flagMasahiro Yamada2017-09-181-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several drivers check ->chipsize to see if the third row address cycle is needed. Instead of embedding magic sizes such as 32MB, 128MB in drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since nand_scan_ident() knows well about the device, it can handle this properly. The flag is set if the row address bit width is greater than 16. Delete comments such as "One more address cycle for ..." because intention is now clear enough from the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Use standard large page OOB layout when using NAND_ECC_NONEMiquel Raynal2017-09-181-1/+14
| | | | | | | | | | | | | | | | | | Use the core's large page OOB layout functions when not reserving any space for ECC bytes in the OOB layout. Fix ->nand_ooblayout_ecc_lp() to return -ERANGE instead of a zero length in this case. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: remove unused blockmask variableCorentin Labbe2017-09-181-2/+1
|/ | | | | | | | | This patch fix the following build warning: drivers/mtd/nand/nand_base.c:2671:30: attention : variable ‘blockmask’ set but not used [-Wunused-but-set-variable] Fixes: 0b4773fd1649 ("mtd: nand: Drop unused cached programming support") Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* Merge tag 'nand/for-4.14' of git://git.infradead.org/l2-mtd into mtd/nextBoris Brezillon2017-09-011-240/+64
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: " This pull request contains the following core changes: * Fix memory leaks in the core * Remove unused NAND locking support * Rename nand.h into rawnand.h (preparing support for spi NANDs) * Use NAND_MAX_ID_LEN where appropriate * Fix support for 20nm Hynix chips * Fix support for Samsung and Hynix SLC NANDs and the following driver changes: * Various cleanup, improvements and fixes in the qcom driver * Fixes for bugs detected by various static code analysis tools * Fix mxc ooblayout definition * Add a new part_parsers to tmio and sharpsl platform data in order to define a custom list of partition parsers * Request the reset line in exclusive mode in the sunxi driver * Fix a build error in the orion-nand driver when compiled for ARMv4 * Allow 64-bit mvebu platforms to select the PXA3XX driver "
| * mtd: nand: make Samsung SLC NAND usable againLothar Waßmann2017-08-291-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c51d0ac59f24 ("mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c") introduced a regression for Samsung SLC NAND chips. Prior to this commit chip->bits_per_cell was initialized by calling nand_get_bits_per_cell() before using nand_is_slc(). With the offending commit this call is skipped, leaving chip->bits_per_cell cleared to zero when the manufacturer specific '.detect' function calls nand_is_slc() which in turn interprets bits_per_cell != 1 as indication for an MLC chip. The effect is that e.g. a K9F1G08U0F NAND chip is falsely detected as MLC NAND with 4KiB page size rather than SLC with 2KiB page size. Add a call to nand_get_bits_per_cell() before calling the .detect hook function in nand_manufacturer_detect(), so that the nand_is_slc() calls in the manufacturer specific code will return correct results. Fixes: c51d0ac59f24 ("mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c") Cc: <stable@vger.kernel.org> Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * Merge branch 'nand/rename-header-file' of git://git.infradead.org/l2-mtd ↵Boris Brezillon2017-08-231-1/+1
| |\ | | | | | | | | | into nand/next
| | * mtd: nand: Rename nand.h into rawnand.hBoris Brezillon2017-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Peter Pan <peterpandong@micron.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Han Xu <han.xu@nxp.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Halasa <khalasa@piap.pl>
| * | mtd: nand: remove hard-coded NAND ids lengthJean-Louis Thekekara2017-08-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit removes hard-coded '8' used for looping into struct nand_chip.id.data array. NAND_MAX_ID_LEN has been introduced by Artem Bityutskiy in 53552d22bfe1f for defining ids length in nand_flash_ids[] list. This commit unifies ids length in nand base driver. Signed-off-by: Jean-Louis Thekekara <jeanlouis.thekekara@parrot.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | mtd: nand: Fix various memory leaks in coreBoris Brezillon2017-08-231-62/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nand_scan_ident() function is not expected to allocate resources, and people are usually not calling nand_cleanup() if something fails between nand_scan_ident() and nand_scan_tail(). Move all functions that may allocate resource to the nand_scan_tail() path to prevent such resource leaks. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | mtd: nand: Remove support for block locking/unlockingBoris Brezillon2017-08-031-173/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Commit 7d70f334ad2b ("mtd: nand: add lock/unlock routines") introduced support for the Micron LOCK/UNLOCK commands but no one ever used the nand_lock/unlock() functions. Remove support for these vendor-specific operations from the core. If one ever wants to add them back they should be put in nand_micron.c and mtd->_lock/_unlock should be directly assigned from there instead of exporting the functions. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Fix timing setup for NANDs that do not support SET FEATURESBoris Brezillon2017-08-021-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some ONFI NANDs do not support the SET/GET FEATURES commands, which, according to the spec, is perfectly valid. On these NANDs we can't set a specific timing mode using the "timing mode" feature, and we should assume the NAND does not require any setup to enter a specific timing mode. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection") Reported-by: Alexander Dahl <ada@thorsis.com> Cc: <stable@vger.kernel.org> Tested-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Fix a docs build warningJonathan Corbet2017-08-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 0b4773fd1649 (mtd: nand: Drop unused cached programming support) removed the "cached" parameter from nand_write_page(), but did not update the kerneldoc comments, creating this docs build warning: ./drivers/mtd/nand/nand_base.c:2751: warning: Excess function parameter 'cached' description in 'nand_write_page' Remove the offending line so we can have a little peace and quiet. Signed-off-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | nand: fix wrong default oob layout for small pages using soft eccMiquel Raynal2017-08-021-1/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using soft ecc, if no ooblayout is given, the core automatically uses one of the nand_ooblayout_{sp,lp}*() functions to determine the layout inside the out of band data. Until kernel version 4.6, struct nand_ecclayout was used for that purpose. During the migration from 4.6 to 4.7, an error shown up in the small page layout, in the case oob section is only 8 bytes long. The layout was using three bytes (0, 1, 2) for ecc, two bytes (3, 4) as free bytes, one byte (5) for bad block marker and finally two bytes (6, 7) as free bytes, as shown there: [linux-4.6] drivers/mtd/nand/nand_base.c:52 static struct nand_ecclayout nand_oob_8 = { .eccbytes = 3, .eccpos = {0, 1, 2}, .oobfree = { {.offset = 3, .length = 2}, {.offset = 6, .length = 2} } }; This fixes the current implementation which is incoherent. It references bit 3 at the same time as an ecc byte and a free byte. Furthermore, it is clear with the previous implementation that there is only one ecc section with 8 bytes oob sections. We shall return -ERANGE in the nand_ooblayout_ecc_sp() function when asked for the second section. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Fixes: 41b207a70d3a ("mtd: nand: implement the default mtd_ooblayout_ops") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* Merge tag 'for-linus-20170713' of git://git.infradead.org/linux-mtdLinus Torvalds2017-07-131-46/+303
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "General updates: - Cleanups and additional flash support for "dataflash" driver - new driver for mchp23k256 SPI SRAM device - improve handling of MTDs without eraseblocks (i.e., MTD_NO_ERASE) - refactor and improve "sub-partition" handling with TRX partition parser; partitions can now be created as sub-partitions of another partition SPINOR updates, from Cyrille Pitchen and Marek Vasut: - introduce support to the SPI 1-2-2 and 1-4-4 protocols. - introduce support to the Double Data Rate (DDR) mode. - introduce support to the Octo SPI protocols. - add support to new memory parts for Spansion, Macronix and Winbond. - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers. - clean up the st_spi_fsm driver. NAND updates, from Boris Brezillon: - addition of on-die ECC support to Micron driver - addition of helpers to help drivers choose most appropriate ECC settings - deletion of dead-code (cached programming and ->errstat() hook) - make sure drivers that do not support the SET/GET FEATURES command return ENOTSUPP use a dummy ->set/get_features implementation returning -ENOTSUPP (required for Micron on-die ECC) - change the semantic of ecc->write_page() for drivers setting the NAND_ECC_CUSTOM_PAGE_ACCESS flag - support exiting 'GET STATUS' command in default ->cmdfunc() implementations - change the prototype of ->setup_data_interface() A bunch of driver related changes: - various cleanup, fixes and improvements of the MTK driver - OMAP DT bindings fixes - support for ->setup_data_interface() in the fsmc driver - support for imx7 in the gpmi driver - finalization of the denali driver rework (thanks to Masahiro for the work he's done on this driver) - fix "bitflips in erased pages" handling in the ifc driver - addition of PM ops and dynamic timing configuration to the atmel driver" * tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd: (118 commits) Documentation: ABI: mtd: describe "offset" more precisely mtd: Fix check in mtd_unpoint() mtd: nand: mtk: release lock on error path mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead mtd: spi-nor: cqspi: remove duplicate const mtd: spi-nor: Add support for Spansion S25FL064L mtd: spi-nor: Add support for mx66u51235f mtd: nand: mtk: add ->setup_data_interface() hook mtd: nand: mtk: remove unneeded mtk_ecc_hw_init from mtk_ecc_resume mtd: nand: mtk: remove unneeded mtk_nfc_hw_init from mtk_nfc_resume mtd: nand: mtk: disable ecc irq when writing page with hwecc mtd: nand: mtk: fix incorrect register setting order about ecc irq mtd: partitions: fixup some allocate_partition() whitespace mtd: parsers: trx: fix pr_err format for printing offset MAINTAINERS: Update SPI NOR subsystem git repositories mtd: extract TRX parser out of bcm47xxpart into a separated module mtd: partitions: add support for partition parsers mtd: partitions: add support for subpartitions mtd: partitions: rename "master" to the "parent" where appropriate mtd: partitions: remove sysfs files when deleting all master's partitions ...
| * Merge tag 'nand/for-4.13' into MTDBrian Norris2017-07-071-46/+303
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: """ This pull request contains the following core changes: * addition of on-ecc support to Micron driver * addition of helpers to help drivers choose most appropriate ECC settings * deletion of dead-code (cached programming and ->errstat() hook) * make sure drivers that do not support the SET/GET FEATURES command return ENOTSUPP use a dummy ->set/get_features implementation returning -ENOTSUPP (required for Micron on-die ECC) * change the semantic of ecc->write_page() for drivers setting the NAND_ECC_CUSTOM_PAGE_ACCESS flag * support exiting 'GET STATUS' command in default ->cmdfunc() implementations * change the prototype of ->setup_data_interface() A bunch of driver related changes: * various cleanup, fixes and improvements of the MTK driver * OMAP DT bindings fixes * support for ->setup_data_interface() in the fsmc driver * support for imx7 in the gpmi driver * finalization of the denali driver rework (thanks to Masahiro for the work he's done on this driver) * fix "bitflips in erased pages" handling in the ifc driver * addition of PM ops and dynamic timing configuration to the atmel driver And as usual we also have a few minor cleanup/fixes/improvements patches across the subsystem. """
| | * mtd: nand: add generic helpers to check, match, maximize ECC settingsMasahiro Yamada2017-06-101-0/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver are responsible for setting up ECC parameters correctly. Those include: - Check if ECC parameters specified (usually by DT) are valid - Meet the chip's ECC requirement - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set The logic can be generalized by factoring out common code. This commit adds 3 helpers to the NAND framework: nand_check_ecc_caps - Check if preset step_size and strength are valid nand_match_ecc_req - Match the chip's requirement nand_maximize_ecc - Maximize the ECC strength To use the helpers above, a driver needs to provide: - Data array of supported ECC step size and strength - A hook that calculates ECC bytes from the combination of step_size and strength. By using those helpers, code duplication among drivers will be reduced. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: check ecc->total sanity in nand_scan_tailMasahiro Yamada2017-06-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers are supposed to set correct ecc->{size,strength,bytes} before calling nand_scan_tail(), but it does not complain about ecc->total bigger than oobsize. In this case, chip->scan_bbt() crashes due to memory corruption, but it is hard to debug. It would be kind to fail it earlier with a clear message. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Support 'EXIT GET STATUS' command in nand_command[_lp]()Boris Brezillon2017-06-011-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | READ0 is sometimes used to exit GET STATUS mode. When this is the case no address cycles are requested, and we can use this information to detect that READSTART should not be issued after READ0 or that we shouldn't wait for the chip to be ready. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| | * mtd: nand: Wait for PAGEPROG to finish in drivers setting ↵Boris Brezillon2017-06-011-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND_ECC_CUSTOM_PAGE_ACCESS Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the full read/write page sequence, and waiting for a page to actually be programmed is part of this write-page sequence. This is also what is done in ->write_oob_xxx() hooks, so let's do that in ->write_page_xxx() as well to make it consistent. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Drop the ->errstat() hookBoris Brezillon2017-06-011-16/+0
| | | | | | | | | | | | | | | | | | | | | The ->errstat() hook is no longer implemented NAND controller drivers. Get rid of it before someone starts abusing it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Drop unused cached programming supportBoris Brezillon2017-06-011-26/+12
| | | | | | | | | | | | | | | | | | | | | Cached programming is always skipped, so drop the associated code until we decide to really support it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Pass the CS line to ->setup_data_interface()Boris Brezillon2017-06-011-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interface() so that the NAND controller driver knows which CS line is concerned by the setup_data_interface() request. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Optimize checking of erased buffersPavel Machek2017-06-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | If we see ~0UL in flash, there's no need for hweight, and no need to check number of bitflips. So this should be net win. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Make sure drivers not supporting SET/GET_FEATURES return -ENOTSUPPBoris Brezillon2017-05-301-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot of drivers are providing their own ->cmdfunc(), and most of the time this implementation does not support all possible NAND operations. But since ->cmdfunc() cannot return an error code, the core has no way to know that the operation it requested is not supported. This is a problem we cannot address for all kind of operations with the current design, but we can prevent these silent failures for the GET/SET FEATURES operation by overloading the default ->onfi_{set,get}_features() methods with one returning -ENOTSUPP. Reported-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
| | * mtd: nand: export nand_{read,write}_page_raw()Thomas Petazzoni2017-05-151-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nand_read_page_raw() and nand_write_page_raw() functions might be re-used by vendor-specific implementations of the read_page/write_page functions. Instead of having vendor-specific code duplicate this code, it is much better to export those functions and allow them to be re-used. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: add core support for on-die ECCThomas Petazzoni2017-05-151-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of NAND flashes have a capability called "on-die ECC" where the NAND chip itself is capable of detecting and correcting errors. Linux already has support for using the ECC implementation of the NAND controller, or a software based ECC implementation, but not for using the ECC implementation of the NAND controller. However, such an implementation is sometimes useful in situations where the NAND controller provides ECC algorithms that are not strong enough for the NAND chip used on the system. A typical case is a NAND chip that requires a 4-bit ECC, while the NAND controller only provides a 1-bit ECC algorithm. This commit introduces the support for the NAND_ECC_ON_DIE ECC mode: - Parsing of the "on-die" value for the "nand-ecc-mode" Device Tree property - Handling NAND_ECC_ON_DIE case in nand_scan_tail(). The idea is that the vendor specific code for the NAND chip must implement ->read_page() and ->write_page(). It may optionally provide its own ->read_page_raw() and ->write_page_raw() as well. For OOB operation, we assume the standard operations are good enough, but they can be overridden by the vendor specific code if needed. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | | Merge tag 'docs-4.13' of git://git.lwn.net/linuxLinus Torvalds2017-07-031-2/+5
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull documentation updates from Jonathan Corbet: "There has been a fair amount of activity in the docs tree this time around. Highlights include: - Conversion of a bunch of security documentation into RST - The conversion of the remaining DocBook templates by The Amazing Mauro Machine. We can now drop the entire DocBook build chain. - The usual collection of fixes and minor updates" * tag 'docs-4.13' of git://git.lwn.net/linux: (90 commits) scripts/kernel-doc: handle DECLARE_HASHTABLE Documentation: atomic_ops.txt is core-api/atomic_ops.rst Docs: clean up some DocBook loose ends Make the main documentation title less Geocities Docs: Use kernel-figure in vidioc-g-selection.rst Docs: fix table problems in ras.rst Docs: Fix breakage with Sphinx 1.5 and upper Docs: Include the Latex "ifthen" package doc/kokr/howto: Only send regression fixes after -rc1 docs-rst: fix broken links to dynamic-debug-howto in kernel-parameters doc: Document suitability of IBM Verse for kernel development Doc: fix a markup error in coding-style.rst docs: driver-api: i2c: remove some outdated information Documentation: DMA API: fix a typo in a function name Docs: Insert missing space to separate link from text doc/ko_KR/memory-barriers: Update control-dependencies example Documentation, kbuild: fix typo "minimun" -> "minimum" docs: Fix some formatting issues in request-key.rst doc: ReSTify keys-trusted-encrypted.txt doc: ReSTify keys-request-key.txt ...
| * | Merge remote-tracking branch 'mauro-exp/docbook3' into death-to-docbookJonathan Corbet2017-05-181-2/+5
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mauro says: This patch series convert the remaining DocBooks to ReST. The first version was originally send as 3 patch series: [PATCH 00/36] Convert DocBook documents to ReST [PATCH 0/5] Convert more books to ReST [PATCH 00/13] Get rid of DocBook The lsm book was added as if it were a text file under Documentation. The plan is to merge it with another file under Documentation/security, after both this series and a security Documentation patch series gets merged. It also adjusts some Sphinx-pedantic errors/warnings on some kernel-doc markups. I also added some patches here to add PDF output for all existing ReST books.
| | * mtd: adjust kernel-docs to avoid Sphinx/kerneldoc warningsMauro Carvalho Chehab2017-05-161-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ./drivers/mtd/nand/nand_bbt.c:1: warning: no structured comments found ./include/linux/mtd/nand.h:785: ERROR: Unexpected indentation. ./drivers/mtd/nand/nand_base.c:449: WARNING: Definition list ends without a blank line; unexpected unindent. ./drivers/mtd/nand/nand_base.c:1161: ERROR: Unexpected indentation. ./drivers/mtd/nand/nand_base.c:1162: WARNING: Block quote ends without a blank line; unexpected unindent. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
* | | mtd: nand: make nand_ooblayout_lp_hamming_ops staticColin Ian King2017-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | nand_ooblayout_lp_hamming_ops can be made static as it does not need to be in global scope. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | | mtd: nand: free vendor-specific resources in init failure pathsBrian Norris2017-05-221-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail any time after calling nand_detect(), then we don't call the vendor-specific ->cleanup() callback, and we'll leak any resources the vendor-specific code might have allocated. Mark the "fix" against the first commit that started allocating anything in ->init(). Fixes: 626994e07480 ("mtd: nand: hynix: Add read-retry support for 1x nm MLC NANDs") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | | mtd: nand: don't leak buffers when ->scan_bbt() failsBrian Norris2017-05-221-1/+5
|/ / | | | | | | | | | | | | | | | | | | | | This bug seems to have been here forever, although we came close to fixing all of them in [1]! [1] 11eaf6df1cce ("mtd: nand: Remove BUG() abuse in nand_scan_tail") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: add ooblayout for old hamming layoutAlexander Couzens2017-05-021-1/+69
| | | | | | | | | | | | | | | | | | | | | | | | The old 1-bit hamming layout requires ECC data to be placed at a fixed offset, and not necessarily at the end of the OOB area. Add this old layout back in order to fix legacy setups. Fixes: 41b207a70d3a ("mtd: nand: implement the default mtd_ooblayout_ops") Cc: <stable@vger.kernel.org> Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: allow drivers to request minimum alignment for passed bufferMasahiro Yamada2017-04-251-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases, nand_do_{read,write}_ops is passed with unaligned ops->datbuf. Drivers using DMA will be unhappy about unaligned buffer. The new struct member, buf_align, represents the minimum alignment the driver require for the buffer. If the buffer passed from the upper MTD layer does not have enough alignment, nand_do_*_ops will use bufpoi. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unsetMasahiro Yamada2017-04-251-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some NAND controllers are using DMA engine requiring a specific buffer alignment. The core provides no guarantee on the nand_buffers pointers, which forces some drivers to allocate their own buffers and pass the NAND_OWN_BUFFERS flag. Rework the nand_buffers allocation logic to allocate each buffer independently. This should make most NAND controllers/DMA engine happy, and allow us to get rid of these custom buf allocation in NAND controller drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: relax ecc.read_page() return value for uncorrectable ECCMasahiro Yamada2017-04-251-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment for ecc.read_page() requires that it should return "0 if bitflips uncorrectable". Actually, drivers could return positive values when uncorrectable bitflips occur. For example, nand_read_page_swecc() is the case. If ecc.correct() returns -EBADMSG for the first ECC sector, and a positive value for the second one, nand_read_page_swecc() returns a positive max_bitflips and increments ecc_stats.failed for the same page. The requirement can be relaxed by tweaking nand_do_read_ops(). Move the max_bitflips calculation below the retry. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Remove unused chip->write_page() hookBoris Brezillon2017-04-251-7/+5
| | | | | | | | | | | | | | | | | | | | The last/only user of the chip->write_page() hook (the Atmel NAND controller driver) has been reworked and is no longer specifying a custom ->write_page() implementation. Drop this hook before someone else start abusing it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)Masahiro Yamada2017-03-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set Features (0xEF) command toggles the R/B# pin after 4 sub feature parameters are written. Currently, nand_command(_lp) calls chip->dev_ready immediately after the address cycle because NAND_CMD_SET_FEATURES falls into default: label. No wait is needed at this point. If you see nand_onfi_set_features(), R/B# is already cared by the chip->waitfunc call. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)Masahiro Yamada2017-03-241-0/+2
| | | | | | | | | | | | | | | | | | Read ID (0x90) command does not toggle the R/B# pin. Without this patch, NAND_CMD_READID falls into the default: label, then R/B# is checked by chip->dev_ready(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: use read_oob() instead of cmdfunc() for bad block checkMasahiro Yamada2017-03-241-21/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The nand_default_block_markbad() and scan_block_fast() use high level APIs to get access to the BBM. On the other hand, nand_block_bad (the default implementation of ->block_bad) calls the lower level ->cmdfunc hook. This prevents drivers from using ->ecc.read_oob() even if optimized read operation is implemented. Besides, some NAND controllers may protect the BBM with ECC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: allow to set only one of ECC size and ECC strength from DTMasahiro Yamada2017-03-241-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, it is valid to specify both "nand-ecc-step-size" and "nand-ecc-strength", but not allowed to set only one of them. This requirement has a conflict with "nand-ecc-maximize"; this flag is used when you want the driver to choose the best ECC strength. If "nand-ecc-maximize" is set, "nand-ecc-strength" is very likely to be unset. It would be possible to make the if-conditional more complex by adding the check for the NAND_ECC_MAXIMIZE flag, but I chose to drop the check entirely. I thought of the situation where the hardware has a fixed ECC step size (so it can be hard-coded in the driver), whereas the ECC strength is configurable by software. In that case, we may want to only set "nand-ecc-strength" (or "nand-ecc-maximize") in DT. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Move Macronix specific initialization in nand_macronix.cBoris Brezillon2017-03-081-11/+0
| | | | | | | | | | | | | | | | Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cBoris Brezillon2017-03-081-17/+1
| | | | | | | | | | | | | | | | | | Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
* | mtd: nand: Move Micron specific init logic in nand_micron.cBoris Brezillon2017-03-081-30/+2
| | | | | | | | | | | | | | | | Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
* | mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cBoris Brezillon2017-03-081-17/+2
| | | | | | | | | | | | | | | | | | Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
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