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* mtd: nand: import nand_hw_control_init()Marc Gonzalez2016-09-231-2/+1
| | | | | | | | The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmdFlorian Fainelli2016-07-161-1/+1
| | | | | | | | | | | | | | | Change the BUG_ON() condition in brcmnand_send_cmd() which checks for the interrupt status "controller ready" bit to a WARN_ON. There is no good reason to kill the system when this condition occur because we could have systems which listed the NAND controller as available (e.g: from Device Tree), but the NAND chip could be malfunctioning and not responding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Detect sticky ucorr ecc error on dma readsKamal Dasu2016-07-111-0/+18
| | | | | | | | | | | This change provides a fix for controller bug where nand controller could have a possible sticky error after a PIO followed by a DMA read. The fix retries a read if we see a uncorr_ecc after read to detect such sticky errors. The fix applies to only controller version 7.0 and 7.1. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: brcmnand: Add check for erased page bitflipsKamal Dasu2016-06-131-0/+62
| | | | | | | | | Check for erased page bitflips in a page. And if well within threshold return data as all 0xff. Apply sw check for controller version < 7.2. Controller vesion >= 7.2 has hw support. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: brcmnand: Add v7.2 controller supportFlorian Fainelli2016-06-031-14/+77
| | | | | | | | | | | | | | | | The 7.2 controller differs in a few area compared to its predecssor (7.1): - NAND scrambler, which we are not using just yet - higher ECC levels (up to 120 bits) per 1KB data blocks, also not supported yet - up to 128B OOB This patch adds the necessary code to support such a controller generation and updates the Device Tree binding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: brcmnand: respect ECC algorithm set by NAND subsystemBrian Norris2016-05-051-1/+23
| | | | | | | | | | | | | | | | | | | | | This is more obvious than guessing based on ECC strength. It allows using NAND on devices with BCH-1 (e.g. D-Link DIR-885L). This maintains DT backward compatibility by defaulting to Hamming if a 1-bit ECC algorithm is specified without a corresponding algorithm selection. i.e., to use BCH-1, you must specify: nand-ecc-strength = <1>; nand-ecc-step-size = <512>; nand-ecc-algo = "bch"; Also adds a check to ensure we haven't allowed someone to get by with SW ECC. If we want to support SW ECC, we need to refactor some other pieces of this driver. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: brcm: switch to mtd_ooblayout_opsBoris Brezillon2016-05-051-101/+157
| | | | | | | Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: brcm: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon2016-04-191-3/+2
| | | | | | | | | | The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Add support for v6.2 controllersFlorian Fainelli2016-04-191-1/+2
| | | | | | | | | | | | | Document and match the brcm,brcmnand-v6.2 compatible string, the controller has a register layout identical to the v6.0 version and supports prefetch. Update the command shift logic to account for v6.2 controller which are the first ones to use a shift of 0 (6.1 used a shift of 24). Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: kill the ecclayout->oobavail fieldBoris BREZILLON2016-03-071-5/+3
| | | | | | | | | | ecclayout->oobavail is just redundant with the mtd->oobavail field. Moreover, it prevents static const definition of ecc layouts since the NAND framework is calculating this value based on the ecclayout->oobfree field. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Fix v7.1 register offsetsFlorian Fainelli2016-02-291-1/+33
| | | | | | | | | | | The BRCMNAND controller revision 7.1 is almost 100% compatible with the previous v6.0 register offset layout, except for the Correctable Error Reporting Threshold registers. Fix this by adding another table with the correct offsets for CORR_THRESHOLD and CORR_THRESHOLD_EXT. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: make use of nand_set/get_controller_data() helpersBoris BREZILLON2016-01-071-15/+15
| | | | | | | | | New helpers have been added to avoid directly accessing chip->field. Use them where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: fixed a few rebase conflicts] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: remove useless mtd->priv = chip assignmentsBoris BREZILLON2015-12-181-1/+0
| | | | | | | | | mtd_to_nand() now uses the container_of() approach to transform an mtd_info pointer into a nand_chip one. Drop useless mtd->priv assignments from NAND controller drivers. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: brcm: use the mtd instance embedded in struct nand_chipBoris BREZILLON2015-12-181-7/+6
| | | | | | | struct nand_chip now embeds an mtd device. Make use of this mtd instance. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: defer to devm_ioremap_resource() for error checkingBrian Norris2015-12-101-3/+0
| | | | | | | | devm_ioremap_resource() does error checking on the 'res' argument, so drop the error check in bcm6368_nand.c. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Simon Arlott <simon@fire.lp0.eu>
* mtd: brcmnand: Add support for the BCM6368Simon Arlott2015-12-092-0/+146
| | | | | | | | | | | | | | | | The BCM6368 has a NAND interrupt register with combined status and enable registers. As the BCM6328, BCM6362 and BCM6368 all use v2.1 controllers, the first variant that will work with this driver is the BCM63268 using a v4.0 controller. Set up the device by disabling and acking all interrupts, then handle the CTRL_READY interrupt. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Request and enable the clock if presentSimon Arlott2015-12-091-14/+50
| | | | | | | | | Attempt to enable a clock named "nand" as some SoCs have a clock for the controller that needs to be enabled. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: make use of mtd_to_nand() in NAND driversBoris BREZILLON2015-12-081-6/+6
| | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all NAND drivers to use it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: drop brcmnand_host::of_node fieldBrian Norris2015-12-011-5/+2
| | | | | | | | | | | We don't actually need to stash a copy of this device_node indefinitely; we only need it in brcmnand_init_cs(). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <bcm-kernel-feedback-list@broadcom.com> Cc: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: improve memory managementJulia Lawall2015-11-301-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses two related memory management issues in the probe function: 1. for_each_available_child_of_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; @@ for_each_available_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } // </smpl> 2. The devm_kzalloc'd data is not used if brcmnand_init_cs fails. Free it immediately, using devm_kfree in this case, instead of waiting for the remove function. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* brcmnand: Clear EXT_ADDR error registers in PIO modeSimon Arlott2015-11-301-0/+2
| | | | | | | | | | If an error occurs in flash above 4GB in PIO mode then the EXT_ADDR registers will be set to the location of the error and never cleared. Reset them to 0 before reading. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: drop unused subpage_read() supportBrian Norris2015-11-181-11/+0
| | | | | | | | | AFAIR this driver was never tested with subpage read support, and this code is currently unused because we don't set the NAND_SUBPAGE_READ flag. It can be resurrected if someone tests it properly. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Ray Jui <rjui@broadcom.com>
* mtd: brcmnand: clean up flash cache for parameter pagesBrian Norris2015-11-181-4/+9
| | | | | | | | | | | | | | | | The read_byte() handling for accessing the flash cache has some awkward swapping being done in the read_byte() function. Let's just make this a byte array, and do the swapping with the word-level macros during the initial buffer copy. This is just a refactoring patch, with no (intended) functional change. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Clay McClure <clay@daemons.net> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: <bcm-kernel-feedback-list@broadcom.com> Tested-by: Clay McClure <clay@daemons.net>
* mtd: nand: convert to nand_get_flash_node()Boris BREZILLON2015-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci': ---8<---- virtual patch @@ struct nand_chip c; struct nand_chip *cp; @@ ( -(cp)->flash_node +nand_get_flash_node(cp) | -(c).flash_node +nand_get_flash_node(&c) ) ---8<---- Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: drop unnecessary partition parser dataBrian Norris2015-11-111-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | All of these drivers set up a parser data struct just to communicate DT partition data. This field has been deprecated and is instead supported by telling nand_scan_ident() about the 'flash_node'. This patch: * sets chip->flash_node for those drivers that didn't already (but used OF partitioning) * drops the parser data * switches to the simpler mtd_device_register() where possible, now that we've eliminated one of the auxiliary parameters Now that we've assigned chip->flash_node for these drivers, we can probably rely on nand_dt_init() to do more of the DT parsing for us, but for now, I don't want to fiddle with each of these drivers. The parsing is done in duplicate for now on some drivers. I don't think this should break things. (Famous last words.) (Rolled in some changes by Boris Brezillon) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: convert to nand_set_flash_node()Brian Norris2015-11-111-1/+1
| | | | | | | | | | | | | | | | | | | Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci': ---8<---- virtual patch @@ struct nand_chip *c; struct device_node *d; @@ -(c)->flash_node = (d) +nand_set_flash_node(c, d) ---8<---- Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()Anup Patel2015-10-301-0/+10
| | | | | | | | | | | | | | Just like other NAND controllers, the NAND READID command only works in 8bit mode for all versions of BRCMNAND controller. This patch forces 8bit mode for each NAND CS in brcmnand_init_cs() before doing nand_scan_ident() to ensure that BRCMNAND controller is in 8bit mode when NAND READID command is issued. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: factor out CFG and CFG_EXT bitfieldsBrian Norris2015-10-301-7/+31
| | | | | | | Use enum instead of magic numbers for CFG and CFG_EXT bitfields. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Anup Patel <anup.patel@broadcom.com>
* mtd: nand: pass page number to ecc->write_xxx() methodsBoris BREZILLON2015-10-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Fix pointer type-cast in brcmnand_write()Anup Patel2015-10-121-2/+2
| | | | | | | | | | | | | | | We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: remove unnecessary fields from brcmnand_socBrian Norris2015-09-301-2/+0
| | | | | | | These really aren't needed, especially now that we embed the soc struct in our private struct, so we can stash things there if needed. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: refactor iProc SoC layeringBrian Norris2015-09-301-11/+11
| | | | | | | Removes an unnecessary allocation and saves a little bit of pointer chasing. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: refactor bcm63138 SoC layeringBrian Norris2015-09-301-10/+8
| | | | | | | Removes an unnecessary allocation and saves a little bit of pointer chasing. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: Rename nand_chip .dn to .flash_nodeMarek Vasut2015-09-111-2/+3
| | | | | | | | | Use a more descriptive name for the device_node element in struct nand_chip . This name matches the element name used for device_node property of a flash in the spi-nor framework. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Fix misuse of IS_ENABLEDAxel Lin2015-08-071-2/+2
| | | | | | | | | | | | While IS_ENABLED() is perfectly fine for CONFIG_* symbols, it is not for other symbols such as __BIG_ENDIAN that is provided directly by the compiler. Switch to use CONFIG_CPU_BIG_ENDIAN instead of __BIG_ENDIAN. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: drop unnecessary initializationBrian Norris2015-06-161-1/+1
| | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: do not make local variable staticHauke Mehrtens2015-05-181-1/+1
| | | | | | | | | Remove static in front of ctrl. This variable should not be shared between different instances of brcmnand_probe(), it should be local to this function and stored on the stack. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: remove double new line from printHauke Mehrtens2015-05-181-1/+1
| | | | | | | | The caller already adds a new line and in the other cases there is no new line added. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: add BCM63138 supportBrian Norris2015-05-152-0/+112
| | | | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
* mtd: brcmnand: add support for Broadcom's IPROC familyBrian Norris2015-05-152-0/+153
| | | | Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: add extra SoC support to libraryBrian Norris2015-05-152-5/+71
| | | | | | | | | There are a few small hooks required for chips like BCM63138 and the iProc family. Let's introduce those now. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
* mtd: brcmnand: add support for STB chipsBrian Norris2015-05-152-0/+45
| | | | | | | | BCM7xxx chips are supported entirely by the library code, since they use generic irqchip interfaces and don't need any extra SoC-specific configuration. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: add NAND driver "library" for Broadcom STB NAND controllerBrian Norris2015-05-153-0/+2254
This core originated in Set-Top Box chips (BCM7xxx) but is used in a variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it to those architectures. There are multiple revisions of this core throughout the years, and almost every version broke register compatibility in some small way, but with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0, and v7.1. It's been tested on v5.0, v6.0, v6.1, v7.0, and v7.1 recently, so there hopefully are no more lurking inconsistencies. This patch adds just some library support, on which platform drivers can be built. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
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