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path: root/drivers/mmc/host/sdhci.c
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* mmc: sdhci: introduce get_ro private write-protect hookWolfram Sang2010-10-231-6/+9
| | | | | | | | | | | Some controllers handle their write-protection differently. Introduce a callback to be able to handle it, ensuring the same locking takes place for it. Rename the status variable to make it more obvious why the read from the registers needs to be inverted. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Tested-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: allow for eMMC 74 clock generation by controllerPhilip Rakity2010-10-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Snippet of code for how adaptation layer should handle the call: /* * eMMC spec calls for the host to send 74 clocks to the card * during initialization, right after voltage stabilization. * create the clocks manually right here. */ void generate_init_clocks_A0(struct sdhci_host *host, u8 power_mode) { struct sdhci_mmc_slot *slot = sdhci_priv(host); if (slot->power_mode == MMC_POWER_UP && power_mode == MMC_POWER_ON) { /* controller specific code here */ /* slot->power_mode holds previous power setting */ } slot->power_mode = power_mode; } Signed-off-by: Philip Rakity <prakity@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: highspeed: check for mmc as well as sd cardsPhilip Rakity2010-10-231-2/+3
| | | | | | | | | | The SD and MMC code set highspeed using different constants. Change the sd driver to recognize this and switch to high speed. Validated code when testing eMMC dual data rate. Signed-off-by: Philip Rakity <prakity@marvell.com> [cjb: changelog + indentation fixes] Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: fix "pwr may be used uninitialized" warningGiuseppe Cavallaro2010-10-231-4/+2
| | | | | | | | | | | This patch fixes a warning when compiling the sdhci driver: pwr may be used uninitialized in sdhci_set_power Tested with the following compiler versions: 4.2.4 and 4.4.4 Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: disable MMC_CAP_NEEDS_POLL in nonremovable caseJaehoon Chung2010-10-231-1/+2
| | | | | | | | | | | | | | | | When a controller requires SDHCI_QUIRK_BROKEN_CARD_DETECTION, we poll for card insertion/removal, and that creates interrupts. There's no need to be doing this if we have a non-removable card. This patch requires cards to be removable before we're willing to set MMC_CAP_NEEDS_POLL. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Matt Fleming <matt@console-pimps.org> Acked-by: Wolfram Sang <w.sang@pengutronix.de> [cjb: modified changelog and code indentation] Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: print out controller name for register debugPhilip Rakity2010-10-231-1/+2
| | | | | | | | In a multi-controller environment it is helpful to know which controller has problems. Signed-off-by: Philip Rakity <prakity@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: add MMC_CAP_8_BIT_DATA in the host capabilitiesGiuseppe Cavallaro2010-10-231-1/+1
| | | | | | | | This patch is necessary to gain the performance boost from 8-bit data with the sdhci-stm driver. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: Enable high-speed support for MMC cardsZhangfei Gao2010-10-231-1/+1
| | | | | | | | | | | MMC_CAP_MMC_HIGHSPEED allows MMC and eMMC to negotiate up to 50M instead of the previous limit of 25M. Signed-off-by: Zhangfei Gao <zgao6@marvell.com> Acked-by: Matt Fleming <matt@console-pimps.org> Acked-by: Kyungmin Park <kmpark@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: SDHC 3.0: correct f_min calculation for SD 3.0 specZhangfei Gao2010-10-231-3/+5
| | | | | | | While we're at it, add symbols for SDHCI_MAX_DIV_SPEC_{200,300}. Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: SDHC 3.0: Base clock frequency change in spec 3.0Zhangfei Gao2010-10-231-2/+7
| | | | | | | | | | | | SDHC Spec 3.0: Capabilities Register bits[15-08] are Base Clock Frequency 1.0/2.0: Capabilities Register bits[13-08] are Base Clock Frequency Signed-off-by: Zhangfei Gao <zgao6@marvell.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Matt Fleming <matt@console-pimps.org> Cc: Michal Miroslaw <mirqus@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: SDHC 3.0: support 10-bit divided clock modeZhangfei Gao2010-10-231-5/+20
| | | | | | | | Signed-off-by: Zhangfei Gao <zgao6@marvell.com> Cc: Michał Mirosław <mirqus@gmail.com> Cc: David Vrabel <david.vrabel@csr.com> Reviewed-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: Make consistent use of CONFIG_MMC_DEBUG for "DEBUG"gingGeorge G. Davis2010-10-231-1/+1
| | | | | | | | | | | | | The "6882a8c sdhci: Add better ADMA error reporting" commit added sdhci_show_adma_error() which is built when DEBUG is defined. Since we already have CONFIG_MMC_DEBUG used elsewhere in this driver, may as well make consistent use of that config knob instead. Signed-off-by: George G. Davis <gdavis@mvista.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: Remove distinction between hw and phys segmentsMartin K. Petersen2010-10-231-4/+3
| | | | | | | | | We have deprecated the distinction between hardware and physical segments in the block layer. Consolidate the two limits into one in drivers/mmc/. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* sdhci: add no hi-speed bit quirk supportKyungmin Park2010-08-201-1/+2
| | | | | | | | | | Some SDHCI controllers like s5pc110 don't have an HISPD bit in the HOSTCTL register. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: add auto CMD12 support for eSDHC driverJerry Huang2010-08-111-2/+12
| | | | | | | | | | | | | | | Add auto CMD12 command support for eSDHC driver. This is needed by P4080 and P1022 for block read/write. Manual asynchronous CMD12 abort operation causes protocol violations on these silicons. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: add regulator supportMarek Szyprowski2010-08-111-1/+25
| | | | | | | | | | | | | This patch adds support for regulator API to sdhci core driver. Regulators can be used to disable power in suspended state to reduce dissipated energy. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci-s3c: add support for the non standard minimal clock valueMarek Szyprowski2010-08-111-2/+1
| | | | | | | | | | | | | | | | | | | S3C SDHCI host controller can change the source for generating mmc clock. By default host bus clock is used, what causes some problems on machines with 133MHz bus, because the SDHCI divider cannot be as high get proper clock value for identification mode. This is not a problem for the controller, because it can generate lower frequencies from other clock sources. This patch changes sdhci driver to use get_min_clock() call if it has been provided. This fixes the flood of the following warnings on Samsung S5PV210 SoCs: mmc0: Minimum clock frequency too high for identification mode Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: don't assign mmc->caps at SDHCI directlyKyungmin Park2010-08-111-1/+1
| | | | | | | | | | Some host controllers can set mmc->caps before sdhci_add_host(). Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: 8-bit data transfer width supportKyungmin Park2010-08-111-0/+5
| | | | | | | | | | Some host controllers such as s5pc110 support the WIDE8 feature. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: remove useless set_clock() checkKyungmin Park2010-08-111-1/+1
| | | | | | | | | | When using QUIRK_NONSTANDARD_CLOCK, it checks the set_clock() function which is not used actually. So delete it. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mmc: make sdhci work with ricoh mmc controllerMaxim Levitsky2010-08-111-1/+2
| | | | | | | | | | | | | | | | | | | | The current way of disabling it is not well tested by vendor and has all kinds of bugs that show up on resume from ram/disk. A very good example is a dead SDHCI controller. Old way of disabling is still supported by continuing to use CONFIG_MMC_RICOH_MMC. Based on 'http://list.drzeus.cx/pipermail/sdhci-devel/2007-December/002085.html' Therefore most of the credit for this goes to Andrew de Quincey Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com> Cc: Andrew de Quincey <adq_dvb@lidskialf.net> Acked-by: Philip Langdale <philipl@overt.org> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mmc: remove the "state" argument to mmc_suspend_host()Matt Fleming2010-05-271-1/+1
| | | | | | | | | | | | | | | | | | Even though many mmc host drivers pass a pm_message_t argument to mmc_suspend_host() that argument isn't used the by MMC core. As host drivers are converted to dev_pm_ops they'll have to construct pm_message_t's (as they won't be passed by the PM subsystem any more) just to appease the mmc suspend interface. We might as well just delete the unused paramter. Signed-off-by: Matt Fleming <matt@console-pimps.org> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Michal Miroslaw <mirq-linux@rere.qmqm.pl>ZZ Acked-by: Sascha Sommer <saschasommer@freenet.de> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mmc: s3c6410: add new quirk in sdhci driver and update ADMA descriptor buildThomas Abraham2010-05-271-5/+15
| | | | | | | | | | | | | | | | The s3c6410 sdhci controller does not support the 'End' attribute and NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a new quirk to identify sdhci host contollers with such behaviour. In addition to this, for controllers using the new quirk, the last entry in the ADMA descritor table is marked with the 'End' attribute (instead of using a NOP descriptor with 'End' attribute). Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: implement CAP_CLOCK_BASE_BROKEN quirkAnton Vorontsov2010-05-271-1/+2
| | | | | | | | | | | | | | | | | | Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in CLOCK_BASE capability field, and currently there is no way to force the SDHCI core to use the platform-provided base clock value. This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled, the SDHCI core will always use base clock frequency provided by the platform. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Richard Röjfors <richard.rojfors@pelagicore.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Ben Dooks <ben@simtec.co.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* sdio: sdhci support for suspend mode PM featuresNicolas Pitre2010-03-061-9/+17
| | | | | | | | | Tested with an XO v1.5 from OLPC. Signed-off-by: Nicolas Pitre <nico@marvell.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: improve sdhci sdhci_set_adma_desc() codeBen Dooks2010-03-061-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sdhci_set_adma_desc() is using byte-writes to write data in a specified order into memory. Change to using __le16 for the two byte and __le32 for the four byte cases and use the cpu_to_{le16,le32} to do the conversion before writing. This will reduce the size of the code and the number of writes as we no longer need to chop the data up before writing. As an example on ARM S3C64XX SoC, in little-endian configuration: 000000d4 <sdhci_set_adma_desc>: - d8: e1a0c423 lsr ip, r3, #8 - dc: e1a0ec21 lsr lr, r1, #24 - e0: e1a04821 lsr r4, r1, #16 - e4: e1a05421 lsr r5, r1, #8 - e8: e1a06442 asr r6, r2, #8 - ec: e5c0c001 strb ip, [r0, #1] - f0: e5c0e007 strb lr, [r0, #7] - f4: e5c04006 strb r4, [r0, #6] - f8: e5c05005 strb r5, [r0, #5] - fc: e5c01004 strb r1, [r0, #4] - 100: e5c06003 strb r6, [r0, #3] - 104: e5c02002 strb r2, [r0, #2] - 108: e5c03000 strb r3, [r0] + d4: e5801004 str r1, [r0, #4] + d8: e1c030b0 strh r3, [r0] + dc: e1c020b2 strh r2, [r0, #2] Signed-off-by: Ben Dooks <ben-linux@fluff.org> Cc: Pierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: add adma descriptor set callBen Dooks2010-03-061-30/+20
| | | | | | | | | | | | | The code to write the ADMA descriptor into memory is repeated several times throughout sdhci_adma_table_pre, and thus should be moved into a common function. This will also be useful if the patch to make the write more efficient is accepted. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Cc: Pierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: increase timeout for internal clock stabilization.Chris Ball2009-09-231-2/+2
| | | | | | | | | | | | | | | | | | | On an OLPC XO-1.5 development board with Via VX855 chipset, the sdhci controller can take up to 12ms to stabilize its clock, but the current timeout at which we give up on the controller is 10ms. The patch increases the timeout delay rather than using a device-specific quirk -- since we exit the loop when the clock comes up, increasing the timeout value will only make us mdelay() longer in the errant case of a device with a clock that is not stabilizing, which it seems worth waiting a little longer for in general. Signed-off-by: Chris Ball <cjb@laptop.org> Cc: Harald Welte <HaraldWelte@viatech.com> Acked-by: Pierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: support for ADMA only hostsRichard Röjfors2009-09-231-20/+18
| | | | | | | | | | | Add support for ADMA on SDHCI hosts, not supporting SDMA. According to the SDHCI specifications a host can support ADMA but not SDMA Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci-of: fix high-speed cards recognitionAnton Vorontsov2009-09-231-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | eSDHC fails to recognize some SDHS cards, throwing timeout errors: mmc0: error -110 whilst initialising SD card That's because we calculate timeout value in a wrong way: on eSDHC hosts the timeout clock is derivied from the SD clock, which is set dynamically. As David Vrabel suggested, deriving timeout clock from SD clock is a common scheme, so let's implement DATA_TIMEOUT_USES_SDCLK quirk and use it for eSDHC hosts. Also, from now on we don't need esdhc_get_timeout_clock() callback, so remove it. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: David Vrabel <david.vrabel@csr.com> Cc: Ben Dooks <ben@fluff.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: be more strict with get_min_clock() usageAnton Vorontsov2009-09-231-1/+2
| | | | | | | | | | | | | | | | | get_min_clock() makes sense only with NONSTANDARD_CLOCK quirk and when set_clock() callback is specified. The patch should cause no functional changes, it just makes the code self-documented and avoids any possible misuse of get_min_clock(). Suggested-by: Pierre Ossman <pierre@ossman.eu> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Ian Molton <ian@mnementh.co.uk> Cc: Matt Fleming <matt@console-pimps.org> Cc: Philip Langdale <philipl@overt.org> Cc: Pierre Ossman <pierre@ossman.eu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: use SG_MITER_TO_SG/SG_MITER_FROM_SGSebastian Andrzej Siewior2009-07-311-2/+8
| | | | | | | so the page will be flushed on unmap on ARCH which need it. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: get rid of "frequency too high" flood when using eSDHCAnton Vorontsov2009-07-291-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 8dfd0374be84793360db7fff2e635d2cd3bbcb21 ("MMC core: limit minimum initialization frequency to 400kHz") MMC core checks for minimum frequency, and that causes following messages flood when using eSDHC controllers: ... mmc0: Minimum clock frequency too high for identification mode mmc0: Minimum clock frequency too high for identification mode ... The warnings are legitimate, since if we'd use 133 MHz clocks for standard SDHCI controllers, we'd not able to scale frequency down to 400 kHz. But eSDHC controllers have a non-standard SD clock management, so we can divide clock by 256 * 16, not just 256. This patch introduces get_min_clock() callback for sdhci core and implements it for sdhci-of driver, and thus fixes the issue. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Matt Fleming <matt@console-pimps.org> Cc: Ian Molton <ian@mnementh.co.uk> Cc: "Roberto A. Foglietta" <roberto.foglietta@gmail.com> Cc: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sdhci: remove needless double parenthesisPierre Ossman2009-06-211-3/+3
| | | | Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Specific quirk vor VIA SDHCI controller in VX855ESHarald Welte2009-06-211-0/+7
| | | | | | | | | | The SDHCI controller found in the VX855ES requires 10ms delay between applying power and applying clock. This issue has been discovered and documented by the OLPC XO1.5 team. Signed-off-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Add support for hosts that are only capable of 1-bit transfersAnton Vorontsov2009-06-211-1/+4
| | | | | | | | | | | | | | | Some hosts (hardware configurations, or particular SD/MMC slots) may not support 4-bit bus. For example, on MPC8569E-MDS boards we can switch between serial (1-bit only) and nibble (4-bit) modes, thought we have to disable more peripherals to work in 4-bit mode. Along with some small core changes, this patch modifies sdhci-of driver, so that now it looks for "sdhci,1-bit-only" property in the device-tree, and if specified we enable a proper quirk. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Add SDHCI_QUIRK_NO_MULTIBLOCK quirkBen Dooks2009-06-211-1/+1
| | | | | | | | | | Add quirk to show the controller cannot do multi-block IO. This is mainly for the Samsung SDHCI controller that currently cannot manage to do multi-block PIO without timing out. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Add better ADMA error reportingBen Dooks2009-06-211-1/+33
| | | | | | | | | Update the ADMA error reporting to not only show the overall controller state but also to print the ADMA descriptor list. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Print ADMA status and pointer on debugBen Dooks2009-06-131-0/+5
| | | | | | | | | If using ADMA, then we should print the ADMA error and current pointer in sdhci_dumpregs() when any debug is requested. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: avoid changing voltage needlesslyPierre Ossman2009-06-131-25/+28
| | | | | | | | Because of granularity issues, sometimes we told the hardware to change to the voltage we were already at. Rework the logic so this doesn't happen. Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* New mail address for Pierre OssmanPierre Ossman2009-04-081-1/+1
| | | | Signed-off-by: Pierre Ossman <pierre@ossman.eu>
* sdhci: Add quirk for forcing maximum block size to 2048 bytesAnton Vorontsov2009-03-241-7/+13
| | | | | | | | | | | | | FSL eSDHC controllers can support maximum block size up to 4096 bytes, the MBL (Maximum Block Length) field in the capabilities register extended by one bit, and is set to 0x3. But the SDHCI core doesn't support blocks of 4096 bytes, and thus forces blksz to the lowest value -- 512 bytes. With this patch we can pin up the blksz to the maximum supported block size, i.e. 2048 bytes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add quirk for controllers that need IRQ re-init after resetAnton Vorontsov2009-03-241-0/+7
| | | | | | | | FSL eSDHC controllers losing signal/interrupt enable states after reset, so we should re-enable them. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add quirk for controllers that need small delays for PIOAnton Vorontsov2009-03-241-0/+3
| | | | | | | | | | | Small udelay is needed to make eSDHC work in PIO mode. Without the delay reading causes endless interrupt storm, and writing corrupts data. The first guess would be that we must wait for some bit in some register, but I didn't find any reliable bits that change before and after the delay. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add set_clock callback and a quirk for nonstandard clocksAnton Vorontsov2009-03-241-0/+6
| | | | | | | | | | | | | | | FSL eSDHC hosts have incompatible register map to manage the SDCLK. This patch adds set_clock callback so that drivers could overwrite set_clock behaviour. Similar patch[1] was posted by Ben Dooks, though in Ben's version the callback is named change_clock, plus the patch has some unrelated bits that makes the patch difficult to reuse. [1] http://lkml.org/lkml/2008/12/2/160 Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add get_{max,timeout}_clock callbacksBen Dooks2009-03-241-7/+15
| | | | | | | | | | | | | | | Some controllers do not provide clock information in their capabilities (in the Samsung case, it is because there are multiple clock sources available to the controller). Add hooks to allow the system to supply clock information. p.s. In the original Ben's patch there was a bug that makes sdhci_add_host() return -ENODEV even if callbacks were specified. This is fixed now. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add support for hosts reporting inverted write-protect stateAnton Vorontsov2009-03-241-0/+2
| | | | | | | | | | | This patch adds SDHCI_QUIRK_INVERTED_WRITE_PROTECT quirk. When specified, the sdhci driver will invert WP state. p.s. Actually, the quirk is more board-specific than controller-specific. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Add support for card-detection pollingAnton Vorontsov2009-03-241-2/+15
| | | | | | | | | | | | | | | This patch adds SDHCI_QUIRK_BROKEN_CARD_DETECTION quirk. When specified, sdhci driver will set MMC_CAP_NEEDS_POLL MMC host capability, and won't enable card insert/remove interrupts. This is needed for hosts with unreliable card detection, such as FSL eSDHC. The original eSDHC driver was tring to "debounce" card-detection IRQs by reading present state and disabling particular interrupts. But with this debouncing scheme I noticed that sometimes we miss card insertion/removal events. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* sdhci: Enable only relevant (DMA/PIO) interrupts during transfersAnton Vorontsov2009-03-241-3/+14
| | | | | | | | | | | | Some hosts (that is, FSL eSDHC) throw PIO interrupts during DMA transfers, this causes tons of unneeded interrupts, and thus highly degraded speed. This patch modifies the driver so that now we only enable relevant (DMA or PIO) interrupts during transfers. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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