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path: root/drivers/mmc/host/pxamci.c
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* pxamci: fix byte aligned DMA transfersPhilipp Zabel2008-07-061-0/+13
| | | | | | | | | | | | | | | The pxa27x DMA controller defaults to 64-bit alignment. This caused the SCR reads to fail (and, depending on card type, error out) when card->raw_scr was not aligned on a 8-byte boundary. For performance reasons all scatter-gather addresses passed to pxamci_request should be aligned on 8-byte boundaries, but if this can't be guaranteed, byte aligned DMA transfers in the have to be enabled in the controller to get correct behaviour. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mmc: fix platform driver hotplug/coldplugKay Sievers2008-04-151-0/+2
| | | | | | | | | | | | | | | Since 43cc71eed1250755986da4c0f9898f9a635cb3bf, the platform modalias is prefixed with "platform:". Add MODULE_ALIAS() to the hotpluggable MMC host platform drivers, to re-enable auto loading. Also, add missing owner declarations in driver init. [dbrownell@users.sourceforge.net: registration fixes] Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [ARM] 4711/1: pxa: mmc: move DMA specific code to platform layerBridge Wu2008-01-261-7/+23
| | | | | | | | | | | This patch is to move pxamci DMA specific code to corresponding platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes the driver code dedicated to platform which is not extensible. It is applicable to all pxa platforms. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4709/1: pxa: mmc: add 26MHz support for pxa3[0|1]0 mmc controllerBridge Wu2008-01-261-9/+22
| | | | | | | | | | | | | | | pxa3[0|1]0 mmc controller can support 26MHz clock mode, they support SD spec 1.1 and MMC spec 4.0 which specify high speed mode. So host caps will include MMC_CAP_MMC_HIGHSPEED and MMC_CAP_SD_HIGHSPEED for pxa3[0|1]0. This patch is to add 26MHz support for them. pxa host clock will be set to 26MHz mode when the card supported max clock rate is higher than or equal to 26MHz. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Acked-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix pxamci regressionRussell King2007-10-311-2/+9
| | | | | | | | | | | | | | | | Fix: WARNING: at arch/arm/mach-pxa/clock.c:69 clk_disable() [<c002d7c8>] (dump_stack+0x0/0x14) from [<c00334f4>] (clk_disable+0x34/0xa0) [<c00334c0>] (clk_disable+0x0/0xa0) from [<c028a43c>] (pxamci_set_ios+0x74/0xf0) [<c028a3c8>] (pxamci_set_ios+0x0/0xf0) from [<c0281548>] (mmc_power_off+0x90/0x9c) [<c02814b8>] (mmc_power_off+0x0/0x9c) from [<c0281a30>] (mmc_start_host+0x18/0x28) [<c0281a18>] (mmc_start_host+0x0/0x28) from [<c02825a0>] (mmc_add_host+0xe8/0x104) [<c02824b8>] (mmc_add_host+0x0/0x104) from [<c028a7d0>] (pxamci_probe+0x24c/0x2f4) [<c028a584>] (pxamci_probe+0x0/0x2f4) from [<c01e5948>] (platform_drv_probe+0x20/0x24) ... Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* mmc: sg falloutJens Axboe2007-10-241-1/+0
| | | | | | | Do a full scan of the directory to try and be a bit more proactive, instead of waiting for things to break. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* [ARM] pxa: update PXA MMC interface driver to use clk supportRussell King2007-10-121-7/+36
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* pxamci: support arbitrary block sizeNicolas Pitre2007-10-101-3/+16
| | | | | | | | | | | | | | | | The PXA has two transmit FIFOes, each32 byte deep. when one FIFO is full and the other one has been transmitted, they are automatically swapped and DMA is triggered for another 32 byte burst. However, when there is less than 32 bytes left to send, the FIFO swap has to be done manually. This is required for some SDIO transfers which are not required to be multiples of 32 bytes. A DMA completion interrupt is set for each descriptor which length isn't a multiple of 32 in order to force the FIFO swap. While at it, the DMA interrupt handler has been made a bit more resilient against errors. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: pxamci: add SDIO card interrupt reporting capabilityBridge Wu2007-09-251-5/+23
| | | | | | | | Again, only available from PXA27x. Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: pxamci: set proper buswidth capabilities according to PXA flavorBridge Wu2007-09-251-1/+9
| | | | | | | | From PXA27x, it is possible to do 4-bit data transfers. Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: pxamci: set proper block capabilities according to PXA flavorNicolas Pitre2007-09-251-2/+2
| | | | | | | From PXA27x, it is possible to do 2048-byte block transfers. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: pxamci: better pending IRQ determinationBridge Wu2007-09-251-1/+1
| | | | | | | | | Pending interrupts should be determined from both I_REG and I_MASK registers. Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: remove custom error codesPierre Ossman2007-09-231-6/+6
| | | | | | | Convert the MMC layer to use standard error codes and not its own, incompatible values. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: update header file pathsPierre Ossman2007-07-261-1/+1
| | | | | | | Make sure all headers in the files reflect their true position in the tree. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* pxamci: fix PXA27x MMC workaround for bad CRC with 136 bit responseNicolas Pitre2007-05-141-12/+6
| | | | | | | ... and make it depend on the response flag instead of the command type. Signed-off-by: Nicolas Pitre <npitre@mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-05-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (82 commits) [ARM] Add comments marking in-use ptrace numbers [ARM] Move syscall saving out of the way of utrace [ARM] 4360/1: S3C24XX: regs-udc.h remove unused macro [ARM] 4358/1: S3C24XX: mach-qt2410.c: remove linux/mmc/protocol.h header [ARM] mm 10: allow memory type to be specified with ioremap [ARM] mm 9: add additional device memory types [ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6 [ARM] iop: add missing parens in macro [ARM] mm 7: remove duplicated __ioremap() prototypes ARM: OMAP: fix OMAP1 mpuio suspend/resume oops ARM: OMAP: MPUIO wake updates ARM: OMAP: speed up gpio irq handling ARM: OMAP: plat-omap changes for 2430 SDP ARM: OMAP: gpio object shrinkage, cleanup ARM: OMAP: /sys/kernel/debug/omap_gpio ARM: OMAP: Implement workaround for GPIO wakeup bug in OMAP2420 silicon ARM: OMAP: Enable 24xx GPIO autoidling [ARM] 4318/2: DSM-G600 Board Support [ARM] 4227/1: minor head.S fixups [ARM] 4328/1: Move i.MX UART regs to driver ...
* mmc: Move host and card drivers to subdirsPierre Ossman2007-05-011-0/+616
Clean up the drivers/mmc directory by moving card and host drivers into subdirectories. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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