op-kernel-dev - Development kernel branch for OpenPOWER systems

	Commit message (Collapse)	Author	Age	Files	Lines
*	memory/mediatek: add support for mt2701	Honghui Zhang	2016-06-21	1	-18/+149
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Mediatek SMI has two generations of HW architecture, mt8173 uses the second generation of SMI HW while mt2701 uses the first generation HW of SMI. There's slight differences between the two generations, for generation 2, the register which control the iommu port access PA or IOVA is at each larb's register base. But for generation 1, the register is at smi ao base(smi always on register base). Besides that, the smi async clock should be prepared and enabled for SMI generation 1 HW to transform the smi clock into emi clock domain, but is not needed for SMI generation 2. This patch add SMI driver for mt2701 which use generation 1 SMI HW. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
*	memory: mtk-smi: export mtk_smi_larb_get/put	Philipp Zabel	2016-05-06	1	-0/+2
\| \| \| \| \| \| \| \|	To allow building mediatek-drm.ko as a module, the mtk_smi_larb_get and mtk_smi_larb_put symbols have to be exported. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
*	memory: mediatek: Add SMI driver	Yong Wu	2016-02-25	1	-0/+273
	This patch add SMI(Smart Multimedia Interface) driver. This driver is responsible to enable/disable iommu and control the power domain and clocks of each local arbiter. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Tested-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>