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path: root/drivers/irqchip/spear-shirq.c
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* irq: spear-shirq: Fix race in installing chained IRQ handlerRussell King2015-06-181-2/+1
| | | | | | | | | | | | | | | | | Fix a race where a pending interrupt could be received and the handler called before the handler's data has been setup, by converting to irq_set_chained_handler_and_data(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4z0X-0002T1-6U@rmk-PC.arm.linux.org.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: spear_shirq: Simplify register access codeThomas Gleixner2014-06-241-45/+16
| | | | | | | | | | The extra register data structure is pointless. Move the offsets of the status and the mask register into the shirq block structure. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.923306179@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Use proper irq chips for the different SoCsThomas Gleixner2014-06-241-52/+45
| | | | | | | | | | | | | Only spear300 has an actual mask register for the RAS interrupts. Add an irq chip pointer to the shirq struct and initialize spear300 with the actual implementation and the others with dummy_irq_chip. The disabled RAS3 block has no irq chip assigned, so we can check for this and remove the disabled member. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.831341023@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Remove the parent irq "ack"/unmaskThomas Gleixner2014-06-241-6/+0
| | | | | | | | | | | "ack" is actually a mask in the parent irq. The demultiplexer and the handlers run with interrupts disabled. No point in masking and unmasking the parent. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.754300980@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Simplify chained handlerThomas Gleixner2014-06-241-11/+8
| | | | | | | | | | I don't know if there are less efficient ways to code that. Get rid of the loop mess and use efficient code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.662897061@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Kill the clear_reg nonsenseThomas Gleixner2014-06-241-34/+1
| | | | | | | | | | | None of the chips has a ACK register. The code brainlessly fiddles with the enable register, so it might even reenable a disabled interrupt at least on spear300. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.570396433@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Precalculate status maskThomas Gleixner2014-06-241-1/+12
| | | | | | | | | Calculate the status mask at compile time, not at runtime. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.496614337@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Use the proper interfacesThomas Gleixner2014-06-241-5/+5
| | | | | | | | | | No point in doing a full irq lookup, when the desc pointer is available. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.404243909@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Reorder the spear320 ras blocksThomas Gleixner2014-06-241-13/+13
| | | | | | | | | Order the ras blocks in the order of interrupts not alphabetically. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.310591579@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Namespace cleanupThomas Gleixner2014-06-241-53/+53
| | | | | | | | | | The struct members of the shirq block struct are named to confuse the hell out of the casual reader. Clean it up. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.219411832@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: No point in storing the parent irqThomas Gleixner2014-06-241-9/+8
| | | | | | | | | The struct member is pointless and a nismomer as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.129694036@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Move private structs to sourceThomas Gleixner2014-06-241-7/+45
| | | | | | | | | | No point in having them in a separate header file. Make the init functions static. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.038658058@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Kill pointless staticThomas Gleixner2014-06-241-1/+1
| | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212712.948802939@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: spear_shirq: Fix interrupt offsetThomas Gleixner2014-06-211-1/+1
| | | | | | | | | | | | | | | | | The ras3 block on spear320 claims to have 3 interrupts. In fact it has one and 6 reserved interrupts. Account the 6 reserved to this block so it has 7 interrupts total. That matches the datasheet and the device tree entries. Broken since commit 80515a5a(ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT). Testing is overrated.... Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212712.872379208@linutronix.de Fixes: 80515a5a2e3c ('ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT') Cc: <stable@vger.kernel.org> # v3.8+ Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Shiraz has movedViresh Kumar2014-04-181-1/+1
| | | | | | | | | | | | shiraz.hashim@st.com email-id doesn't exist anymore as he has left the company. Replace ST's id with shiraz.linux.kernel@gmail.com. It also updates .mailmap file to fix address for 'git shortlog'. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: spear: use common irqchip_init functionRob Herring2013-01-121-0/+5
| | | | | | | | | | Convert spear DT irq initialization over to use common irqchip_init function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
* ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/Viresh Kumar2012-11-261-0/+316
This patch moves shirq interrupt controllers driver and header file out of plat-spear directory. It is moved to drivers/irqchip/ directory. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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