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* ACPI: Clean up inclusions of ACPI header filesLv Zheng2013-12-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace direct inclusions of <acpi/acpi.h>, <acpi/acpi_bus.h> and <acpi/acpi_drivers.h>, which are incorrect, with <linux/acpi.h> inclusions and remove some inclusions of those files that aren't necessary. First of all, <acpi/acpi.h>, <acpi/acpi_bus.h> and <acpi/acpi_drivers.h> should not be included directly from any files that are built for CONFIG_ACPI unset, because that generally leads to build warnings about undefined symbols in !CONFIG_ACPI builds. For CONFIG_ACPI set, <linux/acpi.h> includes those files and for CONFIG_ACPI unset it provides stub ACPI symbols to be used in that case. Second, there are ordering dependencies between those files that always have to be met. Namely, it is required that <acpi/acpi_bus.h> be included prior to <acpi/acpi_drivers.h> so that the acpi_pci_root declarations the latter depends on are always there. And <acpi/acpi.h> which provides basic ACPICA type declarations should always be included prior to any other ACPI headers in CONFIG_ACPI builds. That also is taken care of including <linux/acpi.h> as appropriate. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Tony Luck <tony.luck@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> (drivers/pci stuff) Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> (Xen stuff) Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* iommu/amd: Clean up unnecessary MSI/MSI-X capability findYijing Wang2013-08-141-1/+1
| | | | | | | | | | | | | | | PCI core will initialize device MSI/MSI-X capability in pci_msi_init_pci_dev(). So device driver should use pci_dev->msi_cap/msix_cap to determine whether the device support MSI/MSI-X instead of using pci_find_capability(pci_dev, PCI_CAP_ID_MSI/MSIX). Access to PCIe device config space again will consume more time. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: iommu@lists.linux-foundation.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
* perf/x86/amd: Add IOMMU Performance Counter resource managementSteven L Kinney2013-06-191-9/+131
| | | | | | | | | | | | | | | Add functionality to check the availability of the AMD IOMMU Performance Counters and export this functionality to other core drivers, such as in this case, a perf AMD IOMMU PMU. This feature is not bound to any specific AMD family/model other than the presence of the IOMMU with P-C enabled. The AMD IOMMU P-C support static counting only at this time. Signed-off-by: Steven Kinney <steven.kinney@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1370466709-3212-2-git-send-email-suravee.suthikulpanit@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* Merge tag 'iommu-updates-v3.10' of ↵Linus Torvalds2013-05-061-16/+138
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "The updates are mostly about the x86 IOMMUs this time. Exceptions are the groundwork for the PAMU IOMMU from Freescale (for a PPC platform) and an extension to the IOMMU group interface. On the x86 side this includes a workaround for VT-d to disable interrupt remapping on broken chipsets. On the AMD-Vi side the most important new feature is a kernel command-line interface to override broken information in IVRS ACPI tables and get interrupt remapping working this way. Besides that there are small fixes all over the place." * tag 'iommu-updates-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (24 commits) iommu/tegra: Fix printk formats for dma_addr_t iommu: Add a function to find an iommu group by id iommu/vt-d: Remove warning for HPET scope type iommu: Move swap_pci_ref function to drivers/iommu/pci.h. iommu/vt-d: Disable translation if already enabled iommu/amd: fix error return code in early_amd_iommu_init() iommu/AMD: Per-thread IOMMU Interrupt Handling iommu: Include linux/err.h iommu/amd: Workaround for ERBT1312 iommu/amd: Document ivrs_ioapic and ivrs_hpet parameters iommu/amd: Don't report firmware bugs with cmd-line ivrs overrides iommu/amd: Add ioapic and hpet ivrs override iommu/amd: Add early maps for ioapic and hpet iommu/amd: Extend IVRS special device data structure iommu/amd: Move add_special_device() to __init iommu: Fix compile warnings with forward declarations iommu/amd: Properly initialize irq-table lock iommu/amd: Use AMD specific data structure for irq remapping iommu/amd: Remove map_sg_no_iommu() iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets ...
| * iommu/amd: fix error return code in early_amd_iommu_init()Wei Yongjun2013-04-231-0/+1
| | | | | | | | | | | | | | | | Fix to return -ENOMEM int the memory alloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/AMD: Per-thread IOMMU Interrupt HandlingSuravee Suthikulpanit2013-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current interrupt handling scheme, there are as many threads as the number of IOMMUs. Each thread is created and assigned to an IOMMU at the time of registering interrupt handlers (request_threaded_irq). When an IOMMU HW generates an interrupt, the irq handler (top half) wakes up the corresponding thread to process event and PPR logs of all IOMMUs starting from the 1st IOMMU. In the system with multiple IOMMU,this handling scheme complicates the synchronization of the IOMMU data structures and status registers as there could be multiple threads competing for the same IOMMU while the other IOMMU could be left unhandled. To simplify, this patch is proposing a different interrupt handling scheme by having each thread only managing interrupts of the corresponding IOMMU. This can be achieved by passing the struct amd_iommu when registering the interrupt handlers. This structure is unique for each IOMMU and can be used by the bottom half thread to identify the IOMMU to be handled instead of calling for_each_iommu. Besides this also eliminate the needs to lock the IOMMU for processing event and PPR logs. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Don't report firmware bugs with cmd-line ivrs overridesJoerg Roedel2013-04-191-3/+16
| | | | | | | | | | | | | | | | | | | | | | When the IVRS entries for IOAPIC and HPET are overridden on the kernel command line, a problem detected in the check function might not be a firmware bug anymore. So disable the firmware bug reporting if the user provided valid ivrs_ioapic or ivrs_hpet entries on the command line. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Add ioapic and hpet ivrs overrideJoerg Roedel2013-04-191-2/+62
| | | | | | | | | | | | | | | | | | | | | | | | Add two new kernel commandline parameters ivrs_ioapic and ivrs_hpet to override the Id->DeviceId mapping from the IVRS ACPI table. This can be used to work around broken BIOSes to get interrupt remapping working on AMD systems. Tested-by: Borislav Petkov <bp@suse.de> Tested-by: Suravee Suthikulanit <suravee.suthikulpanit@amd.com> Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Add early maps for ioapic and hpetJoerg Roedel2013-04-191-0/+38
| | | | | | | | | | | | | | | | | | This is needed in a later patch were ioapic_map and hpet_map entries are created before the slab allocator is initialized (and thus add_special_device() can't be used). Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Extend IVRS special device data structureJoerg Roedel2013-04-191-10/+20
| | | | | | | | | | | | | | | | | | This patch extends the devid_map data structure to allow ioapic and hpet entries in ivrs to be overridden on the kernel command line. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Move add_special_device() to __initJoerg Roedel2013-04-191-1/+1
| | | | | | | | | | | | | | | | The function is only called by other __init functions, so it can be moved to __init too. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* | Merge tag 'pci-v3.10-changes' of ↵Linus Torvalds2013-04-291-20/+20
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes for the v3.10 merge window: PCI device hotplug - Remove ACPI PCI subdrivers (Jiang Liu, Myron Stowe) - Make acpiphp builtin only, not modular (Jiang Liu) - Add acpiphp mutual exclusion (Jiang Liu) Power management - Skip "PME enabled/disabled" messages when not supported (Rafael Wysocki) - Fix fallback to PCI_D0 (Rafael Wysocki) Miscellaneous - Factor quirk_io_region (Yinghai Lu) - Cache MSI capability offsets & cleanup (Gavin Shan, Bjorn Helgaas) - Clean up EISA resource initialization and logging (Bjorn Helgaas) - Fix prototype warnings (Andy Shevchenko, Bjorn Helgaas) - MIPS: Initialize of_node before scanning bus (Gabor Juhos) - Fix pcibios_get_phb_of_node() declaration "weak" annotation (Gabor Juhos) - Add MSI INTX_DISABLE quirks for AR8161/AR8162/etc (Xiong Huang) - Fix aer_inject return values (Prarit Bhargava) - Remove PME/ACPI dependency (Andrew Murray) - Use shared PCI_BUS_NUM() and PCI_DEVID() (Shuah Khan)" * tag 'pci-v3.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits) vfio-pci: Use cached MSI/MSI-X capabilities vfio-pci: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK PCI: Remove "extern" from function declarations PCI: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK PCI: Drop msi_mask_reg() and remove drivers/pci/msi.h PCI: Use msix_table_size() directly, drop multi_msix_capable() PCI: Drop msix_table_offset_reg() and msix_pba_offset_reg() macros PCI: Drop is_64bit_address() and is_mask_bit_support() macros PCI: Drop msi_data_reg() macro PCI: Drop msi_lower_address_reg() and msi_upper_address_reg() macros PCI: Drop msi_control_reg() macro and use PCI_MSI_FLAGS directly PCI: Use cached MSI/MSI-X offsets from dev, not from msi_desc PCI: Clean up MSI/MSI-X capability #defines PCI: Use cached MSI-X cap while enabling MSI-X PCI: Use cached MSI cap while enabling MSI interrupts PCI: Remove MSI/MSI-X cap check in pci_msi_check_device() PCI: Cache MSI/MSI-X capability offsets in struct pci_dev PCI: Use u8, not int, for PM capability offset [SCSI] megaraid_sas: Use correct #define for MSI-X capability PCI: Remove "extern" from function declarations ...
| * iommu/amd: Remove calc_devid() and use PCI_DEVID() from PCIShuah Khan2013-03-261-3/+3
| | | | | | | | | | | | | | Change to remove calc_devid() and use PCI_DEVID() from PCI instead. Signed-off-by: Shuah Khan <shuah.khan@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joerg Roedel <joro@8bytes.org>
| * iommu/amd: Remove local PCI_BUS() define and use PCI_BUS_NUM() from PCIShuah Khan2013-03-261-17/+17
| | | | | | | | | | | | | | | | Change to remove local PCI_BUS() define and use the new PCI_BUS_NUM() interface from PCI. Signed-off-by: Shuah Khan <shuah.khan@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joerg Roedel <joro@8bytes.org>
* | amd_iommu_init: remove __init from amd_iommu_erratum_746_workaroundNikola Pajkovsky2013-03-091-1/+1
|/ | | | | | | | | | | | | | commit 318fe78 ("IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround") added amd_iommu_erratum_746_workaround and it's marked as __init, which is wrong WARNING: drivers/iommu/built-in.o(.text+0x639c): Section mismatch in reference from the function iommu_init_pci() to the function .init.text:amd_iommu_erratum_746_workaround() The function iommu_init_pci() references the function __init amd_iommu_erratum_746_workaround(). This is often because iommu_init_pci lacks a __init annotation or the annotation of amd_iommu_erratum_746_workaround is wrong. Signed-off-by: Nikola Pajkovsky <npajkovs@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/amd: Initialize device table after dma_opsJoerg Roedel2013-02-071-5/+5
| | | | | | | | | | | | When dma_ops are initialized the unity mappings are created. The init_device_table_dma() function makes sure DMA from all devices is blocked by default. This opens a short window in time where DMA to unity mapped regions is blocked by the IOMMU. Make sure this does not happen by initializing the device table after dma_ops. Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
* IOMMU, AMD Family15h Model10-1Fh erratum 746 WorkaroundSuravee Suthikulpanit2013-01-281-0/+34
| | | | | | | | | | | | | | | | | The IOMMU may stop processing page translations due to a perceived lack of credits for writing upstream peripheral page service request (PPR) or event logs. If the L2B miscellaneous clock gating feature is enabled the IOMMU does not properly register credits after the log request has completed, leading to a potential system hang. BIOSes are supposed to disable L2B micellaneous clock gating by setting L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This patch corrects that for those which do not enable this workaround. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Acked-by: Borislav Petkov <bp@suse.de> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/amd: Work around wrong IOAPIC device-id in IVRS tableJoerg Roedel2012-10-161-7/+32
| | | | | | | | | | | | | On some systems the BIOS puts the wrong device-id for the IO-APIC into the IVRS table. The result is that interrupt remapping is not working for the IO-APIC irqs. This usually means a kernel panic at boot because the timer is not working. Fix this kernel panic by disabling interrupt remapping if this problem is discovered in the IVRS table. Reported-by: Andrew Oakley <andrew@ado.is-a-geek.net> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
*---. Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', ↵Joerg Roedel2012-10-021-20/+233
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | 'x86/amd', 'x86/vt-d' and 'x86/amd-irq-remapping' into next Conflicts: drivers/iommu/amd_iommu_init.c
| | | * iommu/amd: Print message to system log when irq remapping is enabledJoerg Roedel2012-09-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Print an indicator to dmesg to easily find out if interrupt remapping is enabled of a given system. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Make sure irq remapping still works on dma init failureJoerg Roedel2012-09-281-9/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not deinitialize the AMD IOMMU driver completly when interrupt remapping is already in use but the initialization of the DMA layer fails for some reason. Make sure the IOMMU can still be used to remap interrupts. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Add initialization routines for AMD interrupt remappingJoerg Roedel2012-09-281-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the six routines required to setup interrupt remapping with the AMD IOMMU. Also put it all together into the AMD specific irq_remap_ops. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Make sure IOMMU is not considered to translate itselfJoerg Roedel2012-09-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IVRS table usually includes the IOMMU device. But the IOMMU does never translate itself, so make sure the IOMMU driver knows this. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Split device table initialization into irq and dma partJoerg Roedel2012-09-281-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the IOMMU is enabled very early (as with irq-remapping) some devices are still in BIOS hand. When dma is blocked early this can cause lots of IO_PAGE_FAULTs. So delay the DMA initialization and do it right before the dma_ops are initialized. To be secure, block all interrupts by default when irq-remapping is enabled in the system. They will be reenabled on demand later. Without blocking interrupts by default devices can issue arbitrary interrupts by sending special DMA packets to the CPU that look like MSI messages. This is especially dangerous when a device is assigned to a KVM guest because the guest can then DoS the host. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Check if IOAPIC information is correctJoerg Roedel2012-09-281-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the IOAPIC information provided in the IVRS table is not correct or not complete the system may not boot at all when interrupt remapping is enabled. So check if this information is correct and print out a firmware bug message when it is not. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Allocate data structures to keep track of irq remapping tablesJoerg Roedel2012-09-281-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To easily map device ids to interrupt remapping table entries a new lookup table is necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Add slab-cache for irq remapping tablesJoerg Roedel2012-09-281-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq remapping tables for the AMD IOMMU need to be aligned on a 128 byte boundary. Create a seperate slab-cache to guarantee this alignment. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Keep track of HPET and IOAPIC device idsJoerg Roedel2012-09-281-2/+66
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | The IVRS ACPI table provides information about the IOAPICs and the HPETs available in the system and which PCI device ID they use in transactions. Save that information for later usage in interrupt remapping. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
| | * iommu/amd: Fix features reportingBorislav Petkov2012-09-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the AMD IOMMU doesn't have extended features, an empty line gets issued in dmesg like so: [ 3.061417] AMD-Vi: Found IOMMU at 0000:00:00.2 cap 0x40 [ 3.066757] <--- [ 3.068294] pci 0000:00:00.2: irq 72 for MSI/MSI-X [ 3.081213] AMD-Vi: Lazy IO/TLB flushing enabled Fix it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/amd: Fix some typosFrank Arnold2012-09-181-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Fix some typos in comments and user-visible messages. No functional changes. Signed-off-by: Frank Arnold <frank.arnold@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/amd: remove duplicated include from amd_iommu_init.cWei Yongjun2012-09-181-1/+0
| |/ |/| | | | | | | | | | | Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Fix wrong check for ARRAY_SIZE()Joerg Roedel2012-08-101-1/+1
| | | | | | | | | | | | | | The check in the for-loop is broken. Fix it and the boot-crash it causes in AMD IOMMUv2 systems. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Fix pci_request_acs() call-placeJoerg Roedel2012-08-061-3/+3
|/ | | | | | | | The pci_request_acs() function needs to be called before PCI probing to be effective. So move it to another call-place to ensure that. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Convert iommu initialization to state machineJoerg Roedel2012-07-171-64/+109
| | | | | | | | | | This step makes it very easy to keep track about the current intialization state of the iommu driver. With this change we can initialize the IOMMU hardware to a point where it can remap interrupts and later resume the initializion to enable dma remapping. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Introduce amd_iommu_init_dma routineJoerg Roedel2012-07-171-7/+20
| | | | | | | This function will initialize everthing necessary so that devices can do DMA. This includes dma_ops and iommu_ops. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Move unmap_flush message to amd_iommu_init_dma_ops()Joerg Roedel2012-07-171-8/+0
| | | | | | | The message belongs there anyway, so move it to that function. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Split enable_iommus() routineJoerg Roedel2012-07-171-3/+18
| | | | | | | Split the enable_iommus() routine so that a part of it can run in early code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Introduce early_amd_iommu_init routineJoerg Roedel2012-07-171-15/+23
| | | | | | | Split out the code to parse the ACPI table and setup relevant data structures into a new function. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Move informational prinks out of iommu_enableJoerg Roedel2012-07-171-17/+27
| | | | | | | | | | This function will be called before the PCI subsystem is initialized. Therefore dev_name doen't work and IOMMU information can't be printed to the klog as before. Move the code to print that information to a later point where PCI initializtion has already happened. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Split out PCI related parts of IOMMU initializationJoerg Roedel2012-07-171-106/+118
| | | | | | | | | | For interrupt remapping the relevant IOMMU initialization needs to run earlier at boot when the PCI subsystem is not yet initialized. To support that this patch splits the parts of IOMMU initialization which need PCI accesses out of the initial setup path so that this can be done later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Use acpi_get_table instead of acpi_table_parseJoerg Roedel2012-07-171-52/+66
| | | | | | | This makes it easier to propagate errors while parsing the IVRS table and makes the amd_iommu_init_err hack obsolete. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Fix sparse warningsJoerg Roedel2012-07-171-11/+5
| | | | | | | | A few sparse warnings fire in drivers/iommu/amd_iommu_init.c. Fix most of them with this patch. Also fix the sparse warnings in drivers/iommu/irq_remapping.c while at it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: fix type bug in flush codeDan Carpenter2012-07-021-1/+1
| | | | | | | | | | write_file_bool() modifies 32 bits of data, so "amd_iommu_unmap_flush" needs to be 32 bits as well or we'll corrupt memory. Fortunately it looks like the data is aligned with a gap after the declaration so this is harmless in production. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Fix missing iommu_shutdown initialization in passthrough modeShuah Khan2012-06-071-2/+2
| | | | | | | | | | | The iommu_shutdown callback is not initialized when the AMD IOMMU driver runs in passthrough mode. Fix that by moving the callback initialization before the check for passthrough mode. Signed-off-by: Shuah Khan <shuah.khan@hp.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Cache pdev pointer to root-bridgeJoerg Roedel2012-06-041-8/+5
| | | | | | | | | | | | At some point pci_get_bus_and_slot started to enable interrupts. Since this function is used in the amd_iommu_resume path it will enable interrupts on resume which causes a warning. The fix will use a cached pointer to the root-bridge to re-enable the IOMMU in case the BIOS is broken. Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
*-. Merge branches 'iommu/fixes', 'arm/tegra' and 'x86/amd' into nextJoerg Roedel2012-03-221-64/+123
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| | * iommu/amd: Fix section mismatchGerard Snitselaar2012-03-221-2/+2
| | | | | | | | | | | | | | | | | | | | | amd_iommu_enable_interrupts() called in amd_iommu_resume(). Signed-off-by: Gerard Snitselaar <dev@snitselaar.org> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * iommu/amd: Move interrupt setup code into seperate functionJoerg Roedel2012-03-151-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For interrupt remapping the enablement of the IOMMU MSI interrupt needs to be deferred because the IOMMU itself will be initialized before the io-apics are up and running. So the code to setup the MSI is moved seperated from the hardware-setup routine now. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/amd: Make sure IOMMU interrupts are re-enabled on resumeJoerg Roedel2012-03-151-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunatly the interrupts for the event log and the peripheral page-faults are only enabled at boot but not re-enabled at resume. Fix that. Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/amd: Fix double free of mem-region in error-pathJoerg Roedel2012-03-091-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ioremap_nocache fails in iommu initialization the code calls release_mem_region immediatly. But the function is called again when the propagates into the upper init functions leading to a double-free. Fix that. Reported-by: Don Dutile <ddutile@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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