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* i2c: octeon: Prevent error message on bus errorJan Glauber2018-03-022-1/+2
| | | | | | | | | | | | | | The error message: [Fri Feb 16 13:42:13 2018] i2c-thunderx 0000:01:09.4: unhandled state: 0 is mis-leading as state 0 (bus error) is not an unknown state. Return -EIO as before but avoid printing the message. Also rename STAT_ERROR to STATE_BUS_ERROR. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Consider SCL GPIO optionalAndy Shevchenko2018-02-221-1/+1
| | | | | | | | | | | GPIO library can return -ENOSYS for the failed request. Instead of failing ->probe() in this case override error code to 0. Fixes: ca382f5b38f3 ("i2c: designware: add i2c gpio recovery option") Reported-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: busses: i2c-sirf: Fix spelling: "formular" -> "formula".Patryk Kocielnik2018-02-221-2/+2
| | | | | | | | Fix spelling. Signed-off-by: Patryk Kocielnik <patryk.kocielnik@gmail.com> [wsa: fixed "Initialization", too] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: bcm2835: Set up the rising/falling edge delaysEric Anholt2018-02-221-1/+20
| | | | | | | | | | | | We were leaving them in the power on state (or the state the firmware had set up for some client, if we were taking over from them). The boot state was 30 core clocks, when we actually want to sample some time after (to make sure that the new input bit has actually arrived). Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: i801: Add missing documentation entries for Braswell and Kaby LakeJarkko Nikula2018-02-212-0/+3
| | | | | | | | | Commits adding PCI IDs for Intel Braswell and Kaby Lake PCH-H lacked the respective Kconfig and Documentation/i2c/busses/i2c-i801 change. Add them now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: must wait for enableBen Gardner2018-02-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | One I2C bus on my Atom E3845 board has been broken since 4.9. It has two devices, both declared by ACPI and with built-in drivers. There are two back-to-back transactions originating from the kernel, one targeting each device. The first transaction works, the second one locks up the I2C controller. The controller never recovers. These kernel logs show up whenever an I2C transaction is attempted after this failure. i2c-designware-pci 0000:00:18.3: timeout in disabling adapter i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready Waiting for the I2C controller status to indicate that it is enabled before programming it fixes the issue. I have tested this patch on 4.14 and 4.15. Fixes: commit 2702ea7dbec5 ("i2c: designware: wait for disable/enable only if necessary") Cc: linux-stable <stable@vger.kernel.org> #4.13+ Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge branch 'i2c/for-4.16' of ↵Linus Torvalds2018-02-0421-325/+579
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "I2C has the following changes for you: - new flag to mark DMA safe buffers in i2c_msg. Also, some infrastructure around it. And docs. - huge refactoring of the at24 driver led by the new maintainer Bartosz - update I2C bus recovery to send STOP after recovery - conversion from gpio to gpiod for I2C bus recovery - adding a fault-injector to the i2c-gpio driver - lots of small driver improvements, and bigger ones to i2c-sh_mobile" * 'i2c/for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (99 commits) i2c: mv64xxx: Add myself as maintainer for this driver i2c: mv64xxx: Fix clock resource by adding an optional bus clock i2c: mv64xxx: Remove useless test before clk_disable_unprepare i2c: mxs: use true and false for boolean values i2c: meson: update doc description to fix build warnings i2c: meson: add configurable divider factors dt-bindings: i2c: update documentation for the Meson-AXG i2c: imx-lpi2c: add runtime pm support i2c: rcar: fix some trivial typos in comments i2c: davinci: fix the cpufreq transition i2c: rk3x: add proper kerneldoc header i2c: rk3x: account for const type of of_device_id.data i2c: acorn: remove outdated path from file header i2c: acorn: add MODULE_LICENSE tag i2c: rcar: implement bus recovery i2c: send STOP after successful bus recovery i2c: ensure SDA is released in recovery if SDA is controllable i2c: add 'set_sda' to bus_recovery_info i2c: add identifier in declarations for i2c_bus_recovery i2c: make kerneldoc about bus recovery more precise ...
| * i2c: mv64xxx: Fix clock resource by adding an optional bus clockGregory CLEMENT2018-01-261-1/+11
| | | | | | | | | | | | | | | | | | | | | | On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock is optional because not all the SoCs need them but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updating accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mv64xxx: Remove useless test before clk_disable_unprepareGregory CLEMENT2018-01-261-6/+2
| | | | | | | | | | | | | | | | clk_disable_unprepare() already checks that the clock pointer is valid. No need to test it before calling it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mxs: use true and false for boolean valuesGustavo A. R. Silva2018-01-261-2/+2
| | | | | | | | | | | | | | | | | | Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: meson: update doc description to fix build warningsYixun Lan2018-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add description for 'data' parameter and drop unused 'irq' memeber. Here is the warnings: drivers/i2c/busses/i2c-meson.c:103: warning: No description found for parameter 'data' drivers/i2c/busses/i2c-meson.c:103: warning: Excess struct member 'irq' description in 'meson_i2c' Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: meson: add configurable divider factorsJian Hu2018-01-241-4/+28
| | | | | | | | | | | | | | | | | | | | | | This patch try to add support for I2C controller in Meson-AXG SoC, Due to the IP changes between I2C controller, we need to introduce a compatible data to make the divider factor configurable. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: imx-lpi2c: add runtime pm supportFugang Duan2018-01-241-17/+51
| | | | | | | | | | | | | | | | | | | | Add runtime pm support to dynamically manage the clock to avoid enable/disable clock in frequently that can improve the i2c bus transfer performance. And use pm_runtime_force_suspend/resume() instead of lpi2c_imx_suspend/resume(). Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: fix some trivial typos in commentsWolfram Sang2018-01-241-3/+3
| | | | | | | | | | | | | | Nothing big, but they get annoying after a while ;) Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: davinci: fix the cpufreq transitionBartosz Golaszewski2018-01-241-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c_davinci_cpufreq_transition() is implemented in a way that will block if it ever gets called while no transfer is in progress. Not only that, but reinit_completion() is never called for xfr_complete. Use the fact that cpufreq uses an srcu_notifier (running in process context) for transitions and that the bus_lock is taken during the call to master_xfer() and simplify the code by removing the transfer completion entirely and protecting i2c_davinci_cpufreq_transition() with i2c_lock/unlock_adapter(). Reported-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rk3x: add proper kerneldoc headerWolfram Sang2018-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | gcc noticed the kerneldoc was wrongly formatted. Fix it! drivers/i2c/busses/i2c-rk3x.c:164: warning: Cannot understand * @grf_offset: ... on line 164 - I thought it was a doc line Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
| * i2c: rk3x: account for const type of of_device_id.dataJulia Lawall2018-01-181-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver creates a number of const structures that it stores in the data field of an of_device_id array. The data field of an of_device_id structure has type const void *, so there is no need for a const-discarding cast when putting const values into such a structure. Furthermore, adding const to the declaration of the location that receives a const value from such a field ensures that the compiler will continue to check that the value is not modified. The const-discarding cast on the extraction from the data field is thus no longer needed. Done using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: acorn: remove outdated path from file headerWolfram Sang2018-01-181-3/+1
| | | | | | | | | | | | | | That path has gone away for a long time. Move the HW name upwards for a proper header. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: acorn: add MODULE_LICENSE tagArnd Bergmann2018-01-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | As of v4.15, Kbuild warns about missing MODULE_LICENSE tags: WARNING: modpost: missing MODULE_LICENSE() in drivers/i2c/busses/i2c-acorn.o This adds a license, author and description tag, matching the comment at the start of the acorn i2c driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: implement bus recoveryWolfram Sang2018-01-161-2/+52
| | | | | | | | | | | | | | | | | | We can force levels of SCL and SDA, so we can use that for bus recovery. Note that we cannot read SDA back, because we will only get the internal state of the bus free detection. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: exynos5: change internal transmission timeout to 100msAndrzej Hajda2018-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | Exynos-I2C uses default timeout of 1 second for the whole transaction, including re-transmissions due to arbitration lost errors (-EAGAIN). To allow re-transmissions driver's internal timeout should be significantly lower, 100ms seems to be good candidate. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: ismt: 16-byte align the DMA buffer addressRadu Rendec2018-01-151-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use only a portion of the data buffer for DMA transfers, which is always 16-byte aligned. This makes the DMA buffer address 16-byte aligned and compensates for spurious hardware parity errors that may appear when the DMA buffer address is not 16-byte aligned. The data buffer is enlarged in order to accommodate any possible 16-byte alignment offset and changes the DMA code to only use a portion of the data buffer, which is 16-byte aligned. The symptom of the hardware issue is the same as the one addressed in v3.12-rc2-5-gbf41691 and manifests by transfers failing with EIO, with bit 9 being set in the ERRSTS register. Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mpc: always determine I2C clock prescaler at runtimeArseny Solokha2018-01-151-22/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the facility for setting the prescaler value at compile time entirely. It was only used for two SoCs, duplicating the actual value for one of them and setting sometimes bogus value for another. Make all MPC8xxx SoCs obtain their actual I2C clock prescaler from a single place in the code. Changes from v2: - left Device Tree compatibles in place Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mpc: fix PORDEVSR2 mask for MPC8533/44Arseny Solokha2018-01-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | According to the reference manuals for the corresponding SoCs, SEC frequency ratio configuration is indicated by bit 26 of the POR Device Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20, not 0x80. Testing the wrong bit leads to selection of wrong I2C clock prescaler on those SoCs. Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mpc: unify obtaining the MPC8533/44 I2C clock prescaler w/ MPC8xxxArseny Solokha2018-01-151-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8ce795cb0c6b ("i2c: mpc: assign the correct prescaler from SVR") introduced the common helper function for obtaining the actual clock prescaler value for MPC85xx. However, getting the prescaler for MPC8544 which depends on the SEC frequency ratio on this platform, has been always performed separately based on the corresponding Device Tree configuration. Move special handling of MPC8544 into that common helper. Make it dependent on the SoC version and not on Device Tree compatible node, as is the case with all other SoCs. Handle MPC8533 the same way which is similar to MPC8544 in this regard, according to AN2919 "Determining the I2C Frequency Divider Ratio for SCL". Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mpc: get MPC8xxx I2C clock prescaler before using it in calculationsArseny Solokha2018-01-151-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Obtaining the actual I2C clock prescaler value in mpc_i2c_setup_8xxx() only happens when the clock parameter is set to something other than MPC_I2C_CLOCK_LEGACY. When the clock parameter is exactly MPC_I2C_CLOCK_LEGACY, the prescaler parameter is used in arithmetic division as provided by the caller, resulting in a division by zero for the majority of processors supported by the module. Avoid division by zero by obtaining the actual I2C clock prescaler in mpc_i2c_setup_8xxx() unconditionally regardless of the passed clock value. Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: ismt: dump registers at the end of transactionsRadu Rendec2018-01-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch dumps general and master registers at the end of transactions when debugging is enabled. Previously, registers were only dumped before submitting new descriptors (at the beginning of transactions). This helps debugging if some registers change as result of a failed transaction (e.g. bits are set in the ERRSTS general register). Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: let r8a7790 (R-Car H2) use the new formulaWolfram Sang2018-01-151-1/+1
| | | | | | | | | | | | | | Make use of the new formula for more precise bus frequencies. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: add new frequency calculation for later SoCWolfram Sang2018-01-151-1/+18
| | | | | | | | | | | | | | | | | | | | | | The formula to generate the desired bus speeds has changed a little over time. Implement the new formula and allow drivers to opt-in by changing to this new config set. Ensure in probe that we don't divide by zero. The returned values on a R-Car H2 (r8a7790/Lager board) match the suggested values in the datasheet. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: add helper to check frequency calculationsWolfram Sang2018-01-151-22/+27
| | | | | | | | | | | | | | | | Because we will add a second formula soon, put the sanity checks for the computed results into a separate function. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: let RuntimePM do the clock handlingWolfram Sang2018-01-151-18/+17
| | | | | | | | | | | | | | | | | | Start RuntimePM a bit earlier, so we can use it to enable the clock during probe for frequency calculations. Make sure it is enabled before calling setup(). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: require setup callbackWolfram Sang2018-01-151-9/+6
| | | | | | | | | | | | | | | | Require the setup callback and move the frequency calculation into it. This is in preparation for supporting multiple formulas. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: allow setup callback to return errnoWolfram Sang2018-01-151-4/+9
| | | | | | | | | | | | | | | | The setup callback will be more generic and, thus, need to be able to return error codes. Change the return type to 'int' for that. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: move type detection upwardsWolfram Sang2018-01-151-6/+4
| | | | | | | | | | | | | | | | For refactoring reasons, we will need this information before the setup callback. Also, simplify the comment to a oneliner. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: gpio: Enable working over slow can_sleep GPIOsJan Kundrát2018-01-041-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "Slow" GPIOs (usually those connected over an SPI or an I2C bus) are, well, slow in their operation. It is generally a good idea to avoid using them for time-critical operation, but sometimes the hardware just sucks, and the software has to cope. In addition to that, the I2C bus itself does not actually define any strict timing limits; the bus is free to go all the way down to DC. The timeouts (and therefore the slowest acceptable frequency) are present only in SMBus. The `can_sleep` is IMHO a wrong concept to use here. My SPI-to-quad-UART chip (MAX14830) is connected via a 26MHz SPI bus, and it happily drives SCL at 200kHz (5µs pulses) during my benchmarks. That's faster than the maximal allowed speed of the traditional I2C. The previous version of this code did not really block operation over slow GPIO pins, anyway. Instead, it just resorted to printing a warning with a backtrace each time a GPIO pin was accessed, thereby slowing things down even more. Finally, it's not just me. A similar patch was originally submitted in 2015 [1]. [1] https://patchwork.ozlabs.org/patch/450956/ Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mediatek: Enable i2c module clock before i2c registers access.Jun Gao2018-01-041-0/+9
| | | | | | | | | | | | | | | | Make sure i2c module clock has been enabled before i2c registers access. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mediatek: Add i2c compatible for MediaTek MT2712Jun Gao2018-01-041-4/+27
| | | | | | | | | | | | | | | | | | Add i2c compatible for MT2712. Compare to MT8173 i2c controller, internal divider of i2c source clock need to be configured for MT2712 i2c speed calculation. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * Merge tag 'at24-4.16-updates-for-wolfram' of ↵Wolfram Sang2018-01-035-5/+8
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-4.16 "AT24 updates for 4.16 merge window The driver has been converted to using regmap instead of raw i2c and smbus calls which shrank the code significantly. Device tree binding document has been cleaned up. Device tree support in the driver has been improved and we now support all at24 models as well as two new DT properties (no-read-rollover and wp-gpios). We no longer user unreadable magic values for driver data as the way it was implemented caused problems for some EEPROM models - we switched to regular structs. Aside from that, there's a bunch of coding style fixes and minor improvements all over the place."
| * \ Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang2017-12-311-0/+3
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | i2c/for-4.16 "A couple of patches this time. Just some more compatibles for the pca954x driver and an error handling tweak for the reg driver."
| * | | i2c: ismt: Use %pad specifier for dma_addr_t variablesAndy Shevchenko2017-12-311-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ...which takes care of proper format and size of the value. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c/ARM: davinci: Deep refactoring of I2C recoveryLinus Walleij2017-12-311-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alter the DaVinci GPIO recovery fetch to use descriptors all the way down into the board files. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: imx: Include the right GPIO headerLinus Walleij2017-12-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <linux/of_gpio.h> is not used in this file, by <linux/gpio/consumer.h> is. Someone is just lucky with their implicit includes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: imx: use proper GPIO directions for recoveryWolfram Sang2017-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When converting to GPIOD, the GPIO directions of SCL/SDA have been swapped. Fix it! Fixes: ad36a27959cabb ("i2c: imx: switch to using gpiod for bus recovery gpios") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: rcar: skip DMA if buffer is not safeWolfram Sang2017-12-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This HW is prone to races, so it needs to setup new messages in irq context. That means we can't alloc bounce buffers if a message buffer is not DMA safe. So, in that case, simply fall back to PIO. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: sh_mobile: use core helper to decide when to use DMAWolfram Sang2017-12-031-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ensures that we fall back to PIO if the message length is too small for DMA being useful. Otherwise, we use DMA. A bounce buffer might be applied by the helper if the original message buffer is not DMA safe. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: gpio: add fault injectorWolfram Sang2017-12-032-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add fault injection capabilities to the i2c-gpio driver. When connected to another I2C bus, it can create unusual states which the other I2C bus master driver needs to handle. Only for debugging! Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
| * | | i2c: designware: fix building driver as modulePhil Reid2017-11-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The designware core and platform are built as separate modules. Export i2c_dw_prepare_clk() so it can be used by the platform driver. Fixes: a34a0b6da22540d19e57 ("i2c: designware: move i2c_dw_plat_prepare_clk to common") Signed-off-by: Phil Reid <preid@electromag.com.au> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: sh_mobile: make sure to not accidently trigger STOPWolfram Sang2017-11-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The datasheet was a bit vague, but after consultation with HW designers, we came to the conclusion that we should set the SCP bit always when dealing only with the ICE bit. A set SCP bit is ignored, and thus fine, a cleared one may trigger STOP on the bus. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: sh_mobile: send STOP according to datasheetWolfram Sang2017-11-271-23/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We initiate STOP (or REP_START) on the second last WAIT interrupt currently. This works fine but is not according to the datasheet which says to do it on the last WAIT interrupt. This also simplifies the code quite a lot, so let's do it. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: sh_mobile: avoid unnecessary register readWolfram Sang2017-11-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no data when the first WAIT interrupt arrives. No need to read something then. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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