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* i2c: tegra: Correct error path in probeJon Hunter2016-07-061-1/+1
| | | | | | | | | | | | | | | | Commit 497fbe24987b ("i2c: tegra: enable multi master mode for tegra210") enables the Tegra I2C 'div_clk' for adapters using the multi-master mode during the device probe. Although the probe error path was updated to disable the clock on probe failure, there is one place after calling tegra_i2c_init() where the clock will not be disabled on failure. Correct the error path so that the 'div_clk' is disabled if calling tegra_i2c_init() fails. Fixes: 497fbe24987b ("i2c: tegra: enable multi master mode for tegra210") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: disable clock before returning errorShardar Shariff Md2016-05-111-3/+4
| | | | | | | | | Disable clock before returning error in tegra_i2c_init() as its leaves i2c clock ON in case of error and never turns off again as it will have unbalanced clock enable/disable Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: enable multi master mode for tegra210Shardar Shariff Md2016-04-121-6/+68
| | | | | | | | | | | | | | | | | | | | | | Enable multi-master mode in I2C_CNFG reg based on hw features. Using single/multi-master mode bit introduced for Tegra210, whereas multi-master mode is enabled by default in HW for T124 and earlier Tegra SOC. Enabling this bit doesn't explicitly start treating the bus has having multiple masters, but will start checking for arbitration lost and reporting when it occurs. The Tegra210 I2C controller supports single/multi master mode. Add chipdata for Tegra210 and its compatibility string so that Tegra210 will select data that enables multi master mode correctly. Do below prerequisites for multi-master bus if "multi-master" dt property entry is added. 1. Enable 1st level clock always set. 2. Disable 2nd level clock gating (slcg which is supported from T124 SOC and later chips) Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: don't open code of_device_get_match_data()Wolfram Sang2016-02-241-3/+1
| | | | | | | | | | This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
* i2c: tegra: drop duplicated code for assigning algoBarry Song2015-10-201-1/+0
| | | | | | | | | This code is repeated in probe: i2c_dev->adapter.algo = &tegra_i2c_algo; Cc: Donglin Peng <pengdonglin137@163.com> Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: add support for fast plus (FM+) mode clock rateLaxman Dewangan2015-08-101-2/+15
| | | | | | | | | | | | | | | | | Tegra I2C controller required to configure the clock divisor register inside controller to different value based on the clock speed. The recommended clock divisor for the I2C controller for standard/fast mode is 0x19 and for fast-mode plus is 0x10. Add support to configure clock divisor register of I2C controller based on bus clock rate. This clock divisor is supported form T114 onwards. Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: update CONFIG_LOAD for new conifigurationLaxman Dewangan2015-08-101-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | Once the new configuration is set on the conifg register of I2C controller, it is require to update the CONFIG_LOAD register to transfer the new SW configuration to actual HW internal registers that would be used in the actual logic. It is like, SW is programming only shadow registers through regular configuration and when these load_config bit fields are set to 1, it causes the regular/shadows registers configuration transferred to the HW internal active registers. So SW has to set these bit fields at the end of all regular registers configuration. And these config_load bits are HW auto-clear bits. HW clears these bit fields once the register configuration is moved to HW internal active registers. So SW has to wait until these bits are auto-cleared before going for any further programming This mechanism is supported on T124 and after this SoCs. Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: apply size limit quirkWolfram Sang2015-06-211-0/+7
| | | | | | | | | | payload_size is a 12 bit field in the HW register, so add a limit for this size. That way we gracefully reject the message beforehand instead of generating an OOPS while transferring. Verified using some older Tegra2 documentation and a more recent Jetson TK1 board. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
* i2c: tegra: don't advertise SMBUS_QUICKWolfram Sang2015-06-211-2/+2
| | | | | | | This HW cannot send 0-byte-length messages and the driver discards them. So, we should not advertise SMBUS_QUICK. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: match return type of wait_for_completion_timeoutNicholas Mc Guire2015-03-151-5/+7
| | | | | | | | | | | return type of wait_for_completion_timeout is unsigned long not int. As ret was only used for wait_for_completion_timeout here it is renamed to time_left the type changed to unsigned long and references fixed up. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: Maintain CPU endiannessDmitry Osipenko2015-01-261-0/+2
| | | | | | | | Support CPU BE mode by adding endianness conversion for memcpy interactions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: busses: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0
| | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: Move clk_prepare/clk_set_rate to probeMikko Perttunen2014-09-201-12/+45
| | | | | | | | | | | | | | | | Currently the i2c-tegra bus driver prepares, enables and set_rates its clocks separately for each transfer. This causes locking problems when doing I2C transfers from clock notifiers; see http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268653.html This patch moves clk_prepare/unprepare and clk_set_rate calls to the probe function, leaving only clk_enable/disable to be done on each transfer. This solves the locking issue. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: i2c-tegra: Drop class based scanning to improve bootup timeWolfram Sang2014-07-161-1/+1
| | | | | | | | | | | | | This driver has been flagged to drop class based instantiation. The removal improves boot-up time and is unneeded for embedded controllers. Users have been warned to switch for some time now, so we can actually do the removal. Keep the DEPRECATED flag, so the core can inform users that the behaviour finally changed now. After another transition period, this flag can go, too. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
* i2c: remove unnecessary OOM messagesJingoo Han2014-06-021-3/+1
| | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. For example, k.alloc and v.alloc failures use dump_stack(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Jean Delvare <jdelvare@suse.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: i2c-tegra: deprecate class based instantiationWolfram Sang2014-03-051-1/+1
| | | | | | | | Warn users that class based instantiation is going away soon in favour of more robust probing and faster bootup times. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com>
* i2c: tegra: use reset frameworkStephen Warren2013-12-111-3/+10
| | | | | | | | | | Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Thierry Reding <treding@nvidia.com>
* tree-wide: use reinit_completion instead of INIT_COMPLETIONWolfram Sang2013-11-151-1/+1
| | | | | | | | | | | | Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* i2c: move OF helpers into the coreWolfram Sang2013-08-231-3/+0
| | | | | | | | | | I2C of helpers used to live in of_i2c.c but experience (from SPI) shows that it is much cleaner to have this in the core. This also removes a circular dependency between the helpers and the core, and so we can finally register child nodes in the core instead of doing this manually in each driver. So, fix the drivers and documentation, too. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* drivers/i2c/busses: don't check resource with devm_ioremap_resourceWolfram Sang2013-05-181-5/+0
| | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Barry Song <Baohua.Song@csr.com>
* i2c: tegra: assume CONFIG_OF, remove platform dataStephen Warren2013-03-241-19/+7
| | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Delete the header that defines it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: tegra: check the clk_prepare_enable() return valueLaxman Dewangan2013-03-221-2/+11
| | | | | | | | | | | | | | | | NVIDIA's Tegra SoC allows read/write of controller register only if controller clock is enabled. System hangs if read/write happens to registers without enabling clock. clk_prepare_enable() can be fail due to unknown reason and hence adding check for return value of this function. If this function success then only access register otherwise return to caller with error. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* Merge branch 'i2c/for-next' of ↵Linus Torvalds2013-02-261-15/+64
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "Highlights: - new drivers for Intel ismt & Broadcom bcm2835 - a number of drivers got support for more variants and mostly got cleaned up on the way (sis630, i801, at91, tegra, designware) - i2c got rid of all *_set_drvdata(..., NULL) on remove/probe failure - removed the i2c_smbus_process_call from the core since there are no users - mxs can now switch between PIO and DMA depending on the message size and the bus speed can now be arbitrary In addition, there is the usual bunch of fixes, cleanups, devm_* conversions, etc" Fixed conflict (and buggy devm_* conversion) in i2c-s3c2410.c * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (39 commits) i2c: Remove unneeded xxx_set_drvdata(..., NULL) calls i2c: pxa: remove incorrect __exit annotations i2c: ocores: Fix pointer to integer cast warning i2c: tegra: remove warning dump if timeout happen in transfer i2c: fix i2c-ismt.c printk format warning i2c: i801: Add Device IDs for Intel Wellsburg PCH i2c: add bcm2835 driver i2c: ismt: Add Seth and Myself as maintainers i2c: sis630: checkpatch cleanup i2c: sis630: display unsigned hex i2c: sis630: use hex to constants for SMBus commands i2c: sis630: fix behavior after collision i2c: sis630: clear sticky bits i2c: sis630: Add SIS964 support i2c: isch: Add module parameter for backbone clock rate if divider is unset i2c: at91: fix unsed variable warning when building with !CONFIG_OF i2c: Adding support for Intel iSMT SMBus 2.0 host controller i2c: sh_mobile: don't send a stop condition by default inside transfers i2c: sh_mobile: eliminate an open-coded "goto" loop i2c: sh_mobile: fix timeout error handling ...
| * i2c: tegra: remove warning dump if timeout happen in transferLaxman Dewangan2013-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | If timeout error occurs in the i2c transfer then it was dumping warning of call stack. Remove the warning dump as there is may be possibility that some slave devices are busy and not responding the i2c communication. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
| * i2c: tegra: add support for Tegra114 SoCLaxman Dewangan2013-01-281-14/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA's Tegra114 has following enhanced feature in i2c controller: - Enable/disable control for per packet transfer complete interrupt. Earlier SoCs could not disable this. - Single clock source for standard/fast and HS mode clock speed. The clock divisor for fast/standard mode is added into the i2c controller to meet the HS and standard/fast mode of clock speed from single source. Add support for the above feature to make it functional on T114 SOCs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* | Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-02-211-2/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC-specific updates from Arnd Bergmann: "This is a larger set of new functionality for the existing SoC families, including: - vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850 - prima2 gains support for the "marco" SoC family, its SMP based cousin - tegra gains support for the new Tegra4 (Tegra114) family - socfpga now supports a newer version of the hardware including SMP - i.mx31 and bcm2835 are now using DT probing for their clocks - lots of updates for sh-mobile - OMAP updates for clocks, power management and USB - i.mx6q and tegra now support cpuidle - kirkwood now supports PCIe hot plugging - tegra clock support is updated - tegra USB PHY probing gets implemented diffently" * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits) ARM: prima2: remove duplicate v7_invalidate_l1 ARM: shmobile: r8a7779: Correct TMU clock support again ARM: prima2: fix __init section for cpu hotplug ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3) ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3) arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW ARM: tegra: sort Kconfig selects for Tegra114 ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114 ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC ARM: tegra: Fix build error for gic update ARM: tegra: remove empty tegra_smp_init_cpus() ARM: shmobile: Register ARM architected timer ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move ARM: shmobile: r8a7779: Correct TMU clock support ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ...
| * | ARM: tegra: migrate to new clock codePrashant Gaikwad2013-01-281-2/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | i2c: Convert to devm_ioremap_resource()Thierry Reding2013-01-241-5/+3
|/ | | | | | | | | | | | | Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* i2c: remove __dev* attributes from subsystemBill Pemberton2012-12-221-4/+4
| | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Peter Korsgaard <peter.korsgaard@barco.com> (for ocores and mux-gpio) Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com> (for i2c-gpio) Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> (for puf3) Acked-by: Barry Song <baohua.song@csr.com> (for sirf) Reviewed-by: Jean Delvare <khali@linux-fr.org> [wsa: Fixed "foo* bar" flaws while we are here] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c: tegra: set irq name as device nameLaxman Dewangan2012-11-021-1/+1
| | | | | | | | | | | | When watching the irqs name of tegra i2c, all instances irq name shows as tegra_i2c. Passing the device name properly to have the irq names with instance like tegra-i2c.0, tegra-i2c.1 etc. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c: tegra: dynamically control fast clkLaxman Dewangan2012-09-131-7/+28
| | | | | | | | | | Tegra I2C driver enables the fast clock during initialization and does not disable till driver removed. Enable this clock before transfer and disable after transfer done. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20Laxman Dewangan2012-09-131-14/+47
| | | | | | | | | | | Tegra20 i2c controller does not support the continue transfer which implements the I2C_M_NOSTART functionality of i2c protocol mangling. Removing the I2C_M_NOSTART functionality support for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* i2c: tegra: pass proper name for getting clockLaxman Dewangan2012-09-131-23/+23
| | | | | | | | | | | | Tegra's i2c controller require two clock sources named as div_clk and fast_clk. This change make sure that driver pass the correct clock's name when it acquires clock handle. Also change the variable name to reflect the correct clock handles. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* i2c: tegra: protect suspend/resume callbacks with CONFIG_PM_SLEEPLaxman Dewangan2012-08-181-1/+1
| | | | | | | | | | | The CONFIG_PM doesn't actually enable any of the PM callbacks, it only allows to enable CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME. This means if CONFIG_PM is used to protect system sleep callbacks then it may end up unreferenced if only runtime PM is enabled. Hence protecting sleep callbacks with CONFIG_PM_SLEEP. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linuxLinus Torvalds2012-07-281-63/+59
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull embedded i2c changes from Wolfram Sang: "Changes for the "embedded" part of the I2C subsystem: - lots of devicetree conversions of drivers (and preparations for that) - big cleanups for drivers for OMAP, Tegra, Nomadik, Blackfin - Rafael's struct dev_pm_ops conversion patches for I2C - usual driver cleanups and fixes All patches have been in linux-next for an apropriate time and all patches touching files outside of i2c-folders should have proper acks from the maintainers." * 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (60 commits) Revert "i2c: tegra: convert normal suspend/resume to *_noirq" I2C: MV64XYZ: Add Device Tree support i2c: stu300: use devm managed resources i2c: i2c-ocores: support for 16bit and 32bit IO V4L/DVB: mfd: use reg_shift instead of regstep i2c: i2c-ocores: Use reg-shift property i2c: i2c-ocores: DT bindings and minor fixes. i2c: mv64xxxx: remove EXPERIMENTAL tag i2c-s3c2410: Use plain pm_runtime_put() i2c: s3c2410: Fix pointer type passed to of_match_node() i2c: mxs: Set I2C timing registers for mxs-i2c i2c: i2c-bfin-twi: Move blackfin TWI register access Macro to head file. i2c: i2c-bfin-twi: Move TWI peripheral pin request array to platform data. i2c:i2c-bfin-twi: include twi head file i2c:i2c-bfin-twi: TWI fails to restart next transfer in high system load. i2c: i2c-bfin-twi: Tighten condition when failing I2C transfer if MEN bit is reset unexpectedly. i2c: i2c-bfin-twi: Break dead waiting loop if i2c device misbehaves. i2c: i2c-bfin-twi: Improve the patch for bug "Illegal i2c bus lock upon certain transfer scenarios". i2c: i2c-bfin-twi: Illegal i2c bus lock upon certain transfer scenarios. i2c-mv64xxxx: allow more than one driver instance ... Conflicts: drivers/i2c/busses/i2c-nomadik.c
| * Revert "i2c: tegra: convert normal suspend/resume to *_noirq"Wolfram Sang2012-07-241-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 7c86d44cda2e715bc95f525fd0eac4bd6a66998e. Stephen says: IIRC, I proposed it before solely to solve some suspend/resume ordering issues, and Colin Cross NAKd it. These days, deferred probe should make this change unnecessary. Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: convert normal suspend/resume to *_noirqLaxman Dewangan2012-07-121-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | To provide the late suspend and early resume for i2c driver, convert the suspend/resume as suspend-> suspend_noirq resume -> resume_noirq Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa: fixed up to match previous pm_ops change] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c-tegra: Use struct dev_pm_ops for power managementRafael J. Wysocki2012-07-121-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Make the Tegra I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa] adapt to of_match_ptr change Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: use of_match_ptr() for match_table initializationLaxman Dewangan2012-07-121-3/+1
| | | | | | | | | | | | | | | | In place of defining match_table for non-DT based as NULL, use of_match_ptr() for initialzing the of_match_table. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: use clk_disable_unprepare in place of clk_disableLaxman Dewangan2012-07-121-1/+1
| | | | | | | | | | | | | | | | | | Use clk_disable_unprepare() inplace of clk_disable(). This was missed as part of moving clock enable/disable to prepare/unprepare for using the common clock framework. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: remove unused member variableLaxman Dewangan2012-07-121-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove unused member variable "iomem" of the i2c device structure. This variable becomes unused when converted all allocation to devm_* in following change: i2c: tegra: make all resource allocation through devm_* Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: make all resource allocation through devm_*Laxman Dewangan2012-07-081-45/+17
| | | | | | | | | | | | | | | | | | | | Use the devm_* for the memory region allocation, interrupt request, clock handler request. By doing this, it does not require to explicitly free it and hence saving some code. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: support for I2C_M_NOSTART functionalityLaxman Dewangan2012-07-081-5/+26
| | | | | | | | | | | | | | | | | | | | | | Adding support for functionality I2C_M_NOSTART. When multiple message transfer request made through i2c and if any message is flagged with I2C_M_NOSTART then it will not send the start/repeat-start and address of that message i.e. sends data directly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: add PROTOCOL_MANGLING as supported functionality.Laxman Dewangan2012-07-081-1/+2
| | | | | | | | | | | | | | | | The Tegra i2c driver supports the I2C_M_IGNORE_NAK and hence returning I2C_FUNC_PROTOCOL_MANGLING as supported functionality. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * i2c: tegra: make sure register writes completesLaxman Dewangan2012-07-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra PPSB (an peripheral bus) queues writes transactions. In order to guarantee that writes have completed before a certain time, a read transaction to a register on the same bus must be executed. This is necessary in situations such as when clearing an interrupt status or enable, so that when returning from an interrupt handler, the HW has already de-asserted its interrupt status output, which will avoid spurious interrupts. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* | i2c: tegra: Add clk_prepare/clk_unpreparePrashant Gaikwad2012-06-111-5/+5
|/ | | | | | | | | Use clk_prepare/clk_unprepare as required by the generic clk framework. Cc: w.sang@pengutronix.de Cc: linux-i2c@vger.kernel.org Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* i2c: tegra: notify transfer-complete after clearing status.Laxman Dewangan2012-05-121-7/+6
| | | | | | | | | | | | The notification of the transfer complete by calling complete() should be done after clearing all interrupt status. This avoids the race condition of misconfigure the i2c controller in multi-core environment. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: stable@kernel.org
* i2c: tegra: fix 10bit address configurationLaxman Dewangan2012-05-121-4/+7
| | | | | | | | | | | | | The slave address of device to be configured in packet header as follows: 7 bit address: PacketHeader3[7:1] 10 bit address: PacketHeader3[9:0] Fixing the code to make packet header3 properly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c: tegra: Add delay before resetting the controller after NACKAlok Chauhan2012-04-221-0/+8
| | | | | | | | | | | | | | | | | | NACK interrupt is generated before I2C controller generates the STOP condition on bus. Because of this reset of controller is happening before I2C controller could complete STOP condition. So wait for some time before resetting the controller so that STOP condition has delivered properly on bus. Added delay of 2 clock period before resetting the controller in case of NACK error. Signed-off-by: Alok Chauhan <alokc@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [wsa: Reworded the commit msg and code comment a bit] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c: tegra: Remove unnecessary write to INT_STATUSAlok Chauhan2012-03-071-1/+0
| | | | | | | | | | | The write is not necessary and may cause the I2C controller to misbehave. With this fix, I2C on Tegra30 works (at least, running i2cdump repeatedly on the WM8903 on Cardhu's I2C5/DVC bus). Signed-off-by: Alok Chauhan <alokc@nvidia.com> [swarren: Reworded commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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