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* i2c: designware: Prevent runtime suspend during adapter registrationJarkko Nikula2016-02-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There can be unnecessary runtime suspend-resume cycle during i2c-designware-platdrv probe when it registers the I2C adapter device. This happens because i2c-designware-platdrv is set to initially active platform device in its probe function and is a parent of I2C adapter. In that case power.usage_count of i2c-designware device is zero and pm_runtime_get()/pm_runtime_put() cycle during probe could put it into runtime suspend. This happens when the i2c_register_adapter() calls the device_register(): i2c_register_adapter device_register device_add bus_probe_device device_initial_probe __device_attach if (dev->parent) pm_runtime_get_sync(dev->parent) ... if (dev->parent) pm_runtime_put(dev->parent) After that the i2c_register_adapter() continues registering I2C slave devices. In case slave device probe does I2C transfers the parent will resume again and thus get a needless runtime suspend/resume cycle during adapter registration. Prevent this while retaining the runtime PM status of i2c-designware by only incrementing/decrementing device power usage count during I2C adapter registration. That makes sure there won't be spurious runtime PM status changes and lets the driver core to idle the device after probe finishes. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: remove redundant lockBaruch Siach2016-02-121-8/+6
| | | | | | | | | | | | The per adapter bus_lock already projects from concurrent calls to the master_xfer callback. No need to add a driver internal lock. Also, rephrase a comment to drop mention of this lock. Reported-by: Rongrong Zou <zourongrong@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware-pci: use IRQF_COND_SUSPEND flagAndy Shevchenko2016-01-261-1/+2
| | | | | | | | | | | | | | This is effectively reapplies the commit b0898fdaffb2 ("i2c: designware-pci: use IRQF_COND_SUSPEND flag") after the commit d80d134182ba ("i2c: designware: Move common probe code into i2c_dw_probe()"). Original message as follows. The mentioned flag fixes a warning on Intel Edison board since one of the I2C controller shares IRQ line with watchdog timer. Fixes: d80d134182ba (i2c: designware: Move common probe code into i2c_dw_probe()) Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge branch 'i2c/for-4.5' of ↵Linus Torvalds2016-01-141-7/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "Quite some driver updates: - piix4 can now handle multiplexed adapters - brcmstb, xlr, eg20t, designware drivers support more SoCs - emev2 gained i2c slave support - img-scb and rcar got bigger refactoring to remove issues - lots of common driver updates i2c core changes: - new quirk flag when an adapter does not support clock stretching, so clients can be configured to avoid that if possible - added a helper function to retrieve timing parameters from firmware (with rcar being the first user) - "multi-master" DT binding added so drivers can adapt to this setting (like disabling PM to keep arbitration working) - RuntimePM for the logical adapter device is now always enabled by the core to ensure propagation from childs to the parent (the HW device) - new macro builtin_i2c_driver to reduce boilerplate" * 'i2c/for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (70 commits) i2c: create builtin_i2c_driver to avoid registration boilerplate i2c: imx: fix i2c resource leak with dma transfer dt-bindings: i2c: eeprom: add another EEPROM device dt-bindings: move I2C eeprom descriptions to the proper file i2c: designware: Do not require clock when SSCN and FFCN are provided DT: i2c: trivial-devices: Add Epson RX8010 and MPL3115 i2c: s3c2410: remove superfluous runtime PM calls i2c: always enable RuntimePM for the adapter device i2c: designware: retry transfer on transient failure i2c: ibm_iic: rename i2c_timings struct due to clash with generic version i2c: designware: Add support for AMD Seattle I2C i2c: imx: Remove unneeded comments i2c: st: use to_platform_device() i2c: designware: use to_pci_dev() i2c: brcmstb: Adding support for CM and DSL SoCs i2c: mediatek: fix i2c multi transfer issue in high speed mode i2c: imx: improve code readability i2c: imx: Improve message log when DMA is not used i2c: imx: add runtime pm support to improve the performance i2c: imx: init bus recovery info before adding i2c adapter ...
| * i2c: designware: Do not require clock when SSCN and FFCN are providedSuravee Suthikulpanit2016-01-101-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current driver uses input clock source frequency to calculate values for [SS|FS]_[HC|LC] registers. However, when booting ACPI, we do not currently have a good way to provide the frequency information. Instead, we can leverage the SSCN and FFCN ACPI methods, which can be used to directly provide these values. So, the clock information should no longer be required during probing. However, since clk can be invalid, additional checks must be done where we are making use of it. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Loc Ho <lho@apm.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: designware: retry transfer on transient failureBaruch Siach2016-01-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | Set the i2c_adapter retries field to a sensible value. This allows the i2c core to retry master_xfer() when it returns -EAGAIN. Currently the i2c-designware driver returns -EAGAIN only on Tx arbitration failure (DW_IC_TX_ARB_LOST). Reported-by: Rolland Chau <zourongrong@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: designware: fix IO timeout issue for AMD controllerXiangliang Yu2015-12-121-0/+6
|/ | | | | | | | | | | | | | | | | | | Because of some hardware limitation, AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits. Then, I2C will lost interrupt and IO timeout. According to hardware design, this patch implements a workaround to disable i2c controller interrupt and re-enable i2c interrupt before exiting ISR. To reduce the performance impacts on other vendors, use unlikely function to check flag in ISR. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: designware: Move common probe code into i2c_dw_probe()Jarkko Nikula2015-10-151-6/+43
| | | | | | | | | | | | | | | | | | | | | | | There is some code duplication in i2c-designware-platdrv and i2c-designware-pcidrv probe functions. What is even worse that duplication requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core functions to be exported. Therefore move common code into new i2c_dw_probe() and make functions above local to i2c-designware-core. While merging the code patch does following functional changes: - I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it was used for platform and ACPI devices but PCI device used "i2c-designware-pci". - Using device name for interrupt name. Previous it was platform device name, ACPI device name or "i2c-designware-pci". - Error code from devm_request_irq() and i2c_add_numbered_adapter() will be printed in case of error. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Make dw_readl() and dw_writel() staticJarkko Nikula2015-10-151-2/+2
| | | | | | | | | dw_readl() and dw_writel() are not used outside of i2c-designware-core and they are not exported so make them static and remove their forward declaration. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Remove unused functionsJarkko Nikula2015-10-151-13/+0
| | | | | | | | | | i2c_dw_is_enabled() became unused by the commit be58eda775c8 ("i2c: designware-pci: Cleanup driver power management") and i2c_dw_enable() by the commit 3a48d1c08fe0 ("i2c: prevent spurious interrupt on Designware controllers"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Remove interrupt clearing from i2c_dw_pci_probe()Jarkko Nikula2015-10-151-7/+1
| | | | | | | | | | | | | There is no need to clear interrupts in i2c_dw_pci_probe() since only place where interrupts are unmasked is i2c_dw_xfer_init() and there interrupts are always cleared after commit 2a2d95e9d6d2 ("i2c: designware: always clear interrupts before enabling them"). This allows to cleanup the code and replace i2c_dw_clear_int() in i2c_dw_xfer_init() by direct register read as there are no other callers. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Make debug print in i2c_dw_isr() shorterJarkko Nikula2015-08-101-2/+1
| | | | | | | | | | | | | Printing adapter name is irrelevant from this debug print and makes output needlessly long. Having already device and functions names printed here is enough for debugging. While at it remove extra space from "enabled= 0x" and use "%#x" for printing "0x" prefixed hexadecimal values. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: made it a oneliner] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: fixup return handling of wait_for_completion_timeoutNicholas Mc Guire2015-03-151-2/+1
| | | | | | | | | | return type of wait_for_completion_timeout is unsigned long not int, rather than introducing a new variable the wait_for_completion_timeout is moved into the if condition as the return value is only used to detect timeout. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Do not calculate SCL timing parameters needlesslyJarkko Nikula2015-01-261-23/+22
| | | | | | | | | Do SCL timing parameter calculation conditionally depending are custom parameters provided since calculated values will get instantly overwritten by provided parameters. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Add i2c bus locking supportDavid Box2015-01-261-0/+26
| | | | | | | | | | Adds support for acquiring and releasing a hardware bus lock in the i2c designware core transfer function. This is needed for i2c bus controllers that are shared with but not controlled by the kernel. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: use {readl|writel}_relaxed instead of readl/writelJisheng Zhang2015-01-231-6/+6
| | | | | | | | | | | | | | readl/writel is too expensive especially on Cortex A9 w/ outer L2 cache. This introduces i2c read/write delays on Marvell BG2/BG2Q SoCs when there are heavy L2 cache maintenance operations at the same time. The driver does not perform DMA, so it's safe to use the relaxed version. From another side, the relaxed io accessor macros are available on all architectures now, so we can use the relaxed versions instead. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: prevent early stop on TX FIFO emptyAndrew Jackson2014-11-211-1/+1
| | | | | | | | | | | | | | If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN set to zero, allowing the TX FIFO to become empty causes a STOP condition to be generated on the I2C bus. If the transmit FIFO threshold is set too high, an erroneous STOP condition can be generated on long transfers - particularly where the interrupt latency is extended. Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: remove FSF addressWolfram Sang2014-11-071-4/+0
| | | | | | | We have a central copy of the GPL for that. Some addresses were already outdated. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* i2c: designware: Mask all interrupts during i2c controller enableDu, Wenkai2014-05-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been "i2c_designware 80860F41:00: controller timed out" errors on a number of Baytrail platforms. The issue is caused by incorrect value in Interrupt Mask Register (DW_IC_INTR_MASK) when i2c core is being enabled. This causes call to __i2c_dw_enable() to immediately start the transfer which leads to timeout. There are 3 failure modes observed: 1. Failure in S0 to S3 resume path The default value after reset for DW_IC_INTR_MASK is 0x8ff. When we start the first transaction after resuming from system sleep, TX_EMPTY interrupt is already unmasked because of the hardware default. 2. Failure in normal operational path This failure happens rarely and is hard to reproduce. Debug trace showed that DW_IC_INTR_MASK had value of 0x254 when failure occurred, which meant TX_EMPTY was unmasked. 3. Failure in S3 to S0 suspend path This failure also happens rarely and is hard to reproduce. Adding debug trace that read DW_IC_INTR_MASK made this failure not reproducible. But from ISR call trace we could conclude TX_EMPTY was unmasked when problem occurred. The patch masks all interrupts before the controller is enabled to resolve the faulty DW_IC_INTR_MASK conditions. Signed-off-by: Wenkai Du <wenkai.du@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> [wsa: improved the comment and removed typo in commit msg] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: designware: make SCL and SDA falling time configurableRomain Baeriswyl2014-03-091-11/+16
| | | | | | | | | | | | | | | | | This patch allows to set independantly SCL and SDA falling times. The tLOW period is computed by taking into account the SCL falling time. The tHIGH period is computed by taking into account the SDA falling time. For instance in case the margin on tLOW is considered too small, it can be increased by increasing the SCL falling time which is by default set at 300ns. The same applies for tHIGH period with the help of SDA falling time. Signed-off-by: Romain Baeriswyl <romainba@abilis.com> Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: remove HAVE_CLK build dependecyBaruch Siach2014-01-131-1/+0
| | | | | | | | | Since 93abe8e4 (clk: add non CONFIG_HAVE_CLK routines) code using clk.h like this platform driver need not depend on HAVE_CLK. Also, remove a redundant clk.h include from core driver. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* tree-wide: use reinit_completion instead of INIT_COMPLETIONWolfram Sang2013-11-151-1/+1
| | | | | | | | | | | | Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* i2c: designware: 10-bit addressing mode enabling if I2C_DYNAMIC_TAR_UPDATE ↵Chew, Chiau Ee2013-09-271-6/+20
| | | | | | | | | | | | | | | | is set According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1, the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE value can't be detected from hardware register, so we will always set the IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit addresing mode is requested by user application. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: make HCNT/LCNT values configurableMika Westerberg2013-08-281-0/+11
| | | | | | | | | | | | | | | | | | | | The DesignWare I2C controller has high count (HCNT) and low count (LCNT) registers for each of the I2C speed modes (standard and fast). These registers are programmed based on the input clock speed in the driver. The current code calculates these values based on the input clock speed and tries hard to meet the I2C bus timing requirements. This could result non-optimal values with regarding to the bus speed. For example on Intel BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would expect (400kHz) in fast mode (even though the timing requirements are met). This patch makes it possible for the platform code to pass more optimal HCNT/LCNT values to the core driver if they are known beforehand. If these are not set we use the calculated and more conservative values. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Manually set RESTART bit between messagesChew, Chiau Ee2013-08-071-0/+14
| | | | | | | | | | | | If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, the Designware I2C controller doesn't generate RESTART unless user specifically requests it by setting RESTART bit in IC_DATA_CMD register. Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from hardware register, we must always manually set the restart bit between messages. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c-designware: make SDA hold time configurableChristian Ruppert2013-06-261-0/+13
| | | | | | | | | This patch makes the SDA hold time configurable through device tree. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: fix race between subsequent xfersChristian Ruppert2013-06-151-2/+10
| | | | | | | | | | | | | | | | The designware block is not always properly disabled in the case of transfer errors. Interrupts from aborted transfers might be handled after the data structures for the following transfer are initialised but before the hardware is set up. This can corrupt the data structures to the point that the system is stuck in an infinite interrupt loop (where FIFOs are never emptied because dev->msg_read_idx == dev->msgs_num). This patch cleanly disables the designware-i2c hardware at the end of every transfer, be it successful or not. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> [wsa: extended the comment] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: prevent signals from aborting I2C transfersMika Westerberg2013-06-121-3/+2
| | | | | | | | | | | | | | | | If a process receives signal while it is waiting for I2C transfer to complete, an error is returned to the caller and the transfer is aborted. This can cause the driver to fail subsequent transfers. Also according to commit d295a86eab2 (i2c: mv64xxx: work around signals causing I2C transactions to be aborted) I2C drivers aren't supposed to abort transactions on signals. To prevent this switch to use wait_for_completion_timeout() instead of wait_for_completion_interruptible_timeout() in the designware I2C driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: always clear interrupts before enabling themMika Westerberg2013-05-171-1/+2
| | | | | | | | | | | | | | | If the I2C bus is put to a low power state by an ACPI method it might pull the SDA line low (as its power is removed). Once the bus is put to full power state again, the SDA line is pulled back to high. This transition looks like a STOP condition from the controller point-of-view which sets STOP detected bit in its status register causing the driver to fail subsequent transfers. Fix this by always clearing all interrupts before we start a transfer. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: designware: fix RX FIFO overrunJosef Ahmad2013-05-171-1/+10
| | | | | | | | | | | | | | | | | | | | i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive to/from the bus into the TX FIFO. For master-rx transactions, the maximum amount of data that can be received is calculated depending solely on TX and RX FIFO load. This is racy - TX FIFO may contain master-rx data yet to be processed, which will eventually land into the RX FIFO. This data is not taken into account and the function may request more data than the controller is actually capable of storing. This patch ensures the driver takes into account the outstanding master-rx data in TX FIFO to prevent RX FIFO overrun. Signed-off-by: Josef Ahmad <josef.ahmad@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c-designware: switch to use runtime PM autosuspendMika Westerberg2013-04-151-1/+2
| | | | | | | | | | Using autosuspend helps to reduce the resume latency in situations where another I2C message is going to be started soon. For example with HID over I2C touch panels we get several messages in a short period of time while the touch panel is in use. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c-designware: use usleep_range() in the busy-loopMika Westerberg2013-04-151-1/+1
| | | | | | | | This is not an atomic context so there is no need to use mdelay() but instead use usleep_range(). Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c-designware: enable/disable the controller properlyMika Westerberg2013-04-151-6/+28
| | | | | | | | | | | | The correct way to disable or enable the controller is to wait until the DW_IC_ENABLE_STATUS register bit matches the bit we program into DW_IC_ENABLE register. This procedure is described in the DesignWare I2C databook. By doing this we can be sure that the controller is in correct state once the function returns. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c-designware: always set the STOP bit after last byteMika Westerberg2013-01-281-2/+14
| | | | | | | | | | | | | | | | If IC_EMPTYFIFO_HOLD_MASTER_EN is set to one, the DesignWare I2C controller doesn't generate STOP on the bus when the FIFO is empty. This violates the rules of Linux I2C stack as it requires that the STOP is issued once the i2c_transfer() is finished. However, there is no way to detect this from the hardware registers, so we must make sure that the STOP bit is always set once the last byte of the last message is transferred. This patch is based on the work of Dirk Brandewie. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c-designware: add missing MODULE_LICENSEMika Westerberg2013-01-221-0/+4
| | | | | | | | The driver can also be built as a module so add MODULE_LICENSE for it. In addition add MODULE_DESCRIPTION as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c-designware: i2c_dw_xfer_msg can be staticJean Delvare2012-10-051-1/+1
| | | | | | | | | i2c_dw_xfer_msg is only called internally so it can be static. It original was, before the driver split. No idea why it was changed at that time. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Dirk Brandewie <dirk.brandewie@gmail.com>
* i2c-designware: Fix build error if CONFIG_I2C_DESIGNWARE_PLATFORM=y && ↵Axel Lin2012-09-101-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_I2C_DESIGNWARE_PCI=y This patch adds config I2C_DESIGNWARE_CORE in Kconfig, and let I2C_DESIGNWARE_PLATFORM and I2C_DESIGNWARE_PCI select I2C_DESIGNWARE_CORE. Because both I2C_DESIGNWARE_PLATFORM and I2C_DESIGNWARE_PCI can be built as built-in or module, we also need to export the functions in i2c-designware-core. This fixes below build error when CONFIG_I2C_DESIGNWARE_PLATFORM=y && CONFIG_I2C_DESIGNWARE_PCI=y: LD drivers/i2c/busses/built-in.o drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_clear_int': i2c-designware-core.c:(.text+0xa10): multiple definition of `i2c_dw_clear_int' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x928): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_init': i2c-designware-core.c:(.text+0x178): multiple definition of `i2c_dw_init' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x90): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `dw_readl': i2c-designware-core.c:(.text+0xe8): multiple definition of `dw_readl' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x0): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_isr': i2c-designware-core.c:(.text+0x724): multiple definition of `i2c_dw_isr' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x63c): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_xfer': i2c-designware-core.c:(.text+0x4b0): multiple definition of `i2c_dw_xfer' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x3c8): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_is_enabled': i2c-designware-core.c:(.text+0x9d4): multiple definition of `i2c_dw_is_enabled' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8ec): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `dw_writel': i2c-designware-core.c:(.text+0x124): multiple definition of `dw_writel' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x3c): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_xfer_msg': i2c-designware-core.c:(.text+0x2e8): multiple definition of `i2c_dw_xfer_msg' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x200): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_enable': i2c-designware-core.c:(.text+0x9c8): multiple definition of `i2c_dw_enable' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8e0): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_read_comp_param': i2c-designware-core.c:(.text+0xa24): multiple definition of `i2c_dw_read_comp_param' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x93c): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_disable': i2c-designware-core.c:(.text+0x9dc): multiple definition of `i2c_dw_disable' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x8f4): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_func': i2c-designware-core.c:(.text+0x710): multiple definition of `i2c_dw_func' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x628): first defined here drivers/i2c/busses/i2c-designware-pci.o: In function `i2c_dw_disable_int': i2c-designware-core.c:(.text+0xa18): multiple definition of `i2c_dw_disable_int' drivers/i2c/busses/i2c-designware-platform.o:i2c-designware-platdrv.c:(.text+0x930): first defined here make[3]: *** [drivers/i2c/busses/built-in.o] Error 1 make[2]: *** [drivers/i2c/busses] Error 2 make[1]: *** [drivers/i2c] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Jean Delvare <khali@linux-fr.org> Tested-by: Jiri Slaby <jslaby@suse.cz> Cc: stable@vger.kernel.org [3.2+]
* i2c: designware: Add support for 16bit register accessStefan Roese2012-05-121-10/+21
| | | | | | | | | The STM SPEAr platform can only access the i2c controller register via 16bit read/write functions. This patch adds support to automatically detect this 16bit access mode. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* i2c-designware: Add runtime power management supportDirk Brandewie2011-10-291-2/+8
| | | | | | | Add runtime power management to the PCI driver. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: Push all register reads/writes into the core code.Dirk Brandewie2011-10-291-0/+135
| | | | | | | | | Move all register manipulation code into the core, also move register offset definitions to i2c-designware-core.c since the bus specific portions of the driver no longer need/use them. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: Support multiple cores using same ISRDirk Brandewie2011-10-291-2/+8
| | | | | | | | | | Add check to make sure that the core is enabled and has outstanding interrupts. The activity bit is masked due to the fact that it will stay active even after the controller has been disabled until the contoller internal state machines have settled. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: move controller config to bus specific portion of driverDirk Brandewie2011-10-291-4/+2
| | | | | | | | | With multiple I2C adapters possible in the system each running at (possibly) different speeds we need to move the controller configuration bit field to the adapter. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: move i2c functionality bit field to be adapter specificDirk Brandewie2011-10-291-6/+2
| | | | | | | | The functionality of the adapter depends on the configuration of the IP block at silicon compile time and is adapter specific. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: Move retriveving the clock speed out of core code.Dirk Brandewie2011-10-291-1/+3
| | | | | | | | | | The clock frequecy supplied to the IP core is specific to a single instance of the driver. This patch makes it possible to have multiple Designware I2C cores in the system possibly running at different core frequencies. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* i2c-designware: split of i2c-designware.c into core and bus specific partsDirk Brandewie2011-10-291-0/+562
This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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