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path: root/drivers/hwtracing/coresight/coresight-etm4x.c
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* coresight: Moving framework and drivers to SPDX identifierMathieu Poirier2018-05-141-10/+3
| | | | | | | Moving all kernel side CoreSight framework and drivers to SPDX identifier. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: constify amba_idArvind Yadav2017-08-281-1/+1
| | | | | | | | amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: Adds trace return stack option programming for ETMv4.Mike Leach2017-08-281-0/+4
| | | | | | | | | | | | | Adds handling to program the return stack option into ETMv4 hardware if specified in the perf command line. If option is not supported by the hardware then it will be ignored. This allows capture to move between core/ETM combinations that have the hardware support to those that do not. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* hwtracing/coresight-etm4x: Use cpuhp_setup_state_nocalls_cpuslocked()Sebastian Andrzej Siewior2017-05-261-10/+10
| | | | | | | | | | | | | | | | | | | | | | | etm_probe4() holds get_online_cpus() while invoking cpuhp_setup_state_nocalls(). cpuhp_setup_state_nocalls() invokes get_online_cpus() as well. This is correct, but prevents the conversion of the hotplug locking to a percpu rwsem. Use cpuhp_setup_state_nocalls_cpuslocked() to avoid the nested call. Convert *_online_cpus() to the new interfaces while at it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Ingo Molnar <mingo@kernel.org> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/20170524081547.983493849@linutronix.de
* coresight: etm4x: Fix timestamp configuration when working from perfMathieu Poirier2017-01-251-1/+2
| | | | | | | | | | | | | | | | | When using the ETM4x tracers from the perf interface two trace options are available: cycle accurate and timestamp. Enabling the timestamp feature is done by setting TRCCONFIGR.TS (bit 11). The position of the timestamp bit in that register coincidentally happens to be the same as what was chosen to enable timestamping from the 'mode' sysFS entry. The code does the right thing but the semantic is wrong. This patch sets TRCCONFIGR.TS explicitly, as it is done from the sysFS interface. That way timestamps are set the same way from both perf and sysFS and there is no misunderstanding as to what is intended. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: Fix enabling of cycle accurate tracing in perf.Mike Leach2017-01-251-2/+5
| | | | | | | | | | | | Using perf record 'cyclacc' option in cs_etm event was not setting up cycle accurate trace correctly. Corrects bit set in TRCCONFIGR to enable cycle accurate trace. Programs TRCCCCTLR with a valid threshold value as required by ETMv4 spec. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight/etm3/4x: Consolidate hotplug state spaceThomas Gleixner2016-12-251-2/+2
| | | | | | | | | | | | | | | Even if both drivers are compiled in only one instance can run on a given system depending on the available tracer cell. So having seperate hotplug states for them is pointless. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Link: http://lkml.kernel.org/r/20161221192112.162765484@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* cpu/hotplug: Cleanup state namesThomas Gleixner2016-12-251-2/+2
| | | | | | | | | | | | | | | | | When the state names got added a script was used to add the extra argument to the calls. The script basically converted the state constant to a string, but the cleanup to convert these strings into meaningful ones did not happen. Replace all the useless strings with 'subsys/xxx/yyy:state' strings which are used in all the other places already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Link: http://lkml.kernel.org/r/20161221192112.085444152@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* coresight: etm4x: adding configurable start/stop filteringMathieu Poirier2016-08-311-0/+71
| | | | | | | | | | With this patch we add start/stop filtering as specified on the perf cmd line. When the IP matches the start address trace generation gets triggered. The stop condition is achieved when the IP matches the stop address. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: adding configurable address range filteringMathieu Poirier2016-08-311-9/+119
| | | | | | | | | This patch adds the capability to specify address ranges from the perf cmd line using the --filter option. If the IP falls within the range(s) program flow traces are generated. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: configuring include/exclude functionMathieu Poirier2016-08-311-10/+25
| | | | | | | | | The include/exclude function of a tracer is applicable to address range and start/stop filters. To avoid duplication and reuse code moving the include/exclude configuration to a function of its own. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: adding range filter configuration functionMathieu Poirier2016-08-311-18/+38
| | | | | | | | Introducing a new function to do address range configuration generic enough to work for any address range and any comparator. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: cleaning up default filter configurationMathieu Poirier2016-08-311-26/+27
| | | | | | | | | | | The default filter configuration was hard to read and included some redundancy. This patch attempts to stream line configuration and improve readability. No change of functionality is included. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: split default and filter configurationMathieu Poirier2016-08-311-14/+22
| | | | | | | | | | | | | | Splitting the steps involved in the configuration of a tracer. The first part is generic and can be reused for both sysFS and Perf methods. The second part pertains to the configuration of filters themselves where the source of the information used to configure the filters will vary depending on the access methods. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm-perf: pass struct perf_event to source::enable/disable()Mathieu Poirier2016-08-311-8/+11
| | | | | | | | | | | | With this commit [1] address range filter information is now found in the struct hw_perf_event::addr_filters. As such pass the event itself to the coresight_source::enable/disable() functions so that both event attribute and filter can be accessible for configuration. [1] 'commit 375637bc5249 ("perf/core: Introduce address range filtering")' Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: request to retain power to the trace unit when activeSudeep Holla2016-08-311-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Coresight ETMv4 architecture provides a way to request to keep the power to the trace unit. This might help to collect the traces without the need to disable the CPU power management(entering/exiting deeper idle states). Trace PowerDown Control Register provides powerup request bit which when set requests the system to retain power to the trace unit and emulate the powerdown request. Typically, a trace unit drives a signal to the power controller to request that the trace unit core power domain is powered up. However, if the trace unit and the CPU are in the same power domain then the implementation might combine the trace unit power up status with a signal from the CPU. This patch requests to retain power to the trace unit when active and to remove when inactive. Note this change will only request but the behaviour depends on the implementation. However, it matches the exact behaviour expected when the external debugger is connected with respect to CPU power states. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: remove duplicated include from coresight-etm4x.cWei Yongjun2016-08-311-1/+0
| | | | | | | | Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Use local coresight_desc instancesSuzuki K Poulose2016-08-311-12/+8
| | | | | | | | | | | | | | | Each coresight device prepares a description for coresight_register() in struct coresight_desc. Once we register the device, the description is useless and can be freed. The coresight_desc is small enough (48bytes on 64bit)i to be allocated on the stack. Hence use an automatic variable to avoid a needless dynamic allocation and wasting the memory(which will only be free'd when the device is destroyed). Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Add better messages for coresight_timeoutSuzuki K Poulose2016-08-311-4/+2
| | | | | | | | | | | | | | When we encounter a timeout waiting for a status change via coresight_timeout, the caller always print the offset which was tried. This is pretty much useless as it doesn't specify the bit position we wait for. Also, one needs to lookup the TRM to figure out, what was wrong. This patch changes all such error messages to print something more meaningful. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etmv4: Fix ETMv4x peripheral ID tableSuzuki K Poulose2016-08-311-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up the peripheral id table for different ETMv4 implementations. As per Cortex-A53 TRM, the ETM has following id values: Peripheral ID0 0x5D 0xFE0 Peripheral ID1 0xB9 0xFE4 Peripheral ID2 0x4B 0xFE8 Peripheral ID3 0x00 0xFEC where, PID2: has the following format: [7:4] Revision [3] JEDEC 0b1 res1. Indicates a JEP106 identity code is used [2:0] DES_1 0b011 ARM Limited. This is bits[6:4] of JEP106 ID code The existing table entry checks only the bits [1:0], which is not sufficient enough. Fix it to match bits [3:0], just like the other entries do. While at it, correct the comment for A57 and the A53 entry. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: always use stashed trace id value in etm4_trace_idSudeep Holla2016-08-311-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | etm4_trace_id is not guaranteed to be executed on the CPU whose ETM is being accessed. This leads to exception similar to below one if the CPU whose ETM is being accessed is in deeper idle states. So it must be executed on the CPU whose ETM is being accessed. Unhandled fault: synchronous external abort (0x96000210) at 0xffff000008db4040 Internal error: : 96000210 [#1] PREEMPT SMP Modules linked in: CPU: 5 PID: 5979 Comm: etm.sh Not tainted 4.7.0-rc3 #159 Hardware name: ARM Juno development board (r2) (DT) task: ffff80096dd34b00 ti: ffff80096dfe4000 task.ti: ffff80096dfe4000 PC is at etm4_trace_id+0x5c/0x90 LR is at etm4_trace_id+0x3c/0x90 Call trace: etm4_trace_id+0x5c/0x90 coresight_id_match+0x78/0xa8 bus_for_each_dev+0x60/0xa0 coresight_enable+0xc0/0x1b8 enable_source_store+0x3c/0x70 dev_attr_store+0x18/0x28 sysfs_kf_write+0x48/0x58 kernfs_fop_write+0x14c/0x1e0 __vfs_write+0x1c/0x100 vfs_write+0xa0/0x1b8 SyS_write+0x44/0xa0 el0_svc_naked+0x24/0x28 However, TRCTRACEIDR is not guaranteed to hold the previous programmed trace id if it enters deeper idle states. Further, the trace id that is computed in etm4_init_trace_id is programmed into TRCTRACEIDR only in etm4_enable_hw which happens much later in the sequence after coresight_id_match is executed from enable_source_store. This patch simplifies etm4_trace_id by returning the stashed trace id value similar to etm4_cpu_id. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* hwtracing/coresight-etm4x: Convert to hotplug state machineSebastian Andrzej Siewior2016-07-151-38/+49
| | | | | | | | | | | | | | | | This driver has an asymmetry of ONLINE code without any corresponding tear down code. Otherwise, this is a straightforward conversion. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: rt@linutronix.de Link: http://lkml.kernel.org/r/20160713153337.228918408@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
* coresight: etm4x: add tracer ID for A72 Maia processor.Li Pengcheng2016-05-031-0/+5
| | | | | | | | | | This patch adds a cellID for the ETMv4 tracer found on HiSillicon's A72 Maia processor. Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Li Zhong <lizhong11@hisilicon.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: implementing the perf PMU APIMathieu Poirier2016-05-011-5/+80
| | | | | | | | Adding a set of API allowing the Perf core to treat ETMv4 tracers like other PMUs. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: implementing user/kernel mode tracingMathieu Poirier2016-05-011-0/+35
| | | | | | | Adding new mode to limit tracing to kernel or user space. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: moving etm_drvdata::enable to atomic fieldMathieu Poirier2016-05-011-9/+60
| | | | | | | | | Similarly to ETMv3, moving etmv4_drvdata::enable to an atomic type that gives the 'mode' of a tracer and prevents multiple, simultanious access by different subsystems. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: unlocking tracers in default arch initMathieu Poirier2016-05-011-6/+5
| | | | | | | | | | As with the ETMv3.x driver, calling 'smp_call_function_single()' twice in a row is highly ineffective. As such moving function 'etm4_os_unlock()' before the default initialisation takes place, which results in the same outcome. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: splitting etmv4 default configurationMathieu Poirier2016-05-011-67/+61
| | | | | | | | | | | | Splitting and updating the default initialisation for each etmv4 configuration so that it can be called at the beginning of each session rather than initialisation time only. Since the trace ID isn't expected to change with every session, moving it with the default tracer initialisation. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: splitting struct etmv4_drvdataMathieu Poirier2016-05-011-66/+68
| | | | | | | | | | | | | Similar to what was done on etm3x, splitting driver structure etmv4_drvdata in two. One half is concerned with the HW characteristics that are generally static in nature. The other half deals with user configuration and will change from one trace session to another. No gain/loss of functionality is incurred from this patch. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm4x: moving sysFS entries to a dedicated fileMathieu Poirier2016-05-011-2029/+0
| | | | | | | | | | | As with the etm3x driver, sysFS entries are big enough to justify their own file. As such moving all sysFS related declarations to a dedicated location. No gain/loss of functionality is incurred from this patch. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drivers/hwtracing: make coresight-* explicitly non-modularPaul Gortmaker2016-02-201-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the Kconfig currently controlling compilation of any of the files here are tristate, meaning that none of it currently is being built as a module by anyone. We need not be concerned about .remove functions and blocking the unbind sysfs operations, since that was already done in a recent commit. Lets remove any remaining modular references, so that when reading the drivers there is no doubt they are builtin-only. All drivers get mostly the same changes, so they are handled in batch. Changes are (1) convert to builtin_amba_driver, (2) delete module.h include where unused, and (3) relocate the description into the comments so we don't need MODULE_DESCRIPTION and associated tags. The etm3x and etm4x use module_param_named, and have been adjusted to just include moduleparam.h for that purpose. In commit f309d4443130bf814e991f836e919dca22df37ae ("platform_device: better support builtin boilerplate avoidance") we introduced the builtin_driver macro. Here we use that support and extend it to amba driver registration, so where a driver is clearly non-modular and builtin-only, we can update with the simple mapping of module_amba_driver(...) ---> builtin_amba_driver(...) Since module_amba_driver() uses the same init level priority as builtin_amba_driver() the init ordering remains unchanged with this commit. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm3x: implementing perf_enable/disable() APIMathieu Poirier2016-02-201-1/+3
| | | | | | | | That way traces can be enabled and disabled automatically from the Perf subystem using the PMU abstraction. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm3x: adding operation mode for etm_enable()Mathieu Poirier2016-02-201-1/+1
| | | | | | | | | | | | | Adding a new mode to source API enable() in order to distinguish where the request comes from. That way it is possible to perform different operations based on where the request was issued from. The ETM4x driver is also modified to keep in sync with the new interface. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: moving PM runtime operations to core frameworkMathieu Poirier2016-02-201-6/+0
| | | | | | | | | | | | Moving PM runtime operations in Coresight devices enable() and disable() API to the framework core when a path is setup. That way the runtime core doesn't have to be involved everytime a path is enabled. It also avoids calling runtime PM operations in IRQ context. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: "DEVICE_ATTR_RO" should defined as static.Eric Long2016-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | "DEVICE_ATTR_RO(name)" should be defined as static. And there is an unnecessary space at the front of the code. The sparse tool output logs as the following: coresight-etm4x.c:2224:1: warning: symbol 'dev_attr_trcoslsr' was not declared. Should it be static? coresight-etm4x.c:2225:1: warning: symbol 'dev_attr_trcpdcr' was not declared. Should it be static? coresight-etm4x.c:2226:1: warning: symbol 'dev_attr_trcpdsr' was not declared. Should it be static? And the smatch tool output logs as the following: of_coresight.c:89 of_coresight_alloc_memory() warn: inconsistent indenting Signed-off-by: Eric Long <eric.long@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: implementing 'cpu_id()' APIMathieu Poirier2016-02-071-0/+8
| | | | | | | | | | Other than plainly parsing the device tree there is no way to know which CPU a tracer is affined to. As such adding an interface to lookup the CPU field enclosed in the etm_drvdata structure that was initialised at boot time. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: removing bind/unbind options from sysfsMathieu Poirier2016-02-071-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The coresight drivers have absolutely no control over bind and unbind operations triggered from sysfs. The operations simply can't be cancelled or denied event when one or several tracing sessions are under way. Since the memory associated to individual device is invariably freed, the end result is a kernel crash when the path from source to sink is travelled again as demonstrated here[1]. One solution could be to keep track of all the path (i.e tracing session) that get created and iterate through the elements of those path looking for the coresight device that is being removed. This proposition doesn't scale well since there is no upper bound on the amount of concurrent trace session that can be created. With the above in mind, this patch prevent devices from being unbounded from their driver by using the driver->suppress_bind_attr option. That way trace sessions can be managed without fearing to loose devices. Since device can't be removed anymore the xyz_remove() functions found in each driver is also removed. [1]. http://www.spinics.net/lists/arm-kernel/msg474952.html Reported-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Coresight: ETMv4: Prevent TRCRSCTLR0&1 from being accessedChunyan Zhang2015-10-071-6/+16
| | | | | | | | | | | | | | | 1. TRCRSCTLRn - Resource Selection Control Registers n=0~1 are reserved, we shouldn't access them. 2. The max number of 'n' here is defined in TRCIDR4.NUMRSPAIR whoes value indicates the number of resource selection *pairs*, and 0 indicates one resource selection pair, 1 indicates two pairs, and so on ... So, the total number of resource selection control registers which we can access is (TRCIDR4.NUMRSPAIR * 2) Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Support context-ID tracing when PID namespace is enabledChunyan Zhang2015-08-051-6/+15
| | | | | | | | | Like ETTv3, ETMv4 also needs the similar modifications to support Context ID tracing when PID namespace is enabled. Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Change the name of the ctxid_val to ctxid_pidChunyan Zhang2015-08-051-10/+10
| | | | | | | | | | | | | | | | 'ctxid_val' array was used to store the value of ETM context ID comparator which actually stores the process ID to be traced, so using 'ctxid_pid' as its name instead make it easier to understand. This patch also changes the ABI, it is normally not allowed, but fortunately it is a testing ABI and very new for now. Nevertheless, if you don't think it should be changed, we could always add an alias for userspace. Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drivers/hwtracing: fix coresight-etm4x implicit <module.h> usagePaul Gortmaker2015-06-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 2e1cdfe184b5202d51e0611d7a051e2bea303946 ("coresight-etm4x: Adding CoreSight ETM4x driver") this driver was added. It uses module_amba_driver() to register itself with the system, which is just an alias for module_driver. This currently works by relying on getting that via init.h but we are planning to move that code[1] to module.h -- at which time this will fail to compile since it does not include module.h currently, resulting in: drivers/hwtracing/coresight/coresight-etm4x.c:2701:1: note: in expansion of macro ‘module_amba_driver’ module_amba_driver(etm4x_driver); ^ include/linux/device.h:1296:1: error: type defaults to ‘int’ in declaration of ‘module_init’ [-Werror=implicit-int] module_init(__driver##_init); \ ^ In the future, the amba support may want to create another alias that uses builtin_driver[2] for cases like this which are using bool Kconfig triggers, but for now we just fix the implicit include. [1] https://lkml.kernel.org/r/1433276168-21550-1-git-send-email-paul.gortmaker@windriver.com [2] https://lkml.kernel.org/r/1431287385-1526-1-git-send-email-paul.gortmaker@windriver.com Cc: Pratik Patel <pratikp@codeaurora.org> Cc: Kaixu Xia <xiakaixu@huawei.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Read only access to the tracer's ID registersMathieu Poirier2015-05-241-0/+37
| | | | | | | | | ETM ID registers contain valuable information about the capabilities of the implementation and are very useful when configuring the device for various trace scenarios. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Read only access to the main management registersMathieu Poirier2015-05-241-1/+52
| | | | | | | | | Having access to the ETMv4 management registers is very useful as they give meaningful information on how the IP block has been configured at synthesis time. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the VM ID functionsPratik Patel2015-05-241-0/+178
| | | | | | | | | Adding sysfs entries to access and configure specifics about the virtual machine ID comparator functions. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the context ID functionsPratik Patel2015-05-241-0/+187
| | | | | | | | | Adding sysfs entries to access and configure specifics about the context ID comparator functions. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the selection of resourcesPratik Patel2015-05-241-0/+75
| | | | | | | | | Adding sysfs entries to control the selection of the resources the trace unit will use as triggers to perform a trace run. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the counter functionsPratik Patel2015-05-241-0/+144
| | | | | | | | | Adding sysfs entries related to the counter functionality, more specifically to set, control and reload the counters. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the sequencer functionsPratik Patel2015-05-241-0/+129
| | | | | | | | | | Adding sysfs entries to access the sequencers related registers, more specifically the sequencer state, the sequencer state transition and the sequencer reset control registers. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the address comparator functionsPratik Patel2015-05-241-0/+423
| | | | | | | | | | | Adding sysfs entries to control the various mode the address comparator registers can enact, i.e, start/top, single, and range. Also supplementing with address comparator types configuration registers access, mandatory to complete the configuration of the comparator functions. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight-etm4x: Controls pertaining to the ViewInst registerPratik Patel2015-05-241-0/+98
| | | | | | | | | | Adding sysfs entries to control the ViewInst register's event selector along with secure and non-secure exception level instruction tracing. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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