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* Merge branch 'drm-fixes-3.15' of ↵Dave Airlie2014-05-229-79/+216
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~deathsimple/linux into drm-fixes radeon fixes, VCE one is big but does fix a userspace crash. * 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon/pm: don't allow debugfs/sysfs access when PX card is off (v2) drm/radeon: avoid segfault on device open when accel is not working. drm/radeon: fix typo in finding PLL params drm/radeon: fix register typo on si drm/radeon: fix buffer placement under memory pressure v2 drm/radeon: fix page directory update size estimation drm/radeon: handle non-VGA class pci devices with ATRM drm/radeon: fix DCE83 check for mullins drm/radeon: check VCE relocation buffer range v3 drm/radeon: also try GART for CPU accessed buffers
| * drm/radeon/pm: don't allow debugfs/sysfs access when PX card is off (v2)Alex Deucher2014-05-201-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the PX card is off don't try and access it. Avoid hw access to the card while it's off (e.g., reading back invalid temperature). v2: be less strict bug: https://bugzilla.kernel.org/show_bug.cgi?id=76321 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: avoid segfault on device open when accel is not working.Jérôme Glisse2014-05-201-26/+29
| | | | | | | | | | | | | | | | | | | | | | | | When accel is not working on device with virtual address space radeon segfault because the ib buffer is NULL and trying to map it inside the virtual address space trigger segfault. This patch only map the ib buffer if accel is working. Cc: <stable@vger.kernel.org> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: fix typo in finding PLL paramsChristian König2014-05-201-1/+1
| | | | | | | | | | | | | | Otherwise the limit is raised to high. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
| * drm/radeon: fix register typo on siAlex Deucher2014-05-201-2/+2
| | | | | | | | | | | | | | | | Probably a copy paste typo. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix buffer placement under memory pressure v2Christian König2014-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some buffers (UVD/VM page tables) must be placed in VRAM, but the byte restriction for moving buffers didn't took this into account. v2: keep closer to the original code Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
| * drm/radeon: fix page directory update size estimationChristian König2014-05-201-1/+1
| | | | | | | | | | | | | | | | | | Take padding into account as well. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75651 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: handle non-VGA class pci devices with ATRMAlex Deucher2014-05-201-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | Newer PX systems have non-VGA pci class dGPUs. Update the ATRM fetch method to handle those cases. bug: https://bugzilla.kernel.org/show_bug.cgi?id=75401 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix DCE83 check for mullinsAlex Deucher2014-05-201-1/+2
| | | | | | | | | | | | | | | | Mullins is DCE83 just like Kabini. Set the proper number of endpoints on mullins. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: check VCE relocation buffer range v3Leo Liu2014-05-202-31/+102
| | | | | | | | | | | | | | | | v2 (chk): fix image size storage v3 (chk): fix UV size calculation Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: also try GART for CPU accessed buffersChristian König2014-05-201-15/+23
| | | | | | | | | | | | | | | | | | | | Placing them exclusively into VRAM might not work all the time. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78297 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | Merge branch 'drm-nouveau-next' of ↵Dave Airlie2014-05-222-1/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes fixes nasty panel bleeding bug. * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/gf119-/disp: fix nasty bug which can clobber SOR0's clock setup drm/nvd9/therm: handle another kind of PWM fan
| * drm/gf119-/disp: fix nasty bug which can clobber SOR0's clock setupBen Skeggs2014-05-201-1/+1
| | | | | | | | | | | | | | | | Fixes a LVDS bleed issue on Lenovo W530 that can occur under a number of circumstances. Cc: <stable@vger.kernel.org > # v3.9+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd9/therm: handle another kind of PWM fanMartin Peres2014-05-201-0/+1
| | | | | | | | | | | | Signed-off-by: Martin Peres <martin.peres@free.fr> Tested-by: SaveTheRobots <john.rowley08@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | Merge tag 'drm-intel-fixes-2014-05-16' of ↵Dave Airlie2014-05-207-29/+141
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel into drm-fixes Intel fixes for regressions, black screens and hangs, for 3.15. * tag 'drm-intel-fixes-2014-05-16' of git://anongit.freedesktop.org/drm-intel: drm/i915: Increase WM memory latency values on SNB drm/i915: restore backlight precision when converting from ACPI drm/i915: Use the first mode if there is no preferred mode in the EDID drm/i915/dp: force eDP lane count to max available lanes on BDW drm/i915/vlv: reset VLV media force wake request register drm/i915/SDVO: For sysfs link put directory and target in correct order drm/i915: use lane count and link rate from VBT as minimums for eDP drm/i915: clean up VBT eDP link param decoding drm/i915: consider the source max DP lane count too
| * | drm/i915: Increase WM memory latency values on SNBVille Syrjälä2014-05-151-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On SNB the BIOS provided WM memory latency values seem insufficient to handle high resolution displays. In this particular case the display mode was a 2560x1440@60Hz, which makes the pixel clock 241.5 MHz. It was empirically found that a memory latency value if 1.2 usec is enough to avoid underruns, whereas the BIOS provided value of 0.7 usec was clearly too low. Incidentally 1.2 usec is what the typical BIOS provided values are on IVB systems. Increase the WM memory latency values to at least 1.2 usec on SNB. Hopefully this won't have a significant effect on power consumption. v2: Increase the latency values regardless of the pixel clock Cc: Robert N <crshman@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70254 Tested-by: Robert Navarro <crshman@gmail.com> Tested-by: Vitaly Minko <vitaly.minko@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: restore backlight precision when converting from ACPIAaron Lu2014-05-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we set backlight on behalf of ACPI opregion, we will convert the backlight value in the 0-255 range defined in opregion to the actual hardware level. Commit 22505b82a2 (drm/i915: avoid brightness overflow when doing scale) is meant to fix the overflow problem when doing the conversion, but it also caused a problem that the converted hardware level doesn't quite represent the intended value: say user wants maximum backlight level(255 in opregion's range), then we will calculate the actual hardware level to be: level = freq / max * level, where freq is the hardware's max backlight level(937 on an user's box), and max and level are all 255. The converted value should be 937 but the above calculation will yield 765. To fix this issue, just use 64 bits to do the calculation to keep the precision and avoid overflow at the same time. Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=72491 Reported-by: Nico Schottelius <nico-bugzilla.kernel.org@schottelius.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: Use the first mode if there is no preferred mode in the EDIDChris Wilson2014-05-151-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the algorithm used by earlier kernels when selecting the mode for the fbcon. And only if there is no modes at all, do we fall back to using the BIOS configuration. Seamless transition is still preserved (from the BIOS configuration to ours) so long as the BIOS has also chosen what we hope is the native configuration. Reported-by: Knut Petersen <Knut_Petersen@t-online.de> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78655 Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Knut Petersen <Knut_Petersen@t-online.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [Jani: applied Chris' "Please imagine that I wrote this correctly."] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915/dp: force eDP lane count to max available lanes on BDWJani Nikula2014-05-151-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are certain BDW high res eDP machines that regressed due to commit 38aecea0ccbb909d635619cba22f1891e589b434 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Mar 3 11:18:10 2014 +0100 drm/i915: reverse dp link param selection, prefer fast over wide again The commit lead to 2 lanes at 5.4 Gbps being used instead of 4 lanes at 2.7 Gbps on the affected machines. Link training succeeded for both, but the screen remained blank with the former config. Further investigation showed that 4 lanes at 5.4 Gbps worked also. The root cause for the blank screen using 2 lanes remains unknown, but apparently the driver for a certain other operating system by default uses the max available lanes. Follow suit on Broadwell eDP, for at least until we figure out what is going on. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76711 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Tested-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915/vlv: reset VLV media force wake request registerJani Nikula2014-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Media force wake get hangs the machine when the system is booted without displays attached. The assumption is that (at least some versions of) the firmware has skipped some initialization in that case. Empirical evidence suggests we need to reset the media force wake request register in addition to the render one to avoid hangs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75895 Reported-by: Imre Deak <imre.deak@intel.com> Reported-by: Darren Hart <dvhart@linux.intel.com> Tested-by: Darren Hart <dvhart@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915/SDVO: For sysfs link put directory and target in correct orderEgbert Eich2014-05-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When linking the i2c sysfs file into the connector's directory pass directory and link target in the right order. This code was introduced with: commit 931c1c26983b4f84e33b78579fc8d57e4a14c6b4 Author: Imre Deak <imre.deak@intel.com> Date: Tue Feb 11 17:12:51 2014 +0200 drm/i915: sdvo: add i2c sysfs symlink to the connector's directory This is the same what we do for DP connectors, so make things more consistent. Signed-off-by: Egbert Eich <eich@suse.de> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: use lane count and link rate from VBT as minimums for eDPJani Nikula2014-05-071-7/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most likely the minimums for both should be enough for enabling the native resolution on the eDP, and we'll end up using the predetermined optimal link config for the panel. v2: Add debug prints. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73539 Tested-by: Markus Blank-Burian <burian@muenster.de> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: clean up VBT eDP link param decodingJani Nikula2014-05-071-14/+38
| | | | | | | | | | | | | | | | | | | | | Use defines, do not set anything if VBT has values unknown to us. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: consider the source max DP lane count tooPaulo Zanoni2014-05-071-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even if the panel claims it can support 4 lanes, there's the possibility that the HW can't, so consider this while selecting the max lane count. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* | | Merge branch 'mullins' of git://people.freedesktop.org/~deathsimple/linux ↵Dave Airlie2014-05-0710-31/+187
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes Add Mullins chips support. * 'mullins' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: add pci ids for Mullins drm/radeon: add Mullins VCE support drm/radeon: modesetting updates for Mullins. drm/radeon: dpm updates for KV/KB drm/radeon: add Mullins dpm support. drm/radeon: add Mullins UVD support. drm/radeon: update cik init for Mullins. drm/radeon: add Mullins chip family
| * | drm/radeon: add Mullins VCE supportLeo Liu2014-05-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | VCE 2.0 just like the other CIK parts. Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: modesetting updates for Mullins.Samuel Li2014-05-061-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Uses the same code as Kabini. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: dpm updates for KV/KBAlex Deucher2014-05-061-20/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Use vddc/sclk dep table for voltage if available - Fix UVD DPM setup - Patch voltage tables properly for non-UVD blocks - Fix DPM + UVD/VCE on Mullins Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: add Mullins dpm support.Samuel Li2014-05-062-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Generic dpm support similar to Kabini. Mullins specific features will be worked on later. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: add Mullins UVD support.Samuel Li2014-05-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Has same version of UVD as other CIK parts. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: update cik init for Mullins.Samuel Li2014-05-062-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | Also add golden registers, update firmware loading functions. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: add Mullins chip familySamuel Li2014-05-063-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Mullins is a new CI-based APU. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
* | | Merge branch 'drm-nouveau-next' of ↵Dave Airlie2014-05-074-9/+10
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes nouveau fixes. * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/gm107/gr: bump attrib cb size quite a bit drm/nouveau: fix another lock unbalance in nouveau_crtc_page_flip drm/nouveau/bios: fix shadowing from PROM on big-endian systems drm/nouveau/acpi: allow non-optimus setups to load vbios from acpi
| * | drm/gm107/gr: bump attrib cb size quite a bitBen Skeggs2014-05-021-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | When initially looking at traces, missed the fact the binary driver was using large pages. Fixes page faults when launching geometry shaders. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | drm/nouveau: fix another lock unbalance in nouveau_crtc_page_flipMaarten Lankhorst2014-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes a regression introduced by 060810d7abaabca "drm/nouveau: fix locking issues in page flipping paths". chan->cli->mutex is unlocked a second time in the fail_unreserve path, fix this by moving mutex_unlock down. Cc: stable@vger.kernel.org # v3.11+ Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | drm/nouveau/bios: fix shadowing from PROM on big-endian systemsBen Skeggs2014-05-021-4/+6
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | drm/nouveau/acpi: allow non-optimus setups to load vbios from acpiIlia Mirkin2014-05-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There appear to be a crop of new hardware where the vbios is not available from PROM/PRAMIN, but there is a valid _ROM method in ACPI. The data read from PCIROM almost invariably contains invalid instructions (still has the x86 opcodes), which makes this a low-risk way to try to obtain a valid vbios image. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76475 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: <stable@vger.kernel.org> # v2.6.35+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | Merge tag 'topc/core-stuff-2014-05-05' of ↵Dave Airlie2014-05-074-20/+44
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel into drm-fixes Some more i915 fixes. There's still some DP issues we are looking into, but wanted to get these moving. * tag 'topc/core-stuff-2014-05-05' of git://anongit.freedesktop.org/drm-intel: drm/i915: don't try DP_LINK_BW_5_4 on HSW ULX drm/i915: Sanitize the enable_ppgtt module option once drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc()
| * | drm/i915: don't try DP_LINK_BW_5_4 on HSW ULXPaulo Zanoni2014-04-302-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Because the docs say ULX doesn't support it on HSW. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: Sanitize the enable_ppgtt module option onceDaniel Vetter2014-04-291-7/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise we'll end up spamming dmesg on every context creation on snb with vt-d enabled. This regression was introduced in commit 246cbfb5fb9a1ca0997fbb135464c1ff5bb9c549 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Fri Dec 6 14:11:14 2013 -0800 drm/i915: Reorganize intel_enable_ppgtt As the i915.enable_ppgtt is read-only it cannot be changed after the module is loaded and so we can perform an early sanitization of the values. v2: - Add comment and pimp commit message (Chris) - Use the param consistently (Jani) v3: - Fix init sequence on pre-gen6 by moving the sanitize_ppgtt call to gtt_init. Fixes boot hangs on pre-gen6. - Add a debug output for the sanitize ppgtt mode. References: https://lkml.org/lkml/2014/4/17/599 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77916 Cc: Alessandro Suardi <alessandro.suardi@gmail.com> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc()Egbert Eich2014-04-251-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on the SDVO output_flags SDVO may have multiple connectors linking to the same encoder (in intel_connector->encoder->base). Only one of those connectors should be active (ie link to the encoder thru drm_connector->encoder). If intel_connector_break_all_links() is called from intel_sanitize_crtc() we may break the crtc connection of an encoder thru an inactive connector in which case intel_connector_break_all_links() will not be called again for the active connector if this happens to come later in the list due to: if (connector->encoder->base.crtc != &crtc->base) continue; in intel_sanitize_crtc(). This will however leave the drm_connector->encoder linkage for this active connector in place. Subsequently this will cause multiple warnings in intel_connector_check_state() to trigger and the driver will eventually die in drm_encoder_crtc_ok() (because of crtc == NULL). To avoid this remove intel_connector_break_all_links() and move its code to its two calling functions: intel_sanitize_crtc() and intel_sanitize_encoder(). This allows to implement the link breaking more flexibly matching the surrounding code: ie. in intel_sanitize_crtc() we can break the crtc link separatly after the links to the encoders have been broken which avoids above problem. This regression has been introduced in: commit 24929352481f085c5f85d4d4cbc919ddf106d381 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Jul 2 20:28:59 2012 +0200 drm/i915: read out the modeset hw state at load and resume time so goes back to the very beginning of the modeset rework. v2: This patch takes care of the concernes voiced by Chris Wilson and Daniel Vetter that only breaking links if the drm_connector is linked to an encoder may miss some links. v3: move all encoder handling to encoder loop as suggested by Daniel Vetter. Signed-off-by: Egbert Eich <eich@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* | | drm/radeon: lower the ref * post PLL maximumChristian König2014-05-061-1/+1
| | | | | | | | | | | | | | | | | | Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75241 Signed-off-by: Christian König <christian.koenig@amd.com>
* | | drm/radeon: check that we have a clock before PLL setupChristian König2014-05-061-0/+3
| | | | | | | | | | | | | | | | | | Partially fixes: https://bugzilla.kernel.org/show_bug.cgi?id=75211 Signed-off-by: Christian König <christian.koenig@amd.com>
* | | drm/radeon: drm/radeon: add missing radeon_semaphore_free to error pathMaarten Lankhorst2014-05-067-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | It would appear this bug has been copy/pasted many times without being noticed. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/radeon: Fix num_banks calculation for SIMichel Dänzer2014-05-061-15/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way the tile mode array index was calculated only makes sense for the CIK specific macrotile mode array. For SI, we need to use one of the tile mode array indices reserved for displayable surfaces. This happened to result in correct display most if not all of the time because most of the SI tiling modes use the same number of banks. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
* | | drm/radeon/dp: check for errors in dpcd readsAlex Deucher2014-05-011-19/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check to make sure the transaction succeeded before using the register value. Fixes occasional link training problems. Noticed-by: Sergei Antonov <saproj@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
* | | drm/radeon: avoid high jitter with small frac divsChristian König2014-05-011-2/+12
| | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com>
* | | drm/radeon: check buffer relocation offsetLeo Liu2014-05-011-0/+4
| | | | | | | | | | | | | | | | | | Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
* | | drm/radeon: use pflip irq on R600+ v2Christian König2014-05-017-17/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing the update pending bit directly after issuing an update is nonsense cause depending on the pixel clock the CRTC needs a bit of time to execute the flip even when we are in the VBLANK period. This is just a non invasive patch to solve the problem at hand, a more complete and cleaner solution should follow in the next merge window. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564 v2: fix source IDs for CRTC2-6 Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
* | | drm/radeon/uvd: use lower clocks on old UVD to boot v2Christian König2014-05-011-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some RV7xx generation hardware crashes after you raise the UVD clocks for the first time. Try to avoid this by using the lower clocks to boot these. Workaround for: https://bugzilla.kernel.org/show_bug.cgi?id=71891 v2: lower clocks on IB test as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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