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* vmscan: change shrinker API by passing shrink_control structYing Han2011-05-252-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Change each shrinker's API by consolidating the existing parameters into shrink_control struct. This will simplify any further features added w/o touching each file of shrinker. [akpm@linux-foundation.org: fix build] [akpm@linux-foundation.org: fix warning] [kosaki.motohiro@jp.fujitsu.com: fix up new shrinker API] [akpm@linux-foundation.org: fix xfs warning] [akpm@linux-foundation.org: update gfs2] Signed-off-by: Ying Han <yinghan@google.com> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Minchan Kim <minchan.kim@gmail.com> Acked-by: Pavel Emelyanov <xemul@openvz.org> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Mel Gorman <mel@csn.ul.ie> Acked-by: Rik van Riel <riel@redhat.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Hugh Dickins <hughd@google.com> Cc: Dave Hansen <dave@linux.vnet.ibm.com> Cc: Steven Whitehouse <swhiteho@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'drm-core-next' of ↵Linus Torvalds2011-05-2488-3997/+9128
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (169 commits) drivers/gpu/drm/radeon/atom.c: fix warning drm/radeon/kms: bump kms version number drm/radeon/kms: properly set num banks for fusion asics drm/radeon/kms/atom: move dig phy init out of modesetting drm/radeon/kms/cayman: fix typo in register mask drm/radeon/kms: fix typo in spread spectrum code drm/radeon/kms: fix tile_config value reported to userspace on cayman. drm/radeon/kms: fix incorrect comparison in cayman setup code. drm/radeon/kms: add wait idle ioctl for eg->cayman drm/radeon/cayman: setup hdp to invalidate and flush when asked drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked agp/uninorth: Fix lockups with radeon KMS and >1x. drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices drm/radeon/kms: fixup eDP connector handling drm/radeon/kms: bail early for eDP in hotplug callback drm/radeon/kms: simplify hotplug handler logic drm/radeon/kms: rewrite DP handling drm/radeon/kms/atom: add support for setting DP panel mode drm/radeon/kms: atombios.h updates for DP panel mode ...
| * drivers/gpu/drm/radeon/atom.c: fix warningAndrew Morton2011-05-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | udelay() doesn't like 8-bit arguments: drivers/gpu/drm/radeon/atom.c: In function 'atom_op_delay': drivers/gpu/drm/radeon/atom.c:653: warning: comparison is always false due to limited range of data type while we're there, use msleep() rather than open-coding it. Cc: David Airlie <airlied@linux.ie> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Cc: Matt Turner <mattst88@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: bump kms version numberAlex Deucher2011-05-241-1/+2
| | | | | | | | | | | | | | - proper bank size for fusion for 2D tiling. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: properly set num banks for fusion asicsAlex Deucher2011-05-241-2/+6
| | | | | | | | | | | | | | Needed by userspace for 2D tiled buffer alignment Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms/atom: move dig phy init out of modesettingAlex Deucher2011-05-244-9/+68
| | | | | | | | | | | | | | | | It only needs to be called once at startup, not for every modeset. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms/cayman: fix typo in register maskAlex Deucher2011-05-241-1/+1
| | | | | | | | | | | | | | Noticed by Droste on IRC. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix typo in spread spectrum codeAlex Deucher2011-05-241-1/+1
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix tile_config value reported to userspace on cayman.Dave Airlie2011-05-221-1/+1
| | | | | | | | | | | | | | | | | | cayman is reporting the wrong tile config value to userspace, this causes piglit mipmap generation tests to fail. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix incorrect comparison in cayman setup code.Dave Airlie2011-05-221-1/+1
| | | | | | | | | | | | | | | | | | This was leading to a bogus value being programmed to the backend routing register. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add wait idle ioctl for eg->caymanDave Airlie2011-05-221-0/+4
| | | | | | | | | | | | | | | | | | | | None of the latest GPUs had this hooked up, this is necessary for correct operation in a lot of cases, however we should test this on a few GPUs in these families as we've had problems in this area before. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/cayman: setup hdp to invalidate and flush when askedDave Airlie2011-05-222-0/+6
| | | | | | | | | | | | | | | | | | On cayman we need to set the bit to cause HDP flushes to invalidate the HDP cache also. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when askedAlex Deucher2011-05-222-1/+7
| | | | | | | | | | | | | | | | | | | | This needs to be explicitly set on btc. It's set by default on evergreen/fusion, so it fine to just unconditionally enable it for all chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@gmail.com>
| * drm/radeon/kms: the SS_Id field in the LCD table if for LVDS onlyAlex Deucher2011-05-221-30/+12
| | | | | | | | | | | | | | For DP/eDP, always use the standard DP SS indices. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
| * drm/radeon/kms: properly set the CLK_REF bit for DCE3 devicesAlex Deucher2011-05-221-0/+2
| | | | | | | | | | | | | | | | | | If the ss clock is external, the CLK_REF bit needs to be set in the SetPixelClock parameters. This should fix DP failures in the channel equalization loop. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
| * drm/radeon/kms: fixup eDP connector handlingAlex Deucher2011-05-201-8/+72
| | | | | | | | | | | | | | It's more like LVDS then DP in some ways. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: bail early for eDP in hotplug callbackAlex Deucher2011-05-201-0/+6
| | | | | | | | | | | | | | | | Don't try and en/disable the port as it may be a hpd event from powering up/down the panel during a modeset or dpms. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: simplify hotplug handler logicAlex Deucher2011-05-203-26/+8
| | | | | | | | | | | | | | | | | | | | In the hotplug handler, just use the drm dpms functions. If the monitor is plugged in, turn it on, if it's not, turn it off. This also reduces power usage by turning off the encoder and crtc when the monitor is unplugged. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: rewrite DP handlingAlex Deucher2011-05-204-523/+583
| | | | | | | | | | | | | | | | | | | | - reorganize the functions based on use - clean up function naming - rework link training to better match what we use internally - add initial support for DP 1.2 (no MST yet) Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms/atom: add support for setting DP panel modeAlex Deucher2011-05-203-13/+16
| | | | | | | | | | | | | | Required for proper operation with DP bridges. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: atombios.h updates for DP panel modeAlex Deucher2011-05-201-2/+20
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: handle DP bridgesAlex Deucher2011-05-203-181/+263
| | | | | | | | | | | | | | | | | | Fusion hardware often has DP to VGA/LVDS/TMDS bridges to handle non-DP encoders. Internally we treat them mostly like DP. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: improve aux error handlingAlex Deucher2011-05-202-85/+151
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: improve DP detect logicAlex Deucher2011-05-201-5/+13
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add some dp encoder/connector helper funcsAlex Deucher2011-05-203-0/+99
| | | | | | | | | | | | | | Used for dp1.2 support and for dp bridges. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: make sure eDP panel is on for modesettingAlex Deucher2011-05-201-1/+7
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix eDP panel power functionAlex Deucher2011-05-202-6/+20
| | | | | | | | | | | | | | need to wait for the panel to power up. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: adjust eDP handling (v2)Alex Deucher2011-05-202-6/+27
| | | | | | | | | | | | | | | | | | | | eDP is usually used as an LVDS replacement, so treat it more like LVDS from the user perspective. v2: encoder mode is always DP for eDP. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix up DP clock programming on DCE4/5Alex Deucher2011-05-202-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock, depending on the asic. The crtc virtual pixel clock is derived from the DP ref clock. - DCE4: PPLL or ext clock - DCE5: DCPLL or ext clock Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip PPLL/DCPLL programming and only program the DP DTO for the crtc virtual pixel clock. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: spread spectrum fixesAlex Deucher2011-05-201-16/+36
| | | | | | | | | | | | | | | | | | | | | | - properly mask the ss type - don't enable ss if type is external or percentage is 0 - if ss enabled and type is external, set ref_div_src to ext clock - prefer ASIC_INTERNAL_SS_ON_DP to LCD_Info SS_Id for eDP - fix ss amount calculation Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: properly handle bpc >8 in atom command tablesAlex Deucher2011-05-202-7/+101
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: DCE4.1 DIG encoders are fully routeable just like DCE3.2Alex Deucher2011-05-201-8/+5
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * Merge remote branch 'keithp/drm-intel-next' of ../drm-next into drm-core-nextDave Airlie2011-05-207-40/+48
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'keithp/drm-intel-next' of ../drm-next: drm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy Bridge drm/i915/sdvo: Reorder i2c initialisation before ddc proxy drm/i915: FDI link training broken on Ironlake by Ivybridge integration drm/i915: enable rc6 by default drm/i915: add fbc enable flag, but disable by default drm/i915: clean up unused ring_get_irq/ring_put_irq functions drm/i915: fix user irq miss in BSD ring on g4x
| | * drm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy BridgeJesse Barnes2011-05-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's not used on Ironlake, but is used on later generations, so make sure it exists before we try to use it in the interrupt handlers. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/sdvo: Reorder i2c initialisation before ddc proxyChris Wilson2011-05-181-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ddc proxy depends upon the underlying i2c bus being selected. Under certain configurations, the i2c-adapter functionality is queried during initialisation and so may trigger an OOPS during boot. Hence, we need to reorder the initialisation of the ddc proxy until after we hook up the i2c adapter for the SDVO device. The condition under which it fails is when the i2c_add_adapter calls into i2c_detect which will attempt to probe all valid addresses on the adapter iff there is a pre-existing i2c_driver with the same class as the freshly added i2c_adapter. So it appears to depend upon having compiled in (or loaded such a module before i915.ko) an i2c-driver that likes to futz over the i2c_adapters claiming DDC support. Reported-by: Mihai Moldovan <ionic@ionic.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: FDI link training broken on Ironlake by Ivybridge integrationKeith Packard2011-05-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 357555c00f8414057f0c12ee3f479f197264123d split out IVB-specific register definitions for FDI link training, but a piece of that commit stopped executing some critical code on Ironlake systems while leaving it running on Sandybridge. Turn that code back on both Ironlake and Sandybridge Signed-off-by: Keith Packard <keithp@keithp.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * drm/i915: enable rc6 by defaultJesse Barnes2011-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | With FBC disabled by default, it should be safe to enable RC6. So let's give it a try. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add fbc enable flag, but disable by defaultJesse Barnes2011-05-174-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FBC has too many corner cases that we don't currently deal with, so disable it by default so we can enable more important features like RC6, which conflicts in some configurations. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31742 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: clean up unused ring_get_irq/ring_put_irq functionsFeng, Boqun2011-05-161-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch depends on patch "drm/i915: fix user irq miss in BSD ring on g4x". Once the previous patch apply, ring_get_irq/ring_put_irq become unused. So simply remove them. Signed-off-by: Feng, Boqun <boqun.feng@intel.com> Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix user irq miss in BSD ring on g4xFeng, Boqun2011-05-161-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On g4x, user interrupt in BSD ring is missed. This is because though g4x and ironlake share the same bsd_ring, their interrupt control interfaces have _two_ differences. 1.different irq enable/disable functions: On g4x are i915_enable_irq and i915_disable_irq. On ironlake are ironlake_enable_irq and ironlake_disable_irq. 2.different irq flag: On g4x user interrupt flag in BSD ring on is I915_BSD_USER_INTERRUPT. On ironlake is GT_BSD_USER_INTERRUPT Old bsd_ring_get/put_irq call ring_get_irq and ring_get_irq. ring_get_irq and ring_put_irq only call ironlake_enable/disable_irq. So comes the irq miss on g4x. To fix this, as other rings' code do, conditionally call different functions(i915_enable/disable_irq and ironlake_enable/disable_irq) and use different interrupt flags in bsd_ring_get/put_irq. Signed-off-by: Feng, Boqun <boqun.feng@intel.com> Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
| * | drm: fix nouveau_acpi buildRandy Dunlap2011-05-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build errors when CONFIG_ACPI is enabled but MXM_WMI is not enabled by selecting both MXM_WMI and ACPI_WMI (the latter just for kconfig dependencies): nouveau_acpi.c:(.text+0x2400c8): undefined reference to `mxm_wmi_call_mxmx' nouveau_acpi.c:(.text+0x2400cf): undefined reference to `mxm_wmi_call_mxds' nouveau_acpi.c:(.text+0x2400fe): undefined reference to `mxm_wmi_call_mxmx' nouveau_acpi.c:(.text+0x2402ba): undefined reference to `mxm_wmi_supported Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge remote branch 'nouveau/drm-nouveau-next' of /ssd/git/drm-nouveau-next ↵Dave Airlie2011-05-1644-1837/+5071
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-core-next * 'nouveau/drm-nouveau-next' of /ssd/git/drm-nouveau-next: (55 commits) drm/nouveau: make cursor_set implementation consistent with other drivers drm/nva3/clk: better pll calculation when no fractional fb div available drm/nouveau/pm: translate ramcfg strap through ram restrict table drm/nva3/pm: allow use of divisor 16 drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table drm/nvc0/pm: correct core/mem/shader perflvl parsing drm/nouveau/pm: remove memtiming support check when assigning to perflvl drm/nva3: support for memory timing map table drm/nouveau: Associate memtimings with performance levels on cards <= nv98 drm/nva3/pm: initial pass at set_clock() hook drm/nvc0/gr: calculate some more of our magic numbers drm/nv50: respect LVDS link count from EDID on SPWG panels drm/nouveau: recognise DCB connector type 0x41 as LVDS drm/nouveau: fix uninitialised variable warning drm/nouveau: Fix a crash at card takedown for NV40 and older cards drm/nouveau: Free nv04 instmem ramin heap at card takedown drm/nva3: somewhat improve clock reporting drm/nouveau: pull refclk from vbios on limits 0x40 boards drm/nv40/gr: oops, fix random bits getting set in engine obj drm/nv50: improve nv50_pm_get_clock() ...
| | * | drm/nouveau: make cursor_set implementation consistent with other driversMarcin Slusarz2011-05-162-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When xorg state tracker wants to hide the cursor it calls set_cursor with NULL buffer_handle and size=0x0, but nouveau refuses to hide it because size is not 64x64... which is a bit odd. Both radeon and intel check buffer_handle before validating size of cursor, so make nouveau implementation consistent with them. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nva3/clk: better pll calculation when no fractional fb div availableBen Skeggs2011-05-164-37/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core/mem/shader clocks don't support the fractional feedback divider, causing our calculated clocks to be off by quite a lot in some cases. To solve this we will switch to a search-based algorithm when fN is NULL. For my NVA8 at PL3, this actually generates identical cooefficients to the binary driver. Hopefully that's a good sign, and that does not break VPLL calculation for someone.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau/pm: translate ramcfg strap through ram restrict tableBen Skeggs2011-05-161-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hopefully this is how we're supposed to correctly handle when the RAMCFG strap is above the number of entries in timing-related tables. It's rather difficult to confirm without finding a configuration where the ram restrict table doesn't map 8-15 back onto 0-7 anyway. There's not a single vbios in the repo which is configured differently.. In any case, this is probably still better than potentially reading outside of the bounds of various tables.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nva3/pm: allow use of divisor 16Ben Skeggs2011-05-161-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf tableBen Skeggs2011-05-162-0/+3
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0/pm: correct core/mem/shader perflvl parsingBen Skeggs2011-05-161-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to parse some of these other entries still, but I've yet to determine exactly which PLLs the rest map to. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau/pm: remove memtiming support check when assigning to perflvlBen Skeggs2011-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Really not necessary here, we want to be able to see if/how we managed to match a timingset to a performance level, even if we can't currently program it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nva3: support for memory timing map tableBen Skeggs2011-05-161-14/+67
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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