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| * | drm/amdgpu: update pt shadow while updating pt V2Chunming Zhou2016-08-221-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: move shadow parameter to amdgpu_pte_update_params. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: minutemaidpark@hotmail.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: update pd shadow while updating pd V2Chunming Zhou2016-08-222-19/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | V2: Checking if shadow is valid. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: sync bo and shadow V3Chunming Zhou2016-08-223-8/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use shadow flag to judge which direction to sync. V2: Don't need bo pin, so remove it. V3: 1. Split to two functions, one is backup_to_shadow, another is restore_from_shadow. 2. Clean up previous shadow direction difinitions. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add direct submision option for copy_bufferChunming Zhou2016-08-224-11/+21
| | | | | | | | | | | | | | | | | | Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add need backup function V2Chunming Zhou2016-08-193-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | V2: add checking if need backup in amdgpu_bo_create. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: S3 resumed failed after 4-5 times loopjimqu2016-08-191-52/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff and read pcie pid is 0xffff. The issue is caused by VCE reset when update cg setting. according to HW programming guide, adjust update VCE cg sequence. The patch apply to VCE2.0. Signed-off-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: use domain's gpu_offset for start addrFlora Cui2016-08-192-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: update gart_pin_size only if the bo is pined to GTTFlora Cui2016-08-191-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()Flora Cui2016-08-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | abort if the bo is pined to other domain already Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | amdgpu: move ttm stuff to amdgpu_ttm.hFlora Cui2016-08-193-51/+80
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/powerplay: enable power containment features for tonga.Rex Zhu2016-08-195-9/+548
| | | | | | | | | | | | | | | | | | | | | | | | v2: fix build error introduced when fix code style problems. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Add more debugfs config dataTom St Denis2016-08-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Adds family and external_rev_id to config data Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Hardcode virtual DCE vblank / scanout position return valuesEmily Deng2016-08-171-12/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual display feature, by hardcoding 0 for the vblank counter and -EINVAL for the scanout position return value, we signal to the core DRM code that there are no hardware counters we can use for these. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Add more config data for debugfsTom St Denis2016-08-161-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Adds rev_id as well as cg/pg flags to help debug runtime. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: fix coding style in amdgpu_object.cChristian König2016-08-161-37/+49
| | | | | | | | | | | | | | | | | | | | | | | | Just a few 80 chars problems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add function pointer to the pte_update_paramsChristian König2016-08-161-22/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remember what function to call while planning the commands instead of figuring it our later on. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: stop splitting PTE commands into smaller onesChristian König2016-08-165-149/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It doesn't make much sense to create bigger commands first which we then need to split into smaller one again. Just make sure the commands we create aren't to big in the first place. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: remove AMDGPU_VM_NO_FLUSH defineChristian König2016-08-161-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: cleanup the write_pte implementationsChristian König2016-08-165-98/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need the gart mapping handling here any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: remove pages_addr handling from the VM codeChristian König2016-08-161-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: write PTEs directly into the IB.Christian König2016-08-161-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Write the PTEs at the end of the IB instead of directly into the SDMA commands. This can save quite some CPU cycles building the entries. This doesn't change the DW estimation because PTEs where embedded into the IB before as well. It just moves them to the end of the IB. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add shadow flag V2Chunming Zhou2016-08-161-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Indicate if need to sync between bo and shadow, where sync to where. V2: Rename to backup_shadow Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: allocate shadow for pd/pt bo V2Chunming Zhou2016-08-161-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pd/pt shadow bo will be used to backup page table, when gpu reset happens, we can restore the page table by them. V2: Free shadow bo. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: validate shadow as well when validating boChunming Zhou2016-08-161-30/+46
| | | | | | | | | | | | | | | | | | Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add shadow bo support V2Chunming Zhou2016-08-162-3/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | shadow bo is the shadow of a bo, which is always in GTT, which can be used to backup the original bo. V2: reference shadow parent, shadow bo will be freed by who allocted him. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: UVD v6 register cleanupTom St Denis2016-08-161-16/+11
| | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: VCE v2 register cleanupTom St Denis2016-08-161-25/+14
| | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: add mutex in check_soft for VCE v3Tom St Denis2016-08-161-0/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Cleanup register access in VCE v3Tom St Denis2016-08-161-102/+43
| | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | Fixing copy-paste errors and removing unneeded newlinesAlexandre Demers2016-08-101-5/+3
| | | | | | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm: Add DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags v2Michel Dänzer2016-08-102-7/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These flags allow userspace to explicitly specify the target vertical blank period when a flip should take effect. v2: * Add new struct drm_mode_crtc_page_flip_target instead of modifying struct drm_mode_crtc_page_flip, to make sure all existing userspace code keeps compiling (Daniel Vetter) Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: Set MASTER_UPDATE_MODE to 0 againMichel Dänzer2016-08-103-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the previous change, it's safe to let page flips take effect anytime during a vertical blank period. This can avoid delaying a flip by a frame in some cases where we get to radeon_flip_work_func -> adev->mode_info.funcs->page_flip during a vertical blank period. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: Provide page_flip_target hookMichel Dänzer2016-08-102-65/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we can program a flip during a vertical blank period, if it's the one targeted by the flip (or a later one). This allows simplifying radeon_flip_work_func considerably. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Set MASTER_UPDATE_MODE to 0 againMichel Dänzer2016-08-103-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the previous change, it's safe to let page flips take effect anytime during a vertical blank period. This can avoid delaying a flip by a frame in some cases where we get to amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during a vertical blank period. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Provide page_flip_target hookMichel Dänzer2016-08-107-76/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we can program a flip during a vertical blank period, if it's the one targeted by the flip (or a later one). This allows simplifying amdgpu_flip_work_func considerably. agd: update dce_virtual.c as well. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm: Add page_flip_target CRTC hook v2Michel Dänzer2016-08-101-4/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly the same as the existing page_flip hook, but takes an additional parameter specifying the target vertical blank period when the flip should take effect. v2: * Add curly braces around else statement corresponding to an if block with curly braces (Alex Deucher) * Call drm_crtc_vblank_put in the error case (Daniel Vetter) * Clarify entry point documentation comment (Daniel Vetter) Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | gpu: drm: radeon: radeon_i2c: don't print error when adding adapter failsWolfram Sang2016-08-101-6/+2
| | | | | | | | | | | | | | | | | | | | | The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | gpu: drm: amd: amdgpu: amdgpu_i2c: don't print error when adding adapter failsWolfram Sang2016-08-101-3/+1
| | | | | | | | | | | | | | | | | | | | | The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: use more than 64KB fragment size if possibleChristian König2016-08-101-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | We align to 64KB, but when userspace aligns even more we can easily use more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: flip frag_ptes and update_ptsChristian König2016-08-101-87/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | We can add the fragment params before we split the update for the page tables. That should save a few CPU cycles for larger updates. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add adev to the pte_update_paramsChristian König2016-08-101-36/+29
| | | | | | | | | | | | | | | | | | | | | | | | No need to carry that forward as a separate parameter. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: rename amdgpu_vm_update_paramsChristian König2016-08-101-47/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | Well those are actually page table entry parameters. This also makes the variable names used a bit shorter. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: cleanup VM fragment definesChristian König2016-08-102-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | We can actually do way more than just the 64KB we currently used as default. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: remove unused VM definesChristian König2016-08-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Not used for a long time. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Simplify bitfield operations in gfx v8Tom St Denis2016-08-102-230/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new macro WREG32_FIELD which is used to write to a register with a new value in a field. It's designed to replace the pattern: tmp = RREG32(mmFoo); tmp &= ~REG__FIELD_MASK; tmp |= new_value << REG__FIELD__SHIFT; WREG32(mmFoo, tmp) with: WREG32_FIELD(Foo, FIELD, new_value); Unlike WREG32_P() it understands offsets/masks and doesn't require the caller to shift the value (or mask properly). It's applied where suitable in the gfx_v8_0.c driver to start with. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Simplify various gfx v8 functionsTom St Denis2016-08-101-41/+20
| | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/amdgpu: Correct whitespace in GFX v8Tom St Denis2016-08-101-25/+16
| | | | | | | | | | | | | | | | | | | | | | | | Fix various whitespace issues in gfx v8 driver. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Change the virtual_display type from int to char*.Emily Deng2016-08-105-7/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual display feature, as there may be multiple GPUs, for user could choose whiche GPU need to enable this feature, change the type of virtual_display from int to char*. The variable will be set like this virtual_display="xxxx:xx:xx.x;xxxx:xx:xx.x;". Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add virtual dce support for icelandAlex Deucher2016-08-081-2/+56
| | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/virtual_dce: add case for topaz for disable_dceAlex Deucher2016-08-081-1/+4
| | | | | | | | | | | | | | | | | | | | | This asic has no DCE block. Also clarify the error message for unmatched chips. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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