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* gpu: ipu-v3: do not divide by zero if the pixel clock is too largePhilipp Zabel2015-02-231-0/+2
| | | | | | | Even if an unsupported mode with a pixel clock larger than two times the 264 MHz IPU HSP clock is set, don't divide by zero. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'imx-drm-fixes-2015-01-28' of ↵Dave Airlie2015-02-112-4/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/pza/linux into drm-next imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE - Corrected handling of wait_for_completion_timeout return value when disabling IPUv3 DC channels - Fixed error return value propagation in TVE mode_set - Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53 * tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Fix IC control register offset drm: imx: imx-tve: Check and propagate the errors gpu: ipu-v3: wait_for_completion_timeout does not return negative status
| * gpu: ipu-v3: Fix IC control register offsetPhilipp Zabel2015-01-271-2/+2
| | | | | | | | | | | | | | | | The IC register offset is at +0x20000 relative to the control module registers on all IPUv3 versions. This patch fixes wrong values for i.MX51 and i.MX53. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: wait_for_completion_timeout does not return negative statusNicholas Mc Guire2015-01-271-2/+3
| | | | | | | | | | | | | | This fixes up the return value handling and the return type. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calcSteve Longerbeam2015-01-071-6/+3
| | | | | | | | | | | | | | | | | | We can use the DIV_ROUND_CLOSEST() macro when calculating the DI clock divider, rounded to nearest int. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfgSteve Longerbeam2015-01-071-41/+48
| | | | | | | | | | | | | | | | This patch changes struct ipu_di_signal_cfg to use struct videomode to define video timings and flags. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-di: remove some non-functional codeSteve Longerbeam2015-01-071-6/+0
| | | | | | | | | | | | | | | | h_total and v_total were calculated in ipu_di_init_sync_panel() but never actually used. Remove. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-di: Add ipu_di_adjust_videomode()Jiada Wang2015-01-071-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some monitors, high resolution modes are not working, exhibiting pixel column truncation problems (for example, 1280x1024 displays as 1280x1022). The function ipu_di_adjust_videomode() aims to fix these issues by adjusting a passed videomode to IPU restrictions. The function can be called from the drm_crtc_helper_funcs->mode_fixup() methods. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Deepak Das <deepak_das@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Implement use counter for ipu_dc_enable(), ipu_dc_disable()Steve Longerbeam2015-01-061-2/+23
|/ | | | | | | | | | The functions ipu_dc_enable() and ipu_dc_disable() enable/disable the DC globally in the IPU_CONF register, but the DC is used by multiple clients on different DC channels. So make sure to only disable/enable the DC globally based on a use counter. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* [media] gpu: ipu-v3: Make use of media_bus_format enumBoris BREZILLON2014-11-141-33/+33
| | | | | | | | | | | | | | | In order to have subsytem agnostic media bus format definitions we've moved media bus definition to include/uapi/linux/media-bus-format.h and prefixed enum values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT. Reference new definitions in the ipu-v3 driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
* Merge tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux into ↵Dave Airlie2014-10-073-3/+5
|\ | | | | | | | | | | | | | | | | | | | | | | drm-next IPUv3 fixes for v3.18 * tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE Kconfig gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined gpu: ipu-v3: Return proper error on ipu_add_client_devices error path gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
| * gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE KconfigFabio Estevam2014-09-241-1/+1
| | | | | | | | | | | | | | SOC_IMX6SL does not have the IPU block, so remove it from the Kconfig entry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: ipu-smfc: Do not leave DEBUG definedFabio Estevam2014-09-021-1/+0
| | | | | | | | | | | | | | | | Let's only define DEBUG for debugging purpose and not by default to avoid printing debugging message unnecessarily. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: Return proper error on ipu_add_client_devices error pathAxel Lin2014-09-021-1/+3
| | | | | | | | | | | | | | Avoid returning an uninitialized variable in the error path. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build errorAxel Lin2014-09-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver uses GENERIC_IRQ_CHIP, so it needs to select GENERIC_IRQ_CHIP to avoid build error. Fixes below build errors: ERROR: "irq_alloc_domain_generic_chips" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_gc_mask_clr_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_gc_mask_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_generic_chip_ops" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_gc_ack_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_get_domain_generic_chip" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_dump()Steve Longerbeam2014-09-021-0/+38
| | | | | | | | | | | | | | Adds ipu_dump() which dumps IPU register state to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-cpmem: Add ipu_cpmem_dump()Steve Longerbeam2014-09-021-0/+63
| | | | | | | | | | | | | | Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add more planar formats supportSteve Longerbeam2014-09-022-18/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for the following planar and partial-planar formats: YUV422 NV12 NV16 Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> Signed-off-by: Mohsin Kazmi <mohsin_kazmi@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Unified base offset and Y plane offset into a single variable, moved all ipu_cpmem_set_buffer calls to a single location. Removed NV21 and NV61 for now. The IDMAC doesn't understand U/V order for chroma interleaved formats, so we'd need to work around this by implenting U/V switching via the CSC unit. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()Steve Longerbeam2014-09-021-16/+16
| | | | | | | | | | | | | | | | Add a second buffer physaddr to struct ipu_image, for double-buffering support. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()Steve Longerbeam2014-09-021-0/+10
| | | | | | | | | | | | | | Adds ipu_cpmem_set_rotation(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()Steve Longerbeam2014-09-021-0/+7
| | | | | | | | | | | | | | | | Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel will use to transfer data onto AXI bus. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()Steve Longerbeam2014-09-021-0/+6
| | | | | | | | | | | | | | Adds ipu_cpmem_set_block_mode(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_idmac_lock_enable()Steve Longerbeam2014-09-021-0/+69
| | | | | | | | | | | | | | | | Adds ipu_idmac_lock_enable(), which enables or disables channel burst locking. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_idmac_enable_watermark()Steve Longerbeam2014-09-021-0/+25
| | | | | | | | | | | | | | | | | | Adds the function ipu_idmac_enable_watermark(), which enables or disables watermarking in the IDMAC channel. Enabling watermarking can increase a channel's AXI bus arbitration priority. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_stride_to_bytes()Steve Longerbeam2014-09-021-0/+30
| | | | | | | | | | | | | | | | Adds ipu_stride_to_bytes(), which converts a pixel stride to bytes, suitable for passing to cpmem. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer()Steve Longerbeam2014-09-021-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds __ipu_idmac_reset_current_buffer() that resets a channel's internal current buffer pointer so that transfers start from buffer 0 on the next channel enable. This operation is required for channel linking to work correctly, for instance video capture pipelines that carry out image rotations will fail after the first streaming unless this function is called for each channel before re-enabling the channels. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_idmac_clear_buffer()Steve Longerbeam2014-09-021-0/+28
| | | | | | | | | | | | | | | | Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer ready status in a channel. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()Steve Longerbeam2014-09-022-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in the given channel is set ready (owned by IPU), or false if not ready (owned by CPU core). Support has been added for third buffer, there is no support yet for triple-buffering in idmac channels, but this function checks buffer-ready for third buffer in case this support is added later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.hSteve Longerbeam2014-09-021-25/+0
| | | | | | | | | | | | | | | | | | Move the IDMAC channel names to imx-ipu-v3.h, to make the names available outside IPU. Add a couple new channels in the process (async display BG/FG, channels 24 and 29). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add helper function checking if pixfmt is planarSteve Longerbeam2014-09-021-0/+12
| | | | | | | | | | | | | | | | Add simple helper function returning true if passed pixel format is one of supported planar ones. Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add rotation mode conversion utilitiesSteve Longerbeam2014-09-021-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | Add two functions: - ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting to an IPU rotation mode. - ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip and vflip settings to degrees. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()Steve Longerbeam2014-09-021-0/+13
| | | | | | | | | | | | | | | | Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a media bus pixel format code. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()Steve Longerbeam2014-09-021-0/+20
| | | | | | | | | | | | | | | | Adds ipu_smfc_set_watermark() which programs a channel's SMFC FIFO levels at which the watermark signal is set and cleared. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: smfc: Convert to per-channelSteve Longerbeam2014-09-021-26/+106
| | | | | | | | | | | | | | | | | | Convert the smfc object to be specific to a single smfc channel. Add ipu_smfc_{get|put} to retrieve and release a single smfc channel for exclusive use, and add use counter to ipu_smfc_{enable|disable}. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.cSteve Longerbeam2014-09-022-12/+12
| | | | | | | | | | | | | | Move the SMFC module enable/disable helpers into the ipu-smfc submodule. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add Image Converter unitSteve Longerbeam2014-09-024-2/+803
| | | | | | | | | | | | | | | | | | | | | | Adds the Image Converter (IC) unit. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Condensed the three CSC setup functions into a single one that uses static tables to set up the CSC task parameters. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add Camera Sensor Interface unitSteve Longerbeam2014-09-024-13/+780
| | | | | | | | | | | | | | | | | | | | | | | | Adds the Camera Sensor Interface (CSI) unit required for video capture. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Removed the unused clk_get_rate in ipu_csi_init_interface and the ipu_csi_ccir_err_detection_enable/disable functions. Checkpatch cleanup. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Rename and add IDMAC channelsSteve Longerbeam2014-08-181-6/+14
| | | | | | | | | | | | | | | | | | | | Rename the ENC/VF/PP rotation channel names, to be more consistent with the convention that *_MEM is write-to-memory channels and MEM_* is read-from-memory channels. Also add the channels who's source and destination is the IC. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add functions to set CSI/IC source muxesSteve Longerbeam2014-08-181-0/+51
| | | | | | | | | | | | | | | | | | Adds two new functions, ipu_set_csi_src_mux() and ipu_set_ic_src_mux(), that select the inputs to the CSI and IC respectively. Both muxes are programmed in the IPU_CONF register. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: ipu-v3: Add ipu-cpmem unitSteve Longerbeam2014-08-184-449/+622
|/ | | | | | | | | | | Move channel parameter memory setup functions and macros into a new submodule ipu-cpmem. In the process, cleanup arguments to the functions to take a channel pointer instead of a pointer into cpmem for that channel. That allows the structure of the parameter memory to be private to ipu-cpmem.c. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-06-126-58/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "This is the main drm merge window pull request, changes all over the place, mostly normal levels of churn. Highlights: Core drm: More cleanups, fix race on connector/encoder naming, docs updates, object locking rework in prep for atomic modeset i915: mipi DSI support, valleyview power fixes, cursor size fixes, execlist refactoring, vblank improvements, userptr support, OOM handling improvements radeon: GPUVM tuning and large page size support, gart fixes, deep color HDMI support, HDMI audio cleanups nouveau: - displayport rework should fix lots of issues - initial gk20a support - gk110b support - gk208 fixes exynos: probe order fixes, HDMI changes, IPP consolidation msm: debugfs updates, misc fixes ast: ast2400 support, sync with UMS driver tegra: cleanups, hdmi + hw cursor for Tegra 124. panel: fixes existing panels add some new ones. ipuv3: moved from staging to drivers/gpu" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (761 commits) drm/nouveau/disp/dp: fix tmds passthrough on dp connector drm/nouveau/dp: probe dpcd to determine connectedness drm/nv50-: trigger update after all connectors disabled drm/nv50-: prepare for attaching a SOR to multiple heads drm/gf119-/disp: fix debug output on update failure drm/nouveau/disp/dp: make use of postcursor when its available drm/g94-/disp/dp: take max pullup value across all lanes drm/nouveau/bios/dp: parse lane postcursor data drm/nouveau/dp: fix support for dpms drm/nouveau: register a drm_dp_aux channel for each dp connector drm/g94-/disp: add method to power-off dp lanes drm/nouveau/disp/dp: maintain link in response to hpd signal drm/g94-/disp: bash and wait for something after changing lane power regs drm/nouveau/disp/dp: split link config/power into two steps drm/nv50/disp: train PIOR-attached DP from second supervisor drm/nouveau/disp/dp: make use of existing output data for link training drm/gf119/disp: start removing direct vbios parsing from supervisor drm/nv50/disp: start removing direct vbios parsing from supervisor drm/nouveau/disp/dp: maintain receiver caps in response to hpd signal drm/nouveau/disp/dp: create subclass for dp outputs ...
* gpu: ipu-v3: Register the CSI modulesPhilipp Zabel2014-06-041-5/+32
| | | | | | | This patch registers the two CSI platform devices per IPU. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add CSI and SMFC module enable wrappersPhilipp Zabel2014-06-041-0/+24
| | | | | | | | IPU_CONF_..._EN bits are implementation details, not to be made public. Add wrappers around ipu_module_enable/disable, so the CSI V4L2 driver can enable/disable the CSI and SMFC modules. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add ipu_idmac_get_current_buffer functionPhilipp Zabel2014-06-041-0/+9
| | | | | | | | This function returns the currently active buffer (0 or 1) of a double buffered IDMAC channel. It is to be used by the CSI driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add SMFC codePhilipp Zabel2014-06-044-1/+114
| | | | | | | The Sensor Multi Fifo Controller (SMFC) is used as a buffer between the two CSIs (writing simultaneously) and up to four IDMAC channels. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Move i.MX IPUv3 core driver out of stagingPhilipp Zabel2014-06-048-0/+3371
The i.MX Image Processing Unit (IPU) contains a number of image processing blocks that sit right in the middle between DRM and V4L2. Some of the modules, such as Display Controller, Processor, and Interface (DC, DP, DI) or CMOS Sensor Interface (CSI) and their FIFOs could be assigned to either framework, but others, such as the dma controller (IDMAC) and image converter (IC) can be used by both. The IPUv3 core driver provides an internal API to access the modules, to be used by both DRM and V4L2 IPUv3 drivers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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