summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2013-09-02142-6657/+20937
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Alex writes: This is the radeon drm-next request. Big changes include: - support for dpm on CIK parts - support for ASPM on CIK parts - support for berlin GPUs - major ring handling cleanup - remove the old 3D blit code for bo moves in favor of CP DMA or sDMA - lots of bug fixes [airlied: fix up a bunch of conflicts from drm_order removal] * 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux: (898 commits) drm/radeon/dpm: make sure dc performance level limits are valid (CI) drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2) drm/radeon: gcc fixes for extended dpm tables drm/radeon: gcc fixes for kb/kv dpm drm/radeon: gcc fixes for ci dpm drm/radeon: gcc fixes for si dpm drm/radeon: gcc fixes for ni dpm drm/radeon: gcc fixes for trinity dpm drm/radeon: gcc fixes for sumo dpm drm/radeonn: gcc fixes for rv7xx/eg/btc dpm drm/radeon: gcc fixes for rv6xx dpm drm/radeon: gcc fixes for radeon_atombios.c drm/radeon: enable UVD interrupts on CIK drm/radeon: fix init ordering for r600+ drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_init drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume radeon kms: fix uninitialised hotplug work usage in r100_irq_process() drm/radeon/audio: set up the sads on DCE3.2 asics drm/radeon: fix handling of variable sized arrays for router objects ... Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/i915_gem_dmabuf.c drivers/gpu/drm/i915/intel_pm.c drivers/gpu/drm/radeon/cik.c drivers/gpu/drm/radeon/ni.c drivers/gpu/drm/radeon/r600.c
| * drm/radeon/dpm: make sure dc performance level limits are valid (CI)Alex Deucher2013-08-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Check to make sure the dc limits are valid before using them. Some systems may not have a dc limits table. In that case just use the ac limits. This fixes hangs on systems when the power state is changed when on battery (dc) due to invalid performance state parameters. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=68708 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2)Alex Deucher2013-08-303-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check to make sure the dc limits are valid before using them. Some systems may not have a dc limits table. In that case just use the ac limits. This fixes hangs on systems when the power state is changed when on battery (dc) due to invalid performance state parameters. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=68708 v2: fix up limits in dpm_init() Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: gcc fixes for extended dpm tablesAlex Deucher2013-08-301-24/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for kb/kv dpmAlex Deucher2013-08-301-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for ci dpmAlex Deucher2013-08-301-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for si dpmAlex Deucher2013-08-301-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for ni dpmAlex Deucher2013-08-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for trinity dpmAlex Deucher2013-08-301-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for sumo dpmAlex Deucher2013-08-301-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeonn: gcc fixes for rv7xx/eg/btc dpmAlex Deucher2013-08-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for rv6xx dpmAlex Deucher2013-08-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: gcc fixes for radeon_atombios.cAlex Deucher2013-08-301-14/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: enable UVD interrupts on CIKChristian König2013-08-301-0/+4
| | | | | | | | | | | | | | | | | | The same as on evergreen. Signed-off-by: Christian König <christian.koenig@amd.com> Reported-by: FrankR Huang <FrankR.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix init ordering for r600+Alex Deucher2013-08-306-24/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vram scratch buffer needs to be initialized before the mc is programmed otherwise we program 0 as the GPU address of the default GPU fault page. In most cases we put vram at zero anyway and reserve a page for the legacy vga buffer so in practice this shouldn't cause any problems, but better to make it correct. Was changed in: 6fab3febf6d949b0a12b1e4e73db38e4a177a79e Reported-by: FrankR Huang <FrankR.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabledAlex Deucher2013-08-301-6/+9
| | | | | | | | | | | | | | Avoid needless uvd reprogramming if uvd powergating is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_initAlex Deucher2013-08-301-1/+3
| | | | | | | | | | | | | | No need to try the ring tests if starting the UVD block failed. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resumeAlex Deucher2013-08-302-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | For powergating, we just need to re-init the registers, there is no need to restore the uvd BOs. This just adds needless work when powergating uvd for playback while the system is on. We only need to restore the uvd BOs on an actual resume from suspend or when the driver loads. This fixes multi-stream UVD playback on KB systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * radeon kms: fix uninitialised hotplug work usage in r100_irq_process()Sergey Senozhatsky2013-08-301-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a01c34f72e7cd2624570818f579b5ab464f93de2 (radeon kms: do not flush uninitialized hotplug work) moved work initialisation phase to the last step of radeon_irq_kms_init(). Meelis Roos reported that this causes problems on his machine because drm_irq_install() uses hotplug work on r100. hotplug work flushed in radeon_irq_kms_fini(), with two possible cases: -- radeon_irq_kms_fini() call after successful radeon_irq_kms_init() -- radeon_irq_kms_fini() call after unsuccessful (or not called at all) radeon_irq_kms_init() The latter one causes flush work on uninitialised hotplug work. Move work initialisation before drm_irq_install(), but keep existing agreement to flush hotplug work in radeon_irq_kms_fini() only for `irq.installed' (successful radeon_irq_kms_init()) case. WARNING: CPU: 0 PID: 243 at kernel/workqueue.c:1378 __queue_work+0x132/0x16d() Call Trace: [<c12319b3>] ? dump_stack+0xa/0x13 [<c1022600>] ? warn_slowpath_common+0x75/0x8a [<c1031010>] ? __queue_work+0x132/0x16d [<c1031010>] ? __queue_work+0x132/0x16d [<c102269e>] ? warn_slowpath_null+0x1b/0x1f [<c1031010>] ? __queue_work+0x132/0x16d [<c103107b>] ? queue_work_on+0x30/0x40 [<f8aed3f3>] ? r100_irq_process+0x16d/0x1e6 [radeon] [<f8ae77cf>] ? radeon_driver_irq_preinstall_kms+0xc2/0xc5 [radeon] [<f8974d77>] ? drm_irq_install+0xb2/0x1ac [drm] [<f897604d>] ? drm_vblank_init+0x196/0x1d2 [drm] [<f8ae78d3>] ? radeon_irq_kms_init+0x33/0xc6 [radeon] [<f8aef35a>] ? r100_startup+0x1a3/0x1d6 [radeon] [<f8ad77c8>] ? radeon_ttm_init+0x26e/0x287 [radeon] [<f8aef752>] ? r100_init+0x2b3/0x309 [radeon] [<c118082e>] ? vga_client_register+0x39/0x40 [<f8ac535f>] ? radeon_device_init+0x54b/0x61b [radeon] [<f8ac40fd>] ? cail_mc_write+0x13/0x13 [radeon] [<f8ac6864>] ? radeon_driver_load_kms+0x82/0xda [radeon] [<f8978bbd>] ? drm_get_pci_dev+0x136/0x22d [drm] [<f8ac409b>] ? radeon_pci_probe+0x6c/0x86 [radeon] [<c112acf6>] ? pci_device_probe+0x4c/0x83 [<c11846c7>] ? driver_probe_device+0x80/0x184 [<c112a848>] ? pci_match_id+0x18/0x36 [<c1184837>] ? __driver_attach+0x44/0x5f [<c11833f4>] ? bus_for_each_dev+0x50/0x5a [<c118433e>] ? driver_attach+0x14/0x16 [<c11847f3>] ? __device_attach+0x28/0x28 [<c1184045>] ? bus_add_driver+0xd6/0x1bf [<c1184c22>] ? driver_register+0x78/0xcf [<f8ba8000>] ? 0xf8ba7fff [<c10003bf>] ? do_one_initcall+0x8b/0x121 [<c101e668>] ? change_page_attr_clear+0x2e/0x33 [<f8ba8000>] ? 0xf8ba7fff [<c101e689>] ? set_memory_ro+0x1c/0x20 [<c104de94>] ? set_page_attributes+0x11/0x12 [<c104f6e1>] ? load_module+0x12fa/0x17e8 [<c107483b>] ? map_vm_area+0x22/0x31 [<c104fc36>] ? SyS_init_module+0x67/0x7d [<c1234245>] ? sysenter_do_call+0x12/0x26 Reported-by: Meelis Roos <mroos@linux.ee> Tested-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon/audio: set up the sads on DCE3.2 asicsAlex Deucher2013-08-302-1/+94
| | | | | | | | | | | | | | This sets up the short audio descriptors properly on DCE3.2 asics for hdmi audio. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fix handling of variable sized arrays for router objectsAlex Deucher2013-08-301-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The table has the following format: typedef struct _ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT //usSrcDstTableOffset pointing to this structure { UCHAR ucNumberOfSrc; USHORT usSrcObjectID[1]; UCHAR ucNumberOfDst; USHORT usDstObjectID[1]; }ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT; usSrcObjectID[] and usDstObjectID[] are variably sized, so we can't access them directly. Use pointers and update the offset appropriately when accessing the Dst members. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fix resume on some rs4xx boards (v2)Alex Deucher2013-08-301-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting MC_MISC_CNTL.GART_INDEX_REG_EN causes hangs on some boards on resume. The systems seem to work fine without touching this bit so leave it as is. v2: read-modify-write the GART_INDEX_REG_EN bit. I suspect the problem is that we are losing the other settings in the register. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=52952 Reported-by: Ondrej Zary <linux@rainbow-software.org> Tested-by: Daniel Tobias <dan.g.tob@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: fill in gpu_init for berlin GPU coresAlex Deucher2013-08-301-1/+40
| | | | | | | | | | | | | | | | This fills in the GPU specific details for berlin GPU cores so that the driver will work with them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon/dpm: ungate blocks in dpm disable for kb/kvAlex Deucher2013-08-301-0/+6
| | | | | | | | | | | | | | | | These blocks need to be ungated for the other parts of the driver properly initialize them (e.g., after a gpu reset, etc.). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: track uvd gated state for ciAlex Deucher2013-08-302-0/+14
| | | | | | | | | | | | | | Track the current uvd gated state on CI to avoid unnecessary state changes when uvd is active. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: enable uvd dpm on CIAlex Deucher2013-08-301-0/+2
| | | | | | | | | | | | | | UVD dpm dynamically adjusts the uvd clocks on demand. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: disable the GRPH block when we disable the crtcAlex Deucher2013-08-301-0/+6
| | | | | | | | | | | | | | | | | | Since we aren't using it when the crtc is disabled, turn it off to save power. The GRPH block is the part of the display controller that controls the primary graphics plane (size, address, etc.). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: atombios hw i2c fixesAlex Deucher2013-08-301-4/+8
| | | | | | | | | | | | | | | | These fixes make writes work properly. Previously only reads worked. Note that this feature is off by default. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fix LCD record parsingAlex Deucher2013-08-301-1/+3
| | | | | | | | | | | | | | | | | | | | If the LCD table contains an EDID record, properly account for the edid size when walking through the records. This should fix error messages about unknown LCD records. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: check firmware overrides for mclk/sclk ssAlex Deucher2013-08-301-0/+9
| | | | | | | | | | | | | | | | | | | | Check the overrides in the firmware info table before enabling spread spectrum on the engine or memory clocks. Some boards may have valid spread spectrum tables, but shouldn't necessarily have it enabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: update line buffer allocation for dce8Alex Deucher2013-08-302-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | We need to allocate line buffer to each display when setting up the watermarks. Failure to do so can lead to a blank screen. This fixes blank screen problems on dce8 asics. Based on an initial fix from: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: update line buffer allocation for dce6Alex Deucher2013-08-302-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to allocate line buffer to each display when setting up the watermarks. Failure to do so can lead to a blank screen. This fixes blank screen problems on dce6 asics. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=64850 Based on an initial fix from: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon: update line buffer allocation for dce4.1/5Alex Deucher2013-08-302-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | We need to allocate line buffer to each display when setting up the watermarks. Failure to do so can lead to a blank screen. This fixes blank screen problems on dce4.1/5 asics. Based on an initial fix from: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/radeon/si: Add support for CP DMA to CS checker for compute v2Tom Stellard2013-08-302-45/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also add a new RADEON_INFO query to check that CP DMA packets are supported on the compute ring. CP DMA has been supported since the 3.8 kernel, but due to an oversight we forgot to teach the CS checker that the CP DMA packet was legal for the compute ring on Southern Islands GPUs. This patch fixes a bug where the radeon driver will incorrectly reject a legal CP DMA packet from user space. I would like to have the patch backported to stable so that we don't have to require Mesa users to use a bleeding edge kernel in order to take advantage of this feature which is already present in the stable kernels (3.8 and newer). v2: - Don't bump kms version, so this patch can be backported to stable kernels. Cc: stable@vger.kernel.org Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: enable mgcg on CIKAlex Deucher2013-08-301-3/+3
| | | | | | | | | | | | | | | | Now that the CP is no longer reset and cg is properly disabled in when appropriate in the dpm code we can now enable mgcg (medium grained clockgating). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: handle cg in KB/KV dpm codeAlex Deucher2013-08-301-0/+26
| | | | | | | | | | | | | | | | Clockgating needs to be disabled around certain parts of dpm setup otherwise the smc gets into a bad state and dpm doesn't work properly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: handle cg in CI dpm codeAlex Deucher2013-08-301-0/+36
| | | | | | | | | | | | | | | | Clockgating needs to be disabled around certain parts of dpm setup otherwise the smc gets into a bad state and dpm doesn't work properly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/cik: properly set up the clearstate buffer for pg (v2)Alex Deucher2013-08-302-3/+103
| | | | | | | | | | | | | | | | | | | | The format of the clearstate buffer used for pg (powergating) changed between NI and SI. This formats it properly for what the hardware expects on SI+. v2: fix addresses Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fixes for gfx clockgating on CIKAlex Deucher2013-08-302-13/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Clockgating requires signalling between the CP and the RLC to work properly. Resetting the CP block in the CP resume code messed up the internal coordination between the blocks. Removing the reset allows gfx clockgating to work properly. However, when gfx clock gating is enabled, there is a strange interaction with dpm which causes the chip to stay in the high performance level all the time, so leave gfx clockgating disabled for now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: restructure cg/pg on cik (v2)Alex Deucher2013-08-303-69/+170
| | | | | | | | | | | | | | | | | | | | | | - use new cg/pg flags for finer grained clock and powergating control - restructure the cg/pg code so it can be called from other components such as dpm v2: fix build breakage from rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/si: enable DMA pg by defaultAlex Deucher2013-08-302-15/+7
| | | | | | | | | | | | | | Enable DMA powergating by default. The DMA engines will be powergated when not in use. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/si: properly set up the clearstate buffer for pg (v2)Alex Deucher2013-08-302-39/+145
| | | | | | | | | | | | | | | | | | | | The format of the clearstate buffer used for pg (powergating) changed between NI and SI. This formats it properly for what the hardware expects on SI. v2: fix addresses Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: enable mgcg on SIAlex Deucher2013-08-301-5/+5
| | | | | | | | | | | | | | | | Now that the CP is no longer reset and cg is properly disabled in when appropriate in the dpm code we can now enable mgcg (medium grained clockgating). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: handle cg in SI dpm codeAlex Deucher2013-08-301-0/+38
| | | | | | | | | | | | | | | | Clockgating needs to be disabled around certain parts of dpm setup otherwise the smc gets into a bad state and dpm doesn't work properly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fixes for gfx clockgating on SIAlex Deucher2013-08-302-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Clockgating requires signalling between the CP and the RLC to work properly. Resetting the CP block in the CP resume code messed up the internal coordination between the blocks. Removing the reset allows gfx clockgating to work properly. However, when gfx clock gating is enabled, there is a strange interaction with dpm which causes the chip to stay in the high performance level all the time, so leave gfx clockgating disabled for now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/si: restructure cg code (v3)Alex Deucher2013-08-304-34/+192
| | | | | | | | | | | | | | | | | | | | | | Resturcture clockgating code so that it can be enabled/disabled from other components such as dpm. v2: make function static v3: add fine grained cg controls Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: use new cg/pg flags for SIAlex Deucher2013-08-302-29/+128
| | | | | | | | | | | | | | Allows us finer grained control over clock and powergating on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add cg and pg flagsAlex Deucher2013-08-301-0/+35
| | | | | | | | | | | | | | | | | | This commits adds flags for supported clockgating and powergating features. This allows us to more easily track which features are supported on a particular asic and to enable/disable features for debugging. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: set speaker allocation for DCE3.2Alex Deucher2013-08-302-0/+49
| | | | | | | | | | | | | | | | This updates the audio driver to the speaker allocation block from the EDID. A similar change was just implemented for DCE4-8. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: set speaker allocation for DCE4/5 (v2)Alex Deucher2013-08-302-1/+47
| | | | | | | | | | | | | | | | | | | | | | This updates the audio driver to the speaker allocation block from the EDID. A similar change was just implemented for DCE6/8. v2: remove unused variables Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
OpenPOWER on IntegriCloud