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path: root/drivers/gpu/drm/radeon/radeon_asic.h
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* drm/radeon: split PT setup in more functionsChristian König2014-08-051-15/+49
| | | | | | | Move the decision what to use into the common VM code. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: Always flush the HDP cache before submitting a CS to the GPUMichel Dänzer2014-08-051-1/+2
| | | | | | | | | | | | | This ensures the GPU sees all previous CPU writes to VRAM, which makes it safe: * For userspace to stream data from CPU to GPU via VRAM instead of GTT * For IBs to be stored in VRAM instead of GTT * For ring buffers to be stored in VRAM instead of GTT, if the HPD flush is performed via MMIO Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: s/ioctl_wait_idle/mmio_hpd_flush/Michel Dänzer2014-08-051-1/+1
| | | | | | | And clean up the function comment a little. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitlyMichel Dänzer2014-08-051-4/+4
| | | | | | Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove range check from *_gart_set_pageChristian König2014-06-091-4/+8
| | | | | | | | | We never check the return value anyway and if the index isn't valid would crash way before calling the functions. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: split page flip and pending callbackChristian König2014-06-021-4/+11
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove (pre|post)_page_flip callbacksChristian König2014-06-021-6/+0
| | | | | | | They are doing the same on all generations anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/hdmi: use separated file for DCE 3.1/3.2 codeRafał Miłecki2014-06-021-0/+7
| | | | | | | | | | | | | | | DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and DCE 3. The order of setting registers and sets of registers are different. It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they have few differences as well. For now separate DCE 2 and DCE 3 path, so we can work on it without a risk of breaking DCE 3.1+. This has been tested for possible regressions on DCE32 HD4550 (RV710). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fill in set_vce_clocks for CIK asicsAlex Deucher2014-02-181-0/+1
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: initial VCE support v4Christian König2014-02-181-0/+13
| | | | | | | | | | | Only VCE 2.0 support so far. v2: squashing multiple patches into this one v3: add IRQ support for CIK, major cleanups, basic code documentation v4: remove HAINAN from chipset list Signed-off-by: Christian König <christian.koenig@amd.com>
* drm/radeon/dpm: use the driver state for dpm debugfsAlex Deucher2014-02-061-0/+2
| | | | | | | | For btc and newer, we may modify the power state depending on the circumstances. Use the modified state rather than the base state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove generic rptr/wptr functions (v2)Alex Deucher2013-12-241-13/+44
| | | | | | | | | | | | | Fill in asic family specific versions rather than using the generic version. This lets us handle asic specific differences more easily. In this case, we disable sw swapping of the rtpr writeback value on r6xx+ since the hw does it for us. Fixes bogus rptr readback on BE systems. v2: remove missed cpu_to_le32(), add comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for KB/KVAlex Deucher2013-12-241-0/+1
| | | | | | | | | Make sure interrupts are enabled before we enable thermal interrupts. Also, don't powergate uvd, etc. until after the ring tests. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for CIAlex Deucher2013-12-241-0/+1
| | | | | | | | | Make sure interrupts are enabled before we enable thermal interrupts. Also, don't powergate uvd until after the ring tests. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for SIAlex Deucher2013-12-241-0/+1
| | | | | | | Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for trinityAlex Deucher2013-12-241-0/+1
| | | | | | | | Need to wait to enable cg and pg until after ring tests. Also make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for sumoAlex Deucher2013-12-241-0/+1
| | | | | | | | Need to wait to enable cg and pg until after ring tests. Also make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for rv7xx-NIAlex Deucher2013-12-241-0/+1
| | | | | | | Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add late_enable for rs780/rs880/rv6xxAlex Deucher2013-12-241-0/+1
| | | | | | | Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: allow semaphore emission to failChristian König2013-11-151-11/+7
| | | | | | | | | To workaround bugs and/or certain limits it's sometimes useful to fall back to waiting on fences. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: drop CP page table updates & cleanup v2Christian König2013-11-011-15/+16
| | | | | | | | | The DMA ring seems to be stable now. v2: remove pt_ring_index as well Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: implement blit copy callback for CIKAlex Deucher2013-11-011-0/+4
| | | | | | | Uses the CP ring rather than the DMA ring. Useful for debugging and benchmarking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add bapm callback for kb/kvAlex Deucher2013-09-111-0/+1
| | | | | | This adds the enable_bapm callback for kb/kv. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add bapm callback for trinityAlex Deucher2013-09-111-0/+1
| | | | | | This adds the enable_bapm callback for trinity. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/r6xx: add a stubbed out set_uvd_clocks callbackAlex Deucher2013-09-111-0/+1
| | | | | | | | | | | | | | | Certain r6xx boards use the same power state for both UVD and other things. Since we don't support UVD on r6xx boards at the moment, there was no callback installed for setting the UVD clocks, however, on systems that use the same power state, this leads to a NULL pointer dereference. Fill in a stubbed out implementation for now to avoid the crash. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66963 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: "3.11" <stable@vger.kernel.org>
* drm/radeon/dpm: implement force performance levels for rs780 (v2)Anthoine Bourgeois2013-09-111-0/+2
| | | | | | | | | | | | | Allows you to limit the selected power levels via sysfs. Force the feedback divider to select a power level. v2: fix checking in rs780_force_fbdiv, drop a duplicate divider structure in rs780_dpm_force_performance_level, Force the voltage level too. Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add audio support for DCE6/8 GPUs (v12)Alex Deucher2013-08-301-1/+3
| | | | | | | | | | | | | | | | | | | | | | | Similar to DCE4/5, but supports multiple audio pins which can be assigned per afmt block. v2: rework the driver to handle more than one audio pin. v3: try different dto reg v4: properly program dto v5 (ck): change dto programming order v6: program speaker allocation block v7: rebase v8: rebase on Rafał's changes v9: integrated Rafał's comments, update to latest drm_edid_to_speaker_allocation API v10: add missing line break in error message v11: add back audio enabled messages v12: fix copy paste typo in r600_audio_enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
* drm/radeon: separate UVD code v3Christian König2013-08-301-20/+35
| | | | | | | | | | | | | | Our different hardware blocks are actually completely separated, so it doesn't make much sense any more to structure the code by pure chipset generations. Start restructuring the code by separating our the UVD block. v2: updated commit message v3: rebased and restructurized start/stop functions for kv dpm. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove special handling for the DMA ringChristian König2013-08-301-0/+7
| | | | | | | | | Now that we have callbacks for [rw]ptr handling we can remove the special handling for the DMA rings and use the callbacks instead. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: rework UVD writeback & [rw]ptr handlingChristian König2013-08-301-0/+6
| | | | | | | | The hardware just doesn't support this correctly. Disable it before we accidentally write anywhere we shouldn't. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement UVD powergating for CIAlex Deucher2013-08-301-0/+1
| | | | | | | | | Disable the UVD block when not in use to save power. The block is not actually powergated on CI, but we switch between UVD DPM (where the uvd clocks are adjusted on demand) and clocks off. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement UVD powergating for KB/KVAlex Deucher2013-08-301-0/+1
| | | | | | Powergate the UVD block when not in use to save power. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: restructure UVD code to handle UVD PG (v2)Alex Deucher2013-08-301-3/+1
| | | | | | | | | When we PG (powergate) UVD, we need to re-initialize it before we can use it again. v2: rebase on UVD stop fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement force performance level for KB/KVAlex Deucher2013-08-301-0/+2
| | | | | | Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add debugfs support for KB/KVAlex Deucher2013-08-301-0/+2
| | | | | | | This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement vblank_too_short callback for CIAlex Deucher2013-08-301-0/+1
| | | | | | | Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement force performance level for CIAlex Deucher2013-08-301-0/+2
| | | | | | Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add debugfs support for CIAlex Deucher2013-08-301-0/+2
| | | | | | This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add dpm support for CI dGPUs (v2)Alex Deucher2013-08-301-0/+14
| | | | | | | | | | | | | | | This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/kms: add dpm support for KB/KVAlex Deucher2013-08-301-0/+14
| | | | | | | | | | | | This adds dpm support for KB/KV asics. This includes: - dynamic engine clock scaling - dynamic voltage scaling - power containment - shader power scaling Set radeon.dpm=1 to enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_temperature() callbacks for CIK (v2)Alex Deucher2013-08-301-0/+2
| | | | | | | | | This added support for the on-chip thermal sensors on CIK asics. v2: fix register offset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/kms: remove r6xx+ blit copy routinesAlex Deucher2013-08-301-16/+0
| | | | | | | No longer used now that we use the async dma engines or CP DMA for bo copies. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix halting UVDChristian König2013-08-071-1/+1
| | | | | | | | | | | | | Removing the clock/power or resetting the VCPU can cause hangs if that happens in the middle of a register write. Stall the memory and register bus before putting the VCPU into reset. Keep it in reset when unloading the module or suspending. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement force performance levels for rv6xxAlex Deucher2013-07-251-0/+2
| | | | | | Allows you to limit the selected power levels via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add debugfs support for RS780/RS880 (v3)Alex Deucher2013-07-171-0/+2
| | | | | | | | | | | | | | This allows you to look at the current DPM state via debugfs. Due to the way the hardware works on these asics, there's no way to look up exactly what power state we are in, so we make the best guess we can based on the current sclk. v2: Anthoine's version v3: fix ref div Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: implement bo copy callback using CP DMA (v2)Alex Deucher2013-07-141-0/+3
| | | | | | | | | Lighter weight than using the 3D engine. v2: fix ring count Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement vblank_too_short callback for caymanAlex Deucher2013-07-081-0/+1
| | | | | | | Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement vblank_too_short callback for btcAlex Deucher2013-07-081-0/+1
| | | | | | | Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement vblank_too_short callback for evergreenAlex Deucher2013-07-081-0/+1
| | | | | | | Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: implement vblank_too_short callback for 7xxAlex Deucher2013-07-081-0/+1
| | | | | | | Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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