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* Fix common misspellingsLucas De Marchi2011-03-311-2/+2
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-nextDave Airlie2011-03-161-1/+1
|\ | | | | | | | | | | | | | | | | | | This commit changed an internal radeon structure, that meant a new driver in -next had to be fixed up, merge in the commit and fix up the driver. Also fixes a trivial nouveau merge. Conflicts: drivers/gpu/drm/nouveau/nouveau_mem.c
| * drm/radeon: fix problem with changing active VRAM size. (v2)Dave Airlie2011-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So we used to use lpfn directly to restrict VRAM when we couldn't access the unmappable area, however this was removed in 93225b0d7bc030f4a93165347a65893685822d70 as it also restricted the gtt placements. However it was only later noticed that this broke on some hw. This removes the active_vram_size, and just explicitly sets it when it changes, TTM/drm_mm will always use the real_vram_size, and the active vram size will change the TTM size used for lpfn setting. We should re-work the fpfn/lpfn to per-placement at some point I suspect, but that is too late for this kernel. Hopefully this addresses: https://bugs.freedesktop.org/show_bug.cgi?id=35254 v2: fix reported useful VRAM size to userspace to be correct. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms/cayman: add asic init/startup/fini/suspend/resume functionsAlex Deucher2011-03-031-1/+1
| | | | | | | | | | | | | | Cayman is different enough from evergreen to warrant it's own functions. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add support for CP setup on cayman asicsAlex Deucher2011-03-031-0/+5
| | | | | | | | | | | | | | | | | | | | | | Cayman asics have 3 ring buffers: ring 0 supports both gfx and compute rings 1 and 2 are compute only At the moment we only support ring 0. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add gpu_init function for caymanAlex Deucher2011-03-031-0/+40
| | | | | | | | | | | | | | This may some work to get accel going. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-mm-cleanup' into drm-nextDave Airlie2011-02-231-72/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * drm-mm-cleanup: radeon: move blit functions to radeon_asic.h radeon: kill decls for inline functions radeon: consolidate asic-specific function decls for r600 & later drm/radeon: kill radeon_bo->gobj pointer drm/radeon: introduce gem_to_radeon_bo helper drm/radeon: embed struct drm_gem_object drm: mm: add helper to unwind scan state drm: mm: add api for embedding struct drm_mm_node drm: mm: extract node insert helper functions drm: mm: track free areas implicitly drm/nouveau: don't munge in drm_mm internals
| * | radeon: move blit functions to radeon_asic.hDaniel Vetter2011-02-231-13/+0
| | | | | | | | | | | | | | | | | | Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | radeon: consolidate asic-specific function decls for r600 & laterDaniel Vetter2011-02-231-58/+3
| | | | | | | | | | | | | | | | | | | | | | | | Now all the asic specific stuff ist mostly hid in radeon_asic.* Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: kill radeon_bo->gobj pointerDaniel Vetter2011-02-231-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: introduce gem_to_radeon_bo helperDaniel Vetter2011-02-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | ... and switch it to container_of upcasting. v2: converted new pageflip code-paths. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: embed struct drm_gem_objectDaniel Vetter2011-02-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unconditionally initialize the drm gem object - it's not worth the trouble not to for the few kernel objects. This patch only changes the place of the drm gem object, access is still done via pointers. v2: Uncoditionally align the size in radeon_bo_create. At least the r600/evergreen blit code didn't to this, angering the paranoid gem code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | Merge branch 'stable/ttm.pci-api.v5' of ↵Dave Airlie2011-02-231-1/+3
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen into drm-next * 'stable/ttm.pci-api.v5' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: ttm: Include the 'struct dev' when using the DMA API. nouveau/ttm/PCIe: Use dma_addr if TTM has set it. radeon/ttm/PCIe: Use dma_addr if TTM has set it. ttm: Expand (*populate) to support an array of DMA addresses. ttm: Utilize the DMA API for pages that have TTM_PAGE_FLAG_DMA32 set. ttm: Introduce a placeholder for DMA (bus) addresses.
| * | radeon/ttm/PCIe: Use dma_addr if TTM has set it.Konrad Rzeszutek Wilk2011-02-181-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the TTM layer has used the DMA API to setup pages that are TTM_PAGE_FLAG_DMA32 (look at patch titled: "ttm: Utilize the dma_addr_t array for pages that are to in DMA32 pool."), lets use it when programming the GART in the PCIe type cards. This patch skips doing the pci_map_page (and pci_unmap_page) if there is a DMA addresses passed in for that page. If the dma_address is zero (or DMA_ERROR_CODE), then we continue on with our old behaviour. [v2: Fixed an indentation problem, added reviewed-by tag] [v3: Added Acked-by Jerome] Acked-by: Jerome Glisse <j.glisse@gmail.com> Reviewed-by: Thomas Hellstrom <thomas@shipmail.org> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Tested-by: Ian Campbell <ian.campbell@citrix.com>
* | | drm: dumb scanout create/mmap for intel/radeon (v3)Dave Airlie2011-02-071-0/+9
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just an idea that might or might not be a good idea, it basically adds two ioctls to create a dumb and map a dumb buffer suitable for scanout. The handle can be passed to the KMS ioctls to create a framebuffer. It looks to me like it would be useful in the following cases: a) in development drivers - we can always provide a shadowfb fallback. b) libkms users - we can clean up libkms a lot and avoid linking to libdrm_*. c) plymouth via libkms is a lot easier. Userspace bits would be just calls + mmaps. We could probably mark these handles somehow as not being suitable for acceleartion so as top stop people who are dumber than dumb. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: dynamically allocate power state spaceAlex Deucher2011-02-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | We previously used a static array, but some new systems had more states then we had array space, so dynamically allocate space based on the number of states in the vbios. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=33851 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: rv6xx+ thermal sensor fixesAlex Deucher2011-02-021-4/+4
| | | | | | | | | | | | | | | | | | Some fixes to the thermal sensor code: - handle negative numbers - properly handle temp calculation on different asics Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add module option for pcie gen2Alex Deucher2011-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Switching to pcie gen2 causes problems on some boards. Add a module option to turn it on/off. There are gen2 compatability issues with some motherboards it seems. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=33027 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | radeon: consolidate asic-specific function decls for pre-r600Daniel Vetter2011-01-071-59/+0
| | | | | | | | | | | | | | | | Move them to radeon_asic.h together with the other asic specific stuff. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add ucode loader for NIAlex Deucher2011-01-071-0/+4
| | | | | | | | | | | | | | | | | | The MC ucode is no longer loaded by the vbios tables as on previous asics. It now must be loaded by the driver. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5Alex Deucher2011-01-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | NI chips no longer load the MC ucode in the asic_init sequence so the asic comes up in a basic mode with low engine/memory clocks and a voltage. Once the MC ucode is loaded by the driver the card can be programmed to it's proper default clocks and voltage. As such the default clocks in the firmware info table as the post clocks, not the default running clocks. Track the default post clocks and default running clocks separately to handle this. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: handle NI thermal controllerAlex Deucher2011-01-071-0/+1
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add NI chip familiesAlex Deucher2011-01-071-0/+1
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: clean up ASIC_IS_DCE41() macroAlex Deucher2011-01-071-1/+2
| | | | | | | | | | | | | | only fusion asics are dce4.1 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add support for gen2 pcie link speedsAlex Deucher2011-01-071-0/+2
| | | | | | | | | | | | | | Supported on rv6xx/r7xx/evergreen. Cards come up in gen1 mode. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add pcie get/set lane support for r6xx/r7xx/evergreenAlex Deucher2011-01-071-0/+8
| | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon: use system_wq instead of dev_priv->wqTejun Heo2011-01-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With cmwq, there's no reason for radeon to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead. Because radeon_driver_irq_uninstall_kms() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from radeon_irq_kms_init/fini(). While at it, simplify canceling/flushing of rdev->pm.dynpm_idle_work. Always initialize and sync cancel instead of being unnecessarily smart about it. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Alex Deucher <alexdeucher@gmail.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: manage r300 CMASK RAM access and allow CMASK clearMarek Olšák2011-01-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The CMASK RAM is for colorbuffer compression (used in conjunction with MSAA). Only one user (filp) can access it. The CMASK RAM access is managed in the same way as Hyper-Z, but there is a separate ioctl, because an app that uses MSAA does not necessarily have to use zbuffering. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/switcheroo: track state of switch in drivers.Dave Airlie2011-01-051-1/+0
| | | | | | | | | | | | | | | | We need to track the state of the switch in drivers, so that after s/r we don't resume the card we've explicitly switched off before. Also don't allow a userspace open to occur if we've switched the gpu off. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: implement gpu lockup check for evergreenAlex Deucher2011-01-051-0/+1
| | | | | | | | | | | | | | Now that soft reset works, we can add this. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-radeon-fusion' of ../drm-radeon-next into drm-core-nextDave Airlie2010-12-031-1/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'drm-radeon-fusion' of ../drm-radeon-next: drm/radeon/kms: add Ontario APU ucode loading support drm/radeon/kms: add Ontario Fusion APU pci ids drm/radeon/kms: enable MSIs on fusion APUs drm/radeon/kms: add power table parsing support for Ontario fusion APUs drm/radeon/kms: refactor atombios power state fetching drm/radeon/kms: add bo blit support for Ontario fusion APUs drm/radeon/kms: add thermal sensor support for fusion APUs drm/radeon/kms: fill in GPU init for AMD Ontario Fusion APUs drm/radeon/kms: add radeon_asic struct for AMD Ontario fusion APUs drm/radeon/kms: evergreen.c updates for fusion drm/radeon/kms: MC setup changes for fusion APUs drm/radeon/kms: move r7xx/evergreen to its own vram_gtt setup function drm/radeon/kms: add support for ss overrides on Fusion APUs drm/radeon/kms: Add support for external encoders on fusion APUs drm/radeon/kms: atom changes for DCE4.1 devices drm/radeon/kms: add new family id for AMD Ontario APUs drm/radeon/kms: upstream power table updates drm/radeon/kms: upstream atombios.h updates drm/radeon/kms: upstream ObjectID.h updates drm/radeon/kms: setup mc chremap properly on r7xx/evergreen
| * | drm/radeon/kms: add thermal sensor support for fusion APUsAlex Deucher2010-11-231-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: move r7xx/evergreen to its own vram_gtt setup functionAlex Deucher2010-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | MC_VM_FB_LOCATION is at a different offset between r6xx and r7xx/evergreen. The location is needed for vram setup on fusion chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: add new family id for AMD Ontario APUsAlex Deucher2010-11-231-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-nextDave Airlie2010-12-031-0/+57
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'drm-radeon-next' of ../drm-radeon-next: drm/radeon/kms: improve pflip precision on r1xx-r4xx drm/kms/radeon: Use high precision timestamps for pageflip completion events. drm/kms/radeon: Reorder vblank and pageflip interrupt handling. drm/radeon/kms: add pageflip ioctl support (v3) drm/kms/radeon: Add support for precise vblank timestamping.
| * | | drm/radeon/kms: add pageflip ioctl support (v3)Alex Deucher2010-11-221-0/+57
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for dri2 pageflipping. v2: precision updates from Mario Kleiner. v3: Multihead fixes from Mario Kleiner; missing crtc offset add note about update pending bit on pre-avivo chips Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | drm/radeon: Use the ttm execbuf utilitiesThomas Hellstrom2010-11-221-2/+2
|/ / | | | | | | | | | | | | | | | | | | Rather than re-implementing in the Radeon driver, Use the execbuf / cs / pushbuf utilities that comes with TTM. This comes with an even greater benefit now that many spinlocks have been optimized away... Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms/atom: cleanup and unify DVO handlingAlex Deucher2010-11-181-0/+4
|/ | | | | | | Handle all the various asic family specific things for DVO. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge branch 'drm-fixes' of /home/airlied/kernel/linux-2.6 into drm-core-nextDave Airlie2010-10-191-0/+1
|\ | | | | | | | | | | | | Conflicts: drivers/gpu/drm/i915/intel_fb.c drivers/gpu/drm/radeon/r600_blit_kms.c drivers/gpu/drm/ttm/ttm_bo.c
| * drm/radeon/kms: avoid corner case issue with unmappable vram V2Jerome Glisse2010-10-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should not allocate any object into unmappable vram if we have no means to access them which on all GPU means having the CP running and on newer GPU having the blit utility working. This patch limit the vram allocation to visible vram until we have acceleration up and running. Note that it's more than unlikely that we run into any issue related to that as when acceleration is not woring userspace should allocate any object in vram beside front buffer which should fit in visible vram. V2 use real_vram_size as mc_vram_size could be bigger than the actual amount of vram [airlied: fixup r700_cp_stop case] Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: add drm blit support for evergreenAlex Deucher2010-10-061-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements blit support for bo moves using the 3D engine. It uses the same method as r6xx/r7xx: - store the base state in an IB - emit variable state and vertex buffers to do the blit This allows the hw to move bos using the 3D engine and allows full use of vram beyond the pci aperture size. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: remove new pll algoAlex Deucher2010-10-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent changes to the old algo (prefer high post div) coupled with the range and precision limitations of using fixed point with the new algo make the new algo less useful. So drop the new algo. This should work as well or better than the old new/old combinations and simplifies the code a lot. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=30218 among others. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms/r6xx+: use new style fencing (v3)Alex Deucher2010-10-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On r6xx+ a newer fence mechanism was implemented to replace the old wait_until plus scratch regs setup. A single EOP event will flush the destination caches, write a fence value, and generate an interrupt. This is the recommended fence mechanism on r6xx+ asics. This requires my previous writeback patch. v2: fix typo that enabled event fence checking on all asics rather than just r6xx+. v3: properly enable EOP interrupts Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=29972 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: enable writeback (v2)Alex Deucher2010-10-061-3/+9
|/ | | | | | | | | | | | | | | | | | | | | | | | | When writeback is enabled, the GPU shadows writes to certain registers into a buffer in memory. The driver can then read the values from the shadow rather than reading back from the register across the bus. Writeback can be disabled by setting the no_wb module param to 1. On r6xx/r7xx/evergreen, the following registers are shadowed: - CP scratch registers - CP read pointer - IH write pointer On r1xx-rr5xx, the following registers are shadowed: - CP scratch registers - CP read pointer v2: - Combine wb patches for r6xx-evergreen and r1xx-r5xx - Writeback is disabled on AGP boards since it tends to be unreliable on AGP using the gart. - Check radeon_wb_init return values properly. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: remove useless clock codeAlex Deucher2010-09-021-2/+0
| | | | | | | | | | | This code was originally for forcing some clocks on certain asics. However, this code was later moved to asic specific functions for all of the affected asics. The only users of the original code at this point were r600, rv770, and evergreen and the code was not relevant for those asics. So, remove it. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix a regression on r7xx AGP due to the HDP flush fixAlex Deucher2010-08-301-0/+6
| | | | | | | | | | | | | | | | commit: 812d046915f48236657f02c06d7dc47140e9ceda drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush breaks on AGP boards since there is no VRAM gart table. This patch fixes the issue by creating a VRAM scratch page so that can be used on both AGP and PCIE. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=29834 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: unify i2c handlingAlex Deucher2010-08-101-0/+2
| | | | | | | | | | | | Previously we added i2c buses as needed when enumerating connectors power management, etc. This only exposed the actual buses used and could have lead to the same buse getting created more than once if one buses was used for more than one purpose. This patch sets up all i2c buses on the card in one place and users of the buses just point back to the one instance. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: move ttm global code to core drmDave Airlie2010-08-041-1/+1
| | | | | | | | I wrote this for the prime sharing work, but I also noticed other external non-upstream drivers from a large company carrying a similiar patch, so I may as well ship it in master. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: add basic zmask/hiz support (v4)Dave Airlie2010-08-021-0/+2
| | | | | | | | | | | | | | | This interface allows userspace to request hyperz support, it probably needs more locking, and really reporting that you can have hyperz is racy since someone else might get it before you do. v2: modify so we pass 0 valued packets to let DDX/r300c keep working. also fixed incorrect 0x4f1c reference. v3: fixup zb_bw_cntl so older drivers keep working v4: add locking, fixup SC_HYPERZ_EN - patch stream to disable hiz Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge tag 'v2.6.35-rc6' into drm-radeon-nextDave Airlie2010-08-021-0/+1
|\ | | | | | | Need this to avoid conflicts with future radeon fixes
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