| Commit message (Collapse) | Author | Age | Files | Lines |
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It's needed by by both the asic specific functions and the
extended table parser.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Right now it's called right after enable, but after
reworking the dpm init order, it will get called later
to accomodate loading the smc early, but enabling
thermal interrupts and block powergating later after
the ring tests are complete.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Needed for DPM on CI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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convert from number of lanes to register setting.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Required for checking vblank time for mclk changes.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Add a helper function to determine the preferred
pcie gen based on the card, system, and circumstance.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This data will be needed for dpm on newer asics.
v2: fix typo in rebase
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This adds dpm support for rv6xx asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching
Set radeon.dpm=1 to enable.
v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
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These are shared by rs780/rs880, rv6xx, and newer chips.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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