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* Merge branch 'master' into export-slabhTejun Heo2010-04-051-6/+19
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| * drm/radeon/kms: enable ACPI powermanagement mode on radeon gpus.Dave Airlie2010-04-011-0/+7
| | | | | | | | | | | | | | Some GPUs have an APM/ACPI PM mode selection switch and some BIOSes set this to APM. We really want this in ACPI mode for Linux. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add sanity check to wptr.Dave Airlie2010-04-011-0/+2
| | | | | | | | | | | | | | | | If we resume in a bad way, we'll get 0xffffffff in wptr, and then oops with no console. This just adds a sanity check so that we can avoid the oops and hopefully get more details out of people's systems. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: display watermark updates (v2)Alex Deucher2010-03-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add module option to force the display priority 0 = auto, 1 = normal, 2 = high - Default to high on r3xx/r4xx/rv515 chips Fixes flickering problems during heavy acceleration due to underflow to the display controllers - Fill in minimal support for RS600 v2 - update display priority when bandwidth is updated so the user can change the parameter at runtime and it will take affect on the next modeset. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: avoid possible oops (call gart_fini before gart_disable)Jerome Glisse2010-03-311-1/+1
| | | | | | | | | | | | | | | | | | radeon_gart_fini might call GART unbind callback function which might try to access GART table but if gart_disable is call first the GART table will be unmapped so any access to it will oops. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: display watermark fixesAlex Deucher2010-03-311-5/+3
| | | | | | | | | | | | | | | | | | | | - rs780/880 were using the wrong bandwidth functions - convert r1xx-r4xx to use the same pm sclk/mclk structs as r5xx+ - move bandwidth setup to a common function Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: expose thermal/fan i2c busesAlex Deucher2010-03-311-0/+1
| | | | | | | | | | | | | | | | Look up i2c bus in the power table and expose it. You'll need to load a hwmon driver for any chips on the bus, this patch just exposes the bus. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
| * drm/radeon: include radeon_asic.h in the asic specific filesDaniel Vetter2010-03-151-0/+1
| | | | | | | | | | | | | | | | In essence this creates a home for all asic specific declarations in radeon_asic.h Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: switch to condition waiting for reclockingRafał Miłecki2010-03-151-0/+2
| | | | | | | | | | | | | | | | | | | | We tried to implement interruptible waiting with timeout (it was broken anyway) which was not a good idea as explained by Andrew. It's possible to avoid using additional variable but actually it inroduces using more complex in-kernel tools. So simply add one variable for condition. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-301-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* drm/radeon/kms: force pinning buffer into visible VRAMJerome Glisse2010-02-251-1/+4
| | | | | | | | | This patch properly set visible VRAM and enforce any pinned buffer to be into visible VRAM. We might later add a flag to release this constraint for some newer hw more clever than previous. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: simplify memory controller setup V2Jerome Glisse2010-02-181-61/+32
| | | | | | | | | | | | | | | | | | | | | | | | | Get rid of _location and use _start/_end also simplify the computation of vram_start|end & gtt_start|end. For R1XX-R2XX we place VRAM at the same address of PCI aperture, those GPU shouldn't have much memory and seems to behave better when setup that way. For R3XX and newer we place VRAM at 0. For R6XX-R7XX AGP we place VRAM before or after AGP aperture this might limit to limit the VRAM size but it's very unlikely. For IGP we don't change the VRAM placement. Tested on (compiz,quake3,suspend/resume): PCI/PCIE:RV280,R420,RV515,RV570,RV610,RV710 AGP:RV100,RV280,R420,RV350,RV620(RPB*),RV730 IGP:RS480(RPB*),RS690,RS780(RPB*),RS880 RPB: resume previously broken V2 correct commit message to reflect more accurately the bug and move VRAM placement to 0 for most of the GPU to avoid limiting VRAM. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: set gart pages to invalid on unbind and point to dummy pageDave Airlie2010-02-111-0/+1
| | | | | | | | | | | | | | this uses a new entrypoint to invalidate gart entries instead of using 0. Changed to rather than pointing to 0 address point empty entry to dummy page. This might help to avoid hard lockup if for some wrong reasons GPU try to access unmapped GART entry. I'm not 100% sure this is going to work, we probably need to allocate a dummy page and point all the GTT entries at it similiar to what AGP does. but we can test this first I suppose. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: use wait queue (events) for VBLANK syncRafał Miłecki2010-02-091-4/+2
| | | | | | | | This already simplifies code significally and makes it maintaible in case of adding memory reclocking plus voltage changing in future. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add dynamic engine reclocking (V9)Rafał Miłecki2010-02-091-0/+4
| | | | | | | | | | | | | | V2: reorganize functions, fix modesetting calls V3: rebase patch, use radeon's workqueue V4: enable on tested chipsets only, request VBLANK IRQs V5: enable PM on older hardware (IRQs, mode_fixup, dpms) V6: use separate dynpm module parameter V7: drop RADEON_ prefix, set minimum mode for dpms off V8: update legacy encoder call, fix order in rs600 IRQ V9: update compute_clocks call in legacy, not only DPMS_OFF Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: clean up some low-hanging magic numbersAlex Deucher2010-02-091-6/+6
| | | | | | | | | Switch some magic numbers to their proper defines. The register header madness needs to be cleaned up at some point. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add workaround for rn50/rv100 serversAlex Deucher2010-02-091-0/+65
| | | | | | | | | | Some servers have two VGA ports but only report one in the bios connector tables. On these systems always set up the TV DAC so that it displays properly even if the bios is wrong. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: don't call suspend path before cleaning up GPUJerome Glisse2010-02-051-3/+1
| | | | | | | | | | | | | | In suspend path we unmap the GART table while in cleaning up path we will unbind buffer and thus try to write to unmapped GART leading to oops. In order to avoid this we don't call the suspend path in cleanup path. Cleanup path is clever enough to desactive GPU like the suspend path is doing, thus this was redondant. Tested on: RV370, R420, RV515, RV570, RV610, RV770 (all PCIE) Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/r100/kms: Emit cache flush to the end of command buffer. (v2)Pauli Nieminen2010-02-051-2/+8
| | | | | | | | | | | | | | Cache flush is required in case CPU is accessing rendered data. This fixes glean/readPixSanity test case and random rendering errors in sauerbraten and warzone2100. v2 Fix comment ordering in r100_fence_ring_emit and remove extra defines added in first version. Signed-off-by: Pauli Nieminen <suokkos@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms/r100: fix bug in CS parserAlex Deucher2010-01-211-0/+1
| | | | | | | | | | | | | The first dword of PACKET3_3D_DRAW_IMMD maps to SE_VTX_FMT so the vertex size is part of the draw packet. This patch fixes a possible case where you have a command buffer that does not contain SE_VTX_FMT register write, but does contain PACKET3_3D_DRAW_IMMD. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
* drm/radeon/kms: Use radeon_agp_disable when disabling AGPJerome Glisse2010-01-141-3/+1
| | | | | | | | | | | | | | Use same common function to disable agp so we replace the GART callback by the proper one when we do so. This fix oops if radeon_agp_init report failure. This patch also move radeon_agp_init out of *_mc_init for r600 & rv770 so that we can have a similar behavior than for previous hw, ie if agp_init fails it will fallback to GPU GART and disable AGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Don't try to enable IRQ if we have no handler installedJerome Glisse2010-01-081-1/+7
| | | | | | | | | If for any reason we haven't installed handler we shouldn't try to enable IRQ/MSI on the hw so we don't get unhandled IRQ/MSI which makes the kernel sad. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Make sure we release AGP device if we acquired itJerome Glisse2010-01-081-0/+1
| | | | | | | | | In some case we weren't releasing the AGP device at module unloading. This leaded to unfunctional AGP at next module load. This patch make sure we release the AGP bus if we acquire it. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Schedule host path read cache flush through the ring V2Jerome Glisse2010-01-081-8/+6
| | | | | | | | | | | | | | | | | R300 family will hard lockup if host path read cache flush is done through MMIO to HOST_PATH_CNTL. But scheduling same flush through ring seems harmless. This patch remove the hdp_flush callback and add a flush after each fence emission which means a flush after each IB schedule. Thus we should have same behavior without the hard lockup. Tested on R100,R200,R300,R400,R500,R600,R700 family. V2: Adjust fence counts in r600_blit_prepare_copy() Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: allow rendering while no colorbuffer is set on r300Marek Olšák2009-12-231-0/+4
| | | | | | | | | | Because hardware cannot disable all colorbuffers directly to do depth-only rendering, a user should: - disable reading from a colorbuffer in blending - disable fastfill - set the color channel mask to 0 to prevent writing to a colorbuffer Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix r100->r500 CS checker for compressed textures. (v2)Dave Airlie2009-12-161-4/+48
| | | | | | | | | | | | | This adds support for compressed textures to the r100->r500 CS checker, it lets me run openarena and the demos in mesa fine. Thanks to Maciej Cencora for initial comments. Changes since v1: fix calculations with Maciej formulas Reviewed-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: init pm on all chipsetsRafał Miłecki2009-12-161-0/+2
| | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: restore surface registers on resume.Dave Airlie2009-12-101-0/+2
| | | | | | | | | | | On resume on my rv530 laptop surface cntl was left disabled, so wierd stuff would happen with rendering to a tiled front buffer. This checks if the surface regs are assigned to bos and reprograms the surface registers on resume using the same path that clears them all on init. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: enable hpd supportAlex Deucher2009-12-081-2/+7
| | | | | | | | | | | This enabled interrupt driven hpd support for all radeon chips. Assuming the hpd pin is wired up correctly, the driver will generate uevents on digital monitor connect and disconnect and retrain DP monitors automatically. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add hpd support for r1xx-r4xx asicsAlex Deucher2009-12-081-2/+104
| | | | | | | | This just adds the functionality, it's not hooked up yet. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms/legacy: set common regs to sane valueAlex Deucher2009-12-081-0/+14
| | | | | | | The DDX and radeonfb always set these regs to a sane value. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Rework radeon object handlingJerome Glisse2009-12-021-38/+52
| | | | | | | | | | | | | | | The locking & protection of radeon object was somewhat messy. This patch completely rework it to now use ttm reserve as a protection for the radeon object structure member. It also shrink down the various radeon object structure by removing field which were redondant with the ttm information. Last it converts few simple functions to inline which should with performances. airlied: rebase on top of r600 and other changes. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add irq mitigation code for sw interrupt.Dave Airlie2009-12-021-1/+0
| | | | | | | | | We really don't need to process every irq that comes in, we only really want to do SW irq processing when we are actually waiting for a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems so it needs some testing. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: ignore unposted GPUs with no BIOS.Dave Airlie2009-12-021-4/+2
| | | | | | | If we find a GPU but we can't find its BIOS and it isn't posted, then ignore it. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add HDP flushing for all GPUs.Dave Airlie2009-12-021-0/+8
| | | | | | | | | | | rendercheck under kms on r600s was failing due to HDP flushing not happening. This adds HDP flushing to the object wait function for r100->r700 families. rendercheck passes basic tests on r600 with this change. Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: AGP systems need PCI bus mastering enabledDave Airlie2009-12-021-3/+10
| | | | | | | | | | We might not hit this yet, but when if we do any sort of writeback we really need to enable PCI bus mastering on these systems from what I can see. This enables PCI BM on all radeons that require it. Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge branch 'drm-linus' of ↵Linus Torvalds2009-11-111-11/+31
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (52 commits) drm/kms: Init the CRTC info fields for modes forced from the command line. drm/radeon/r600: CS parser updates drm/radeon/kms: add debugfs for power management for AtomBIOS devices drm/radeon/kms: initial mode validation support drm/radeon/kms/atom/dce3: call transmitter init on mode set drm/radeon/kms: store detailed connector info drm/radeon/kms/atom/dce3: fix up usPixelClock calculation for Transmitter tables drm/radeon/kms/r600: fix rs880 support v2 drm/radeon/kms/r700: fix some typos in chip init drm/radeon/kms: remove some misleading debugging output drm/radeon/kms: stop putting VRAM at 0 in MC space on r600s. drm/radeon/kms: disable D1VGA and D2VGA if enabled drm/radeon/kms: Don't RMW CP_RB_CNTL drm/radeon/kms: fix coherency issues on AGP cards. drm/radeon/kms: fix rc410 suspend/resume. drm/radeon/kms: add quirk for hp dc5750 drm/radeon/kms/atom: fix potential oops in spread spectrum code drm/kms: typo fix drm/radeon/kms/atom: Make card_info per device drm/radeon/kms/atom: Fix DVO support ...
| * drm/radeon/kms: Don't RMW CP_RB_CNTLAlex Deucher2009-11-041-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Immediate readback seems faulty on some chips. I suspect it takes a while to get through the fifo to the actual register backbone. There's no need to read it back, so, just write the driver's copy of the register's value directly. Should fix bug 24535 and possibly 24218 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add support for msiAlex Deucher2009-10-261-1/+16
| | | | | | | | | | | | | | Try to enable msi on chips that support it. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: fix cs parser tex bit 11 checkMathias Fröhlich2009-10-261-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The problem boils down to the order when the bit11 of the texture size is or'ed to the original width. In the end each mipmap level has the same width or height because of that 11 bit is ored to the scaled down lod with and thus blows up the size again to the full size or more due to the power of two rounding afterwards. The attached patch changes this order so that the texture sizes are computed correct. Also the on error the yet missing inputs to the size computation are printed which helped me to find out where it really breaks. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096Matt Turner2009-10-161-1/+1
| | | | | | | | | | Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Fix apparent typo in legacy CRTC memory bandwidth calculation.Michel Dänzer2009-10-121-1/+1
| | | | | | | | | | | | | | | | | | While investigating the cause of CRTC FIFO underruns, I noticed that when converting the memory bandwidth calculation from the userspace X driver code, an instance of '8.0' was apparently accidentally converted to '80'. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-next' of ../drm-next into drm-linusDave Airlie2009-10-081-163/+269
|\ \ | |/ | | | | | | | | | | | | | | conflict in radeon since new init path merged with vga arb code. Conflicts: drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_asic.h drivers/gpu/drm/radeon/radeon_device.c
| * drm/radeon/kms: fix vline register for second head.Dave Airlie2009-10-081-1/+1
| | | | | | | | | | | | | | Both r100/r600 had this wrong, use the macro to extract the register to relocate. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: respect single crtc cards, only create one crtc. (v2)Dave Airlie2009-10-051-3/+5
| | | | | | | | | | | | | | | | | | | | Also add single crtc for RN50 chips. changes in v2: fix vblank init to respect single crtc flag fix r100 mode bandwidth to respect single crtc flag Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Remove old init path as no hw use it anymoreJerome Glisse2009-10-021-1/+0
| | | | | | | | | | | | | | | | | | This remove old init path and allow code cleanup, now all hw use the new init path, see top of radeon.h for description of this. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Convert R100 to new init path (V2)Jerome Glisse2009-10-021-158/+255
| | | | | | | | | | | | | | | | | | | | | | | | New init path allow to simply asic initialization and make easier to trace what happen on each different asic. We are removing most callback. More cleanup should happen latter to remove even more callback. Also cleanup register specific to R100,RV200,RV250. Version 2 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3)Jerome Glisse2009-10-021-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also cleanup register specific to RS400/RS480. This patch also fix legacy VGA register used to disable VGA access we were programming wrong register. Now we should properly disable VGA on r100 up to rs400 asics. Note that RS400/RS480 resume is broken, it hangs the computer while reprogramming dynamic clock, doesn't work either without that patch. We need to spend more time investigating this issue. Version 2 of the patch remove dead code that was left commented out in the previous version. Version 3 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-next' of ↵Linus Torvalds2009-09-301-120/+77
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (25 commits) drm/radeon/kms: Convert R520 to new init path and associated cleanup drm/radeon/kms: Convert RV515 to new init path and associated cleanup drm: fix radeon DRM warnings when !CONFIG_DEBUG_FS drm: fix drm_fb_helper warning when !CONFIG_MAGIC_SYSRQ drm/r600: fix memory leak introduced with 64k malloc avoidance fix. drm/kms: make fb helper work for all drivers. drm/radeon/r600: fix offset handling in CS parser drm/radeon/kms/r600: fix forcing pci mode on agp cards drm/radeon/kms: fix for the extra pages copying. drm/radeon/kms/r600: add support for vline relocs drm/radeon/kms: fix some bugs in vline reloc drm/radeon/kms/r600: clamp vram to aperture size drm/kms: protect against fb helper not being created. drm/r600: get values from the passed in IB not the copy. drm: create gitignore file for radeon drm/radeon/kms: remove unneeded master create/destroy functions. drm/kms: start adding command line interface using fb. fb: change rules for global rules match. drm/radeon/kms: don't require up to 64k allocations. (v2) drm/radeon/kms: enable dac load detection by default. ... Trivial conflicts in drivers/gpu/drm/radeon/radeon_asic.h due to adding '->vga_set_state' function pointers.
| * drm/radeon/kms: fix some bugs in vline relocAlex Deucher2009-09-261-6/+5
| | | | | | | | | | | | | | | | | | - fix offset of NOP packet for parsing - fix p->idx increments - fix bad mask when updating crtc vline info Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
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