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* Merge tag 'drm/panel/for-4.6-rc1' of ↵Dave Airlie2016-03-171-0/+81
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://anongit.freedesktop.org/git/tegra/linux into drm-next drm/panel: Changes for v4.6-rc1 This contains a refactoring of parts of the DSI core to allow creating DSI devices from non-DSI control busses (i.e. I2C, SPI, ...). Other than that there's support for a couple of new panels as well as a few cleanup patches. * tag 'drm/panel/for-4.6-rc1' of http://anongit.freedesktop.org/git/tegra/linux: drm/bridge: Make (pre/post) enable/disable callbacks optional drm/panel: simple: Add URT UMSH-8596MD-xT panels support dt-bindings: Add URT UMSH-8596MD-xT panel bindings of: Add United Radiant Technology Corporation vendor prefix drm/panel: simple: Support for LG lp120up1 panel dt-bindings: Add LG lp120up1 panel bindings drm/panel: simple: Fix g121x1_l03 hsync/vsync polarity drm/dsi: Get DSI host by DT device node drm/dsi: Add routine to unregister a DSI device drm/dsi: Try to match non-DT DSI devices drm/dsi: Use mipi_dsi_device_register_full() for DSI device creation drm/dsi: Check for CONFIG_OF when defining of_mipi_dsi_device_add()
| * drm/panel: simple: Add URT UMSH-8596MD-xT panels supportMaciej S. Szmigiero2016-03-021-0/+54
| | | | | | | | | | | | | | | | Add support for United Radiant Technology UMSH-8596MD-xT 7.0" WVGA TFT LCD panels in the simple-panel driver. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: simple: Support for LG lp120up1 panelJitao Shi2016-03-021-0/+26
| | | | | | | | | | | | | | | | The LG lp120up1 TFT LCD panel with eDP interface is a 12.0" 1920x1280 panel, which can be supported by the simple panel driver. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: simple: Fix g121x1_l03 hsync/vsync polarityAkshay Bhat2016-03-021-0/+1
| | | | | | | | | | | | | | | | Set hsync/vsync to active low for g121x1_l03 panel to match the recommended setting in the datasheet. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | drm/fsl-dcu: use mode flags for hsync/vsync polarityStefan Agner2016-02-251-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | The current default configuration is as follows: - Invert VSYNC signal (active LOW) - Invert HSYNC signal (active LOW) The mode flags allow to specify the required polarity per mode. Furthermore, none of the current driver settings is actually a standard polarity. This patch applies the current driver default polarities as explicit flags to the display which has been introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b"). The driver now also parses the flags field and applies the configuration accordingly, by using the following values as standard polarities: (e.g. when no flags are specified): - VSYNC signal not inverted (active HIGH) - HSYNC signal not inverted (active HIGH) Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
* drm/panel: simple: Add QiaoDian qd43003c0-40Josh Wu2015-12-161-0/+27
| | | | | | | | | | | | The QiaoDian Xianshi QD43003C0-40 is a 4"3 TFT LCD panel. Timings from the OTA5180A document, ver 0.9, section 10.1.1: http://www.orientdisplay.com/pdf/OTA5180A.pdf Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: add kernel doc for size attributes in panel_descUlrich Ölmann2015-12-161-0/+4
| | | | | | | Document that 'width' and 'height' are measured in millimeters. Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Kyocera TCG121XGLP panelLucas Stach2015-12-161-0/+27
| | | | | | | | | The Kyocera TCG121XGLP panel is an XGA LCD TFT panel connected through LVDS, which can be supported by the simple panel driver. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add Sharp LS043T1LE01 MIPI DSI panelWerner Johansson2015-11-243-0/+397
| | | | | | | | | | | The Sharp LS043T1LE01 is a 4.3", 540x960 TFT-LCD panel connected using two DSI lanes. It is for example found on the Qualcomm Snapdragon 800 Dragonboard (APQ8074). Signed-off-by: Werner Johansson <werner.johansson@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add Panasonic VVX10F034N00 MIPI DSI panelWerner Johansson2015-11-233-0/+345
| | | | | | | | | This adds support for the Panasonic panel found in some Xperia Z2 tablets. Signed-off-by: Werner Johansson <werner.johansson@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Innolux G121X1-L03Akshay Bhat2015-11-231-0/+31
| | | | | | | | | Add support for Innolux CheMei 12" G121X1-L03 XGA LVDS display. Datasheet: http://www.azdisplays.com/PDF/G121X1-L03.pdf Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for BOE TV080WUM-NL0Chris Zhong2015-11-231-0/+34
| | | | | | | | | The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel connected using four DSI lanes. It can be supported by the simple-panel driver. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* spi: Drop owner assignment from spi_driversAndrew F. Davis2015-10-282-2/+0
| | | | | | | | | An spi_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* drm/panel: Add support for LG LG4573 480x800 4.3" panelHeiko Schocher2015-08-143-0/+307
| | | | | | | | The LG4573 is used on the LG LCD LB043WV2-SD01, an industrial 4.3" TFT panel with SPI control interface. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add display timing for Okaya RS800480T-7X0GPGary Bisson2015-08-141-0/+33
| | | | | | | | | | | | | | Add support for the Okaya RS800480T-7X0GP to the DRM simple panel driver. The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel LCD interface. It supports pixel clocks in the range of 30-40 MHz. This panel details can be found at: http://boundarydevices.com/product/7-800x480-display/ Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for NEC NL4827HC19-05B 480x272 paneljianwei wang2015-08-141-0/+27
| | | | | | | | | | | | This adds support for the NEC NL4827HC19-05B 480x272 panel to the DRM simple panel driver. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> [treding@nvidia.com: add .bpc field for panel] Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for AUO B080UAN01Thierry Reding2015-08-141-0/+31
| | | | | | | The AUO B080UAN01 is an 8.0" WUXGA TFT LCD panel connected using four DSI lanes. It can be supported by the simple-panel driver. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Correct minimum hsync length of the HannStar HSD070PWW1 panelPhilipp Zabel2015-08-141-1/+6
| | | | | | | | | | According to the data sheet, the minimum horizontal blanking interval is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the minimum working horizontal blanking interval to be 60 clocks. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panelPhilipp Zabel2015-08-141-0/+1
| | | | | | | | | | | | | | | The bus format both specifies the bpc and the way the individual bits get serialized into the 7 LVDS timeslots. While the is only one standard mapping for 6 bpc and so the driver could infer the bit mapping from the bpc alone, there are more options for the 8 bpc case which makes specifiying the bus format mandatory. To keep things consistent across panels and to set a precedent for new panel additions add the proper bus format. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add Samsung prefix to panel driversThierry Reding2015-08-134-8/+8
| | | | | | | | | | The likelihood of getting a large number of panel drivers from different vendors is quite high. Add a prefix to the two existing Samsung panel drivers to set a guideline for future patch submissions. Using vendor prefixes consistently should allow a cleaner organization of the tree. Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add bus format for HannStar HSD100PXN1Philipp Zabel2015-06-121-0/+1
| | | | | | | This patch adds the bus_format field to the HSD100PXN1 panel structure. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add display timing for HannStar HSD100PXN1Eric Nelson2015-06-121-0/+26
| | | | | | | | | | | | | | Add support for the Hannstar HSD100PXN1 to the DRM simple panel driver. The HSD100PXN1 is an XGA (1024x768) panel with an 18-bit LVDS interface. It supports pixel clocks in the range of 55-75 MHz. This panel is offered for sale by Freescale as a companion part to its' i.MX5x Quick Start board and i.MX6 SABRE platforms with under the name MCIMX-LVDS1. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: ld9040: Remove useless paddingThierry Reding2015-06-051-4/+4
| | | | | | | There's some useless padding in the struct spi_driver definition. Remove it since it serves no useful purpose. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Constify OF match tablesThierry Reding2015-06-052-2/+2
| | | | | | | | Both the Samsung LD9040 and Samsung S6E8AA0 panel drivers are missing a const qualifier for their OF match tables. This data is static and never changes, so can be read-only. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for LG LB070WV8 800x480 7" panelHeiko Schocher2015-05-221-0/+27
| | | | | | | | This adds support for the LG LB070WV8 7" 800x480 panel to the DRM simple panel driver. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add support for Ampire AM-800480R3TMQW-A1H 800x480 7" panelPhilipp Zabel2015-04-021-0/+28
| | | | | | | | This adds support for the AM-800480R3TMQW-A1H 7" 800x480 panel to the DRM simple panel driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add display timing for HannStar HSD070PWW1Philipp Zabel2015-04-021-13/+13
| | | | | | | | | | | | | | | The HannStar HSD070PWW1 LVDS panel data sheet lists allowed ranges additionally to the typical values for pixel clock rate (64.3-82 MHz) and blanking intervals (54-681 clock cycles horizontally, 3-23 lines vertically). This patch replaces this panel's display mode with the display timing information to describe acceptable timings. Since the HSYNC and VSYNC are unused, the distribution between front porches, back porches, and sync pulse lengths was chosen at will. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add display timing supportPhilipp Zabel2015-04-022-0/+43
| | | | | | | | | | | The simple panel driver's ->get_modes() implementation calculates the display mode list from the typical timings and the ->get_timings() implementation returns the timings to the connected encoder for mode validation and fixup. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> [treding@nvidia.com: select VIDEOMODE_HELPERS] Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add support for OrtusTech COM43H4M85ULC panelPhilipp Zabel2015-04-021-0/+27
| | | | | | | | This adds support for the COM43H4M85ULC 3.7" 800x480 panel to the DRM simple panel driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: Add bus format for Giantplus GPG482739QS5 panelPhilipp Zabel2015-04-021-0/+1
| | | | | | | This patch adds the bus_format field to the GPG482739QS5 panel structure. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for AUO b101ean01 panelHuang Lin2015-04-021-0/+26
| | | | | | | | | The AUO b101ean01 panel is a 10.1" 1280x800 panel which can be supported by the simple panel driver. Signed-off-by: Huang Lin <hl@rock-chips.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Innolux ZJ070NA-01PMichael Grzeschik2015-04-021-0/+26
| | | | | | | | | | The Innolux ZJ070NA-01P is a 7.0" TFT LCD panel with an integrated LED backlight unit. This panel is used on the Technexion Toucan. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Innolux AT043TN24Nicolas Ferre2015-04-021-0/+28
| | | | | | | | | The Innolux AT043TN24 4.3" WQVGA TFT LCD panel. This panel with backlight is found in PDA 4.3" LCD screen (TM43xx series for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Shelly SCA07010-BFN-LNNBoris BREZILLON2015-04-021-0/+26
| | | | | | | | | | The Shelly SCA07010-BFN-LNN is a 7.0" WVGA TFT LCD panel. This panel with backlight is found in PDA 7" LCD screen (TM70xx series for instance). Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Samsung LTN140AT29 panelStéphane Marchesin2015-04-021-0/+26
| | | | | | | | | | | | This panel is used by the Nyan Blaze board and can be supported by the simple-panel driver. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org> [tomeu.vizoso@collabora.com: add device tree binding document] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm: panel/simple: add backlight dependencyArnd Bergmann2015-01-311-0/+1
| | | | | | | | | | | The simple panel code uses the backlight interface to find a device, which fails when backlight is disabled: drivers/built-in.o: In function `panel_simple_platform_probe': :(.text+0xd3c48): undefined reference to `of_find_backlight_by_node' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm: panel/sharp: add backlight dependencyArnd Bergmann2015-01-311-0/+1
| | | | | | | | | | | The sharp panel code uses the backlight interface to find a device, which fails when backlight is disabled: drivers/built-in.o: In function `sharp_panel_probe': :(.text+0x5ceac): undefined reference to `of_find_backlight_by_node' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/panel: simple: Add AVIC TM070DDH03 panel supportPhilipp Zabel2015-01-281-0/+31
| | | | | | | | The Shanghai AVIC Optoelectronics TM070DDH03 is a 7" 1024x600 TFT LCD panel connecting to a 24-bit RGB LVDS interface. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: sharp: lq101r1sx01: Remove unneeded includeThierry Reding2015-01-281-2/+0
| | | | | | | Nothing in the file needs symbols from include/linux/host1x.h, so remove the include. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: sharp: lq101r1sx01: Respect power timingsThierry Reding2015-01-281-9/+9
| | | | | | | | | | | | | | | Before shutting down the display using the DCS display_off command, wait for 4 frames according to the datasheet. Furthermore, after enabling the power supply, the supply voltage needs around 10 ms to settle. After that, another 120 ms is required before a DCS exit_sleep_mode command can be sent. While at it, no longer send the DCS soft_reset command. This is totally unnecessary because we've just powered up the display, hence it will be in a reset state already. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: sharp: lq101r1sx01: Add delay after display onThierry Reding2015-01-281-0/+13
| | | | | | | | | After switching the display on (using the DCS display_on command), wait for 6 frames (100ms at 60 Hz) to give the display more time to prepare. Failing to do this results in the panel not initializing properly in a large number of cases. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/panel: simple: Add support for Giantplus GPG482739QS5Philipp Zabel2015-01-281-0/+26
| | | | | | | | | | | | | | | This patch adds support for the GiantPlus GPG48273QS5 4.3" WQVGA TFT LCD panel to the simple-panel driver. This panel is connected via a parallel bus and uses both HSYNC and VSYNC, whose lengths are unfortunately not clearly defined. The datasheet only specifies the front- and backporch length, but the timing diagram suggests that both sync signals should be asserted for exactly one clock cycle. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm: panel: simple-panel: add bus format information for foxlink panelBoris Brezillon2015-01-211-0/+1
| | | | | | | Foxlink's fl500wvr00-a0t supports RGB888 format. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Thierry Reding <treding@nvidia.com>
* drm: panel: simple-panel: add support for bus_format retrievalBoris Brezillon2015-01-211-0/+5
| | | | | | | | Provide a way to specify panel requirement in terms of supported media bus format (particularly useful for panels connected to an RGB or LVDS bus). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Thierry Reding <treding@nvidia.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-12-156-49/+605
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "Highlights: - AMD KFD driver merge This is the AMD HSA interface for exposing a lowlevel interface for GPGPU use. They have an open source userspace built on top of this interface, and the code looks as good as it was going to get out of tree. - Initial atomic modesetting work The need for an atomic modesetting interface to allow userspace to try and send a complete set of modesetting state to the driver has arisen, and been suffering from neglect this past year. No more, the start of the common code and changes for msm driver to use it are in this tree. Ongoing work to get the userspace ioctl finished and the code clean will probably wait until next kernel. - DisplayID 1.3 and tiled monitor exposed to userspace. Tiled monitor property is now exposed for userspace to make use of. - Rockchip drm driver merged. - imx gpu driver moved out of staging Other stuff: - core: panel - MIPI DSI + new panels. expose suggested x/y properties for virtual GPUs - i915: Initial Skylake (SKL) support gen3/4 reset work start of dri1/ums removal infoframe tracking fixes for lots of things. - nouveau: tegra k1 voltage support GM204 modesetting support GT21x memory reclocking work - radeon: CI dpm fixes GPUVM improvements Initial DPM fan control - rcar-du: HDMI support added removed some support for old boards slave encoder driver for Analog Devices adv7511 - exynos: Exynos4415 SoC support - msm: a4xx gpu support atomic helper conversion - tegra: iommu support universal plane support ganged-mode DSI support - sti: HDMI i2c improvements - vmwgfx: some late fixes. - qxl: use suggested x/y properties" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (969 commits) drm: sti: fix module compilation issue drm/i915: save/restore GMBUS freq across suspend/resume on gen4 drm: sti: correctly cleanup CRTC and planes drm: sti: add HQVDP plane drm: sti: add cursor plane drm: sti: enable auxiliary CRTC drm: sti: fix delay in VTG programming drm: sti: prepare sti_tvout to support auxiliary crtc drm: sti: use drm_crtc_vblank_{on/off} instead of drm_vblank_{on/off} drm: sti: fix hdmi avi infoframe drm: sti: remove event lock while disabling vblank drm: sti: simplify gdp code drm: sti: clear all mixer control drm: sti: remove gpio for HDMI hot plug detection drm: sti: allow to change hdmi ddc i2c adapter drm/doc: Document drm_add_modes_noedid() usage drm/i915: Remove '& 0xffff' from the mask given to WA_REG() drm/i915: Invert the mask and val arguments in wa_add() and WA_REG() drm: Zero out DRM object memory upon cleanup drm/i915/bdw: Fix the write setting up the WIZ hashing mode ...
| * drm/panel: Add Sharp LQ101R1SX01 supportThierry Reding2014-11-133-0/+478
| | | | | | | | | | | | | | | | | | | | This panel requires dual-channel mode. The device accepts command-mode data on 8 lanes and will therefore need a dual-channel DSI controller. The two interfaces that make up this device need to be instantiated in the controllers that gang up to provide the dual-channel DSI host. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/dsi: Do not require .owner field to be setThierry Reding2014-11-132-2/+0
| | | | | | | | | | | | | | Drivers now no longer need to set the .owner field. It will be automatically set at registration time. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: s6e8aa0: Use standard MIPI DSI functionThierry Reding2014-11-131-14/+2
| | | | | | | | | | | | | | | | Use the newly introduced mipi_dsi_set_maximum_return_packet_size() function to replace an open-coded version. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetricalThierry Reding2014-11-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mipi_dsi_dcs_write() function requires the DCS command byte to be embedded within the write buffer whereas mipi_dsi_dcs_read() has a separate parameter. Make them more symmetrical by adding an extra command parameter to mipi_dsi_dcs_write(). The S6E8AA0 driver relies on the old asymmetric API and there's concern that moving to the new API may be less efficient. Provide a new function with the old semantics for those cases and make the S6E8AA0 driver use it instead. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: s6e8aa0: Fix build warnings on 64-bitThierry Reding2014-11-071-2/+2
| | | | | | | | | | | | | | | | The %* format specifier expects an integer, which works fine with size_t arguments on 32-bit because the types match. However on 64-bit, size_t is typedef'd to unsigned long and will cause a build warning. Signed-off-by: Thierry Reding <treding@nvidia.com>
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