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* drm/nouveau/bsp/g92: disable by defaultIlia Mirkin2017-10-031-1/+1
| | | | | | | | | | | | | | | G92's seem to require some additional bit of initialization before the BSP engine can work. It feels like clocks are not set up for the underlying VLD engine, which means that all commands submitted to the xtensa chip end up hanging. VP seems to work fine though. This still allows people to force-enable the bsp engine if they want to play around with it, but makes it harder for the card to hang by default. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau/mmu: flush tlbs before deleting page tablesBen Skeggs2017-10-031-0/+2
| | | | | | | | | | | Even though we've zeroed the PDE, the GPU may have cached the PD, so we need to flush when deleting them. Noticed while working on replacement MMU code, but a backport might be a good idea, so let's fix it in the current code too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* dmi: Mark all struct dmi_system_id instances constChristoph Hellwig2017-09-141-1/+1
| | | | | | | | | | | | | ... and __initconst if applicable. Based on similar work for an older kernel in the Grsecurity patch. [JD: fix toshiba-wmi build] [JD: add htcpen] [JD: move __initconst where checkscript wants it] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jean Delvare <jdelvare@suse.de>
* drm/nouveau/pci/msi: disable MSI on big-endian platforms by defaultIlia Mirkin2017-08-221-0/+4
| | | | | | | | | | | | | It appears that MSI does not work on either G5 PPC nor on a E5500-based platform, where other hardware is reported to work fine with MSI. Both tests were conducted with NV4x hardware, so perhaps other (or even this) hardware can be made to work. It's still possible to force-enable with config=NvMSI=1 on load. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: stable@vger.kernel.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mpeg: print more debug info when rejecting dma objectsIlia Mirkin2017-08-222-2/+12
| | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gf100-: zero mmu debug buffersBen Skeggs2017-08-221-2/+2
| | | | | | | These are used for accesses to sparse mappings, and we want reads of such mappings to return 0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bar/gf100: add config option to limit BAR2 to 16MiBBen Skeggs2017-08-222-0/+7
| | | | | | | Useful for testing, and for the userspace build where we can't kick a framebuffer driver off the device. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* initial support (display-only) for GP108Ilia Mirkin2017-08-221-0/+30
| | | | | | | | | | | | | | | Forked from GP107 implementation. Secboot/gr left out as we don't have signed blobs from NVIDIA in linux-firmware. (Ben): Was unable to mmiotrace the binary driver for unknown reasons, so not able to 100% confirm that no other changes from GP107 are needed. Quick testing shows it seems to work well enough for display. Due to NVIDIA dragging their heels on getting signed firmware to us, this is the best we can do for now. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101601 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/falcon: use a more reasonable msgqueue timeout valueBen Skeggs2017-08-221-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp: Silence DCB warnings.Rosen Penev2017-08-221-0/+4
| | | | | | | | | | | | | Most of these errors seem to be WFD related. Official documentation says dcb type 8 is reserved. It's probably used for WFD. Silence the warning in either case. Connector type 70 is stated to be a virtual connector for WiFi display. Since we know this, don't warn that we don't. Signed-off by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu/gt215-: abstract detection of whether reset is neededBen Skeggs2017-08-2213-1/+32
| | | | | | GT215, GF100-GP100, and GP10x are all different. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu/gt215: fix resetBen Skeggs2017-08-2210-13/+24
| | | | | | | The NV_PMC_ENABLE bit for PMU did not appear until GF100, and some other unknown register needs to be poked instead. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gf100: add pmu to reset maskBen Skeggs2017-08-221-0/+1
| | | | | | | An upcoming commit will replace direct NV_PMC register bashing from PMU with a call to the proper function. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp/gf119-: avoid creating non-existent headsIlia Mirkin2017-08-221-0/+3
| | | | | | | | | | We assume that each board has 4 heads for GF119+. However this is not necessarily true - in the case of a GP108 board, the register indicated that there were only 2. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101601 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/therm/gm200: AddedKarol Herbst2017-08-225-1/+45
| | | | | | | This allows temperature readouts on maxwell2 GPUs. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/therm: fix spelling mistake on array thresoldsColin Ian King2017-08-221-3/+3
| | | | | | | | | Array thresolds should be named thresholds, rename it. Also make it static static const char * const Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp/nv04: avoid creation of output pathsBen Skeggs2017-08-101-0/+2
| | | | | | | | | Fixes hitting WARN_ON() during initialisation of pre-NV50 GPUs, caused by the recent changes to support pad macro routing on GM20x. We currently don't use them here for older GPUs anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bar/gf100: fix access to upper half of BAR2Ben Skeggs2017-07-251-1/+1
| | | | | | | | | | | | | | | | Bit 30 being set causes the upper half of BAR2 to stay in physical mode, mapped over the end of VRAM, even when the rest of the BAR has been set to virtual mode. We inherited our initial value from RM, but I'm not aware of any reason we need to keep it that way. This fixes severe GPU hang/lockup issues revealed by Wayland on F26. Shout-out to NVIDIA for the quick response with the potential cause! Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org # 4.3+
* drm/nouveau/disp/nv50-: bump max chans to 21Ilia Mirkin2017-07-251-1/+1
| | | | | | | | | | GP102's cursors go from chan 17..20. Increase the array size to hold their data properly. Fixes: e50fcff15f ("drm/nouveau/disp/gp102: fix cursor/overlay immediate channel indices") Cc: stable@vger.kernel.org # v4.10+ Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp: add tv encoders to output resource mappingBen Skeggs2017-07-242-0/+2
| | | | | | | We don't support them on G80, but we need to add them to the mapping to avoid triggering a WARN_ON() on GPUs where the ports are present. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c/gf119-: add support for address-only transactionsBen Skeggs2017-07-247-15/+70
| | | | | | | | | | | | Since switching the I2C-over-AUX helpers, there have been regressions on some display combinations due to us not having support for "address only" transactions. This commits enables support for them for GF119 and newer. Earlier GPUs have been reverted to a custom I2C-over-AUX algorithm. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2017-07-0979-3335/+3874
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ...
| * drm/nouveau/disp/nv50-: avoid creating ORs that aren't present on HWBen Skeggs2017-06-1714-10/+39
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/tegra: Don't leave GPU in resetMikko Perttunen2017-06-161-3/+0
| | | | | | | | | | | | | | | | On Tegra186 systems with certain firmware revisions, leaving the GPU in reset can cause a hang. To prevent this, don't leave the GPU in reset. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/tegra: Skip manual unpowergating when not necessaryMikko Perttunen2017-06-161-4/+6
| | | | | | | | | | | | | | | | | | On Tegra186, powergating is handled by the BPMP power domain provider and the "legacy" powergating API is not available. Therefore skip these calls if we are attached to a power domain. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/gm200-: allow non-identity mapping of SOR <-> macro linksBen Skeggs2017-06-161-2/+2
| | | | | | | | | | | | Finally, everything should be in place to handle this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: implement a common supervisor 3.0Ben Skeggs2017-06-167-333/+34
| | | | | | | | | | | | | | | | This makes use of all the additional routing and state added in previous commits, making it possible to deal with GM20x macro link routing, while also sharing code between the NV50 and GF119 implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: implement a common supervisor 2.2Ben Skeggs2017-06-1625-246/+321
| | | | | | | | | | | | | | | | This makes use of all the additional routing and state added in previous commits, making it possible to deal with GM20x macro link routing, while also sharing code between the NV50 and GF119 implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: implement a common supervisor 2.1Ben Skeggs2017-06-163-21/+11
| | | | | | | | | | | | | | | | This makes use of all the additional routing and state added in previous commits, making it possible to deal with GM20x macro link routing, while also sharing code between the NV50 and GF119 implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: implement a common supervisor 2.0Ben Skeggs2017-06-165-155/+41
| | | | | | | | | | | | | | | | This makes use of all the additional routing and state added in previous commits, making it possible to deal with GM20x macro link routing, while also sharing code between the NV50 and GF119 implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: implement a common supervisor 1.0Ben Skeggs2017-06-163-12/+70
| | | | | | | | | | | | | | | | This makes use of all the additional routing and state added in previous commits, making it possible to deal with GM20x macro link routing, while also sharing code between the NV50 and GF119 implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-gt21x: remove workaround for dp->tmds hotplug issuesBen Skeggs2017-06-161-27/+0
| | | | | | | | | | | | | | | | | | This shouldn't have been needed ever since we started executing the DisableLT script when shutting down heads. Testing of the board this was originally written for seems to agree. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/dp: use new devinit script interpreter entry-pointBen Skeggs2017-06-161-38/+30
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/dp: determine link bandwidth requirements from head stateBen Skeggs2017-06-167-2/+62
| | | | | | | | | | | | | | Training/Untraining will be hooked up to the routing logic, which doesn't allow us to pass in a data rate. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp: introduce acquire/release display path methodsBen Skeggs2017-06-1612-33/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These exist to give NVKM information on the set of display paths that the DD needs to be active at any given time. Previously, the supervisor attempted to determine this solely from OR state, but there's a few configurations where this information on its own isn't enough to determine the specific display paths in question: - ANX9805, where the PIOR protocol for both DP and TMDS is TMDS. - On a device using DCB Switched Outputs. - On GM20x and newer, with a crossbar between the SOR and macro links. After this commit, the DD tells NVKM *exactly* which display path it's attempting a modeset on. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp: remove hw-specific customisation of output pathsBen Skeggs2017-06-1628-342/+36
| | | | | | | | | | | | | | All of the necessary hw-specific logic is now handled at the output resource level, so all of this can go away. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/gf119-: port OR DP VCPI control to nvkm_iorBen Skeggs2017-06-167-14/+16
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/gt215-: port HDA ELD controls to nvkm_iorBen Skeggs2017-06-1620-136/+161
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g94-: port OR DP drive setting control to nvkm_iorBen Skeggs2017-06-1612-143/+66
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g94-: port OR DP training pattern control to nvkm_iorBen Skeggs2017-06-1612-30/+27
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g94-: port OR DP link power control to nvkm_iorBen Skeggs2017-06-1612-43/+17
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g94-: port OR DP link setup to nvkm_iorBen Skeggs2017-06-1612-30/+47
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g94-: port OR DP lane mapping to nvkm_iorBen Skeggs2017-06-169-9/+30
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/g84-: port OR HDMI control to nvkm_iorBen Skeggs2017-06-1629-219/+134
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: port OR manual sink detection to nvkm_iorBen Skeggs2017-06-1617-80/+40
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: port OR power state control to nvkm_iorBen Skeggs2017-06-1630-158/+106
| | | | | | | | | | | | | | Also removes the user-facing methods to these controls, as they're not currently utilised by the DD anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: fetch head/OR state at beginning of supervisorBen Skeggs2017-06-1617-0/+165
| | | | | | | | | | | | | | This data will be used by essentially every part of the supervisor handling process. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/nv50-: execute supervisor on its own workqueueBen Skeggs2017-06-163-3/+10
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/dp: train link only when actively displaying an imageBen Skeggs2017-06-162-10/+6
| | | | | | | | | | | | | | | | This essentially (unless the link becomes unstable and needs to be re-trained) gives us a single entry-point to link training, during supervisor handling, where we can ensure all routing is up to date. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp/dp: only check for re-train when the link is activeBen Skeggs2017-06-164-45/+13
| | | | | | | | | | | | | | | | | | | | An upcoming commit will limit link training to only when the sink is meant to be displaying an image. We still need IRQs enabled even when the link isn't trained (for MST messages), but don't want to train the link unnecessarily. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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