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path: root/drivers/gpu/drm/nouveau/core/engine/vp
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* drm/nouveau: add falcon interrupt handlerMaarten Lankhorst2013-07-102-0/+2
| | | | | | | | This prevents 100% cpu usage on fermi cards when the exit interrupt from the secret scrubber is not acked. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/vp/nv84: initial vp2 engine implementationIlia Mirkin2013-07-011-14/+13
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin2013-07-011-0/+93
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: move falcon class to engine/Ben Skeggs2013-07-012-4/+2
| | | | | | | | Not really "core" per-se. About to merge Ilia's work adding another similar class for the VP2 xtensa engines, so, seems like a good time to move all these to engine/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* nvc0/vp: initial implementation of engineMaarten Lankhorst2012-11-291-0/+110
| | | | | | | Will allow use of the engine if firmware (nvXX_fuc085) provided. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/vdec: remove nouveau_{bsp,vp} base classes, use nouveau_engine ↵Ben Skeggs2012-11-291-95/+13
| | | | | | | | | | | directly Later chipsets use falcon anyway, and I can't currently see a good need for a shared base class. PPP will get the same treatment once Maarten's patches are merged. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nve0/vp: implement initial support for engineBen Skeggs2012-11-291-0/+110
| | | | | | Will allow use of the engine if firmware (nvXX_fuc085) provided. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: port all engines to new engine module formatBen Skeggs2012-10-031-32/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem: completely new implementation, as a subdev moduleBen Skeggs2012-10-031-1/+0
| | | | | | | | v2 (Ben Skeggs): - some fixes for 64KiB PAGE_SIZE - fix porting issues in (currently unused) nv41/nv44 pciegart code Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs2012-10-031-0/+83
Future work will be headed in the way of separating the policy supplied by the nouveau drm module from the mechanisms provided by the driver core. There will be a couple of major classes (subdev, engine) of driver modules that have clearly defined tasks, and the further directory structure change is to reflect this. No code changes here whatsoever, aside from fixing up a couple of include file pathnames. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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