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path: root/drivers/gpu/drm/nouveau/core/engine/device
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* drm/gm107/gr: initial supportBen Skeggs2014-03-261-3/+1
* drm/gf104/gr: rename gf104 (nvc4), it came before gf106 (nvc3)Ben Skeggs2014-03-261-4/+4
* support for platform devicesAlexandre Courbot2014-03-261-5/+78
* drm/gm100/device: recognise GM107Ben Skeggs2014-03-262-0/+110
* drm/gm107/ltcg: initial implementationBen Skeggs2014-03-262-14/+14
* drm/nv50/disp: preparation for storing static class dataBen Skeggs2014-03-268-63/+63
* drm/nv4c/mc: nv4x igp's have a different msi rearm registerIlia Mirkin2014-02-181-5/+5
* drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbiosIlia Mirkin2014-01-231-10/+10
* drm/nouveau/devinit: tidy up the subdev class definitionBen Skeggs2014-01-238-63/+63
* drm/nouveau/instmem: tidy up the subdev class definitionBen Skeggs2014-01-238-63/+63
* drm/nv108/gr: initial support (need external fuc)Ben Skeggs2014-01-231-3/+1
* drm/nv108/ce: enable copy enginesBen Skeggs2014-01-231-1/+1
* drm/nv108/fifo: initial supportBen Skeggs2014-01-231-1/+1
* drm/nvce/mc: fix msi rearm on GF114Sid Boyce2014-01-071-1/+1
* drm/nouveau: populate master subdev pointer only when fully constructedBen Skeggs2014-01-071-0/+2
* drm/nouveau/clk: Add support for NVAA/NVACRoy Spliet2013-12-031-2/+2
* drm/nvc8/mc: msi rearm is via the nvc0 methodBen Skeggs2013-11-141-1/+1
* drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs2013-11-081-5/+5
* drm/nouveau/device: initial control object class, with pstate control methodsBen Skeggs2013-11-083-2/+155
* drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs2013-11-082-15/+15
* drm/nouveau/volt: implement voltage control in coreBen Skeggs2013-11-084-0/+47
* drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs2013-11-085-1/+50
* drm/nouveau/bus: add interfaces/helpers for sequencerBen Skeggs2013-11-081-10/+10
* drm/nouveau/bus: make external class definitions pointersBen Skeggs2013-11-088-63/+63
* drm/nouveau/pwr: initial implementationBen Skeggs2013-11-084-0/+21
* drm/nouveau/fifo: make external class definitions into pointersBen Skeggs2013-11-088-62/+62
* drm/nouveau/device: recognise GK208Ben Skeggs2013-11-082-13/+48
* drm/nv50-nvaf/fb: split the class definitions up a bitBen Skeggs2013-11-081-13/+13
* drm/nouveau/fb: make external class definitions pointersBen Skeggs2013-11-088-62/+62
* drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs2013-11-081-2/+2
* drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs2013-11-083-19/+19
* drm/nouveau/mc: store static data in nouveau_mc class definitionBen Skeggs2013-11-088-62/+62
* drm/nouveau/device: use an additional bit from NV_PMC_BOOT_0 to identify chipsetBen Skeggs2013-11-081-3/+3
* drm/nv44/mpeg: create a copy of the nv31/nv40 implsIlia Mirkin2013-11-081-12/+12
* drm/nv10: fix chipset checks, mostly for the benefit of nv1aIlia Mirkin2013-11-081-1/+1
* drm/nv10: introduce a new NV_11 card typeIlia Mirkin2013-11-081-2/+9
* drm/nouveau/vic: rename PUNK1C1 to PVICBen Skeggs2013-11-081-1/+1
* drm/nouveau/sw: prepare for the sharing of constructors between implementationsBen Skeggs2013-11-088-61/+61
* drm/nvd7/devinit: use fermi class, not teslaBen Skeggs2013-07-051-1/+1
* drm/nvf0/gr: magic sequence that makes PGRAPH come out of hidingBen Skeggs2013-07-051-2/+0
* drm/nvf0/ce: enable supportBen Skeggs2013-07-051-1/+1
* drm/nvf0/fifo: enable supportBen Skeggs2013-07-051-1/+1
* drm/nvd7/gr: initial supportMaarten Lankhorst2013-07-051-1/+1
* drm/nvc0-/gr: make register lists from initvals functionsBen Skeggs2013-07-052-13/+13
* drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin2013-07-011-14/+14
* drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs2013-07-013-16/+16
* drm/nve0/ce: create engine object for ce2Ben Skeggs2013-07-011-0/+3
* drm/nvc0/ce: disable ce1 on a number of chipsetsBen Skeggs2013-05-201-2/+0
* drm/nouveau: fix build with nv50->nvc0Dave Airlie2013-05-201-1/+1
* drm/nve0: recognise nvf0 as a kepler board (GK110)Ben Skeggs2013-05-022-1/+36
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