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| * drm/msm/mdp5: Assign a 'right hwpipe' to plane stateArchit Taneja2017-04-082-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the drm_plane has a source width that's greater than the max width supported by a SSPP (2560 pixels on 8x96), then we assign a 'r_hwpipe' to it in mdp5_plane_atomic_check(). TODO: There are a few scenarios where the hwpipe assignments aren't recommended by HW. For example, an assignment which results in a drm_plane to of two different types of hwpipes (say RGB0 on left and DMA1 on right) is not recommended. Also, hwpipes have a priority mapping, where the higher priority pipe needs to be staged on left LM, and the lower priority needs to be staged on the right LM. For example, the priority order for VIG pipes in decreasing order of priority is VIG0, VIG1, VIG2, and VIG3. So, VIG0 on left and VIG1 on right is a correct configuration, but VIG1 on left and VIG0 on right isn't. These scenarios are ignored for now for the sake of simplicity. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Create mdp5_hwpipe_mode_setArchit Taneja2017-04-081-97/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | Refactor mdp5_plane_mode_set to call mdp5_hwpipe_mode_set. The latter func takes in only the hwpipe and the parameters that need to be programmed into the hwpipe registers. All the code that calculates these parameters is left as is in mdp5_plane_mode_set. In the future, when we let drm_plane be comprised of 2 hwpipes, this func allow us to configure each pipe without adding redundant code. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Add optional 'right' Layer Mixer in CRTC stateArchit Taneja2017-04-084-11/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add another mdp5_hw_mixer pointer (r_mixer) in mdp5_crtc_state. This mixer will be used to generate the right half of the scanout. With Source Split, a SSPP can now be connected to 2 Layer Mixers, but has to be at the same blend level (stage #) on both Layer Mixers. A drm_plane that has a lesser width than the max width supported, will comprise of a single SSPP/hwpipe, staged on both the Layer Mixers at the same blend level. A plane that is greater than max width will comprise of 2 SSPPs, with the 'left' SSPP staged on the left LM, and the 'right' SSPP staged on the right LM at the same blend level. For now, the drm_plane consists of only one SSPP, therefore, it needs to be staged on both the LMs in blend_setup() and mdp5_ctl_blend(). We'll extend this logic to support 2 hwpipes per plane later. The crtc cursor ops (using the LM cursors, not SSPP cursors) simply return an error if they're called when the right mixer is assigned to the CRTC state. With source split is enabled, we're expected to only SSPP cursors. This commit adds code that configures the right mixer, but the r_mixer itself isn't assigned at the moment. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Add a CAP for Source SplitArchit Taneja2017-04-082-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the newer MDP5 versions support Source Split of SSPPs. It is a feature that allows us to route the output of a hwpipe to 2 Layer Mixers. This is required to achieve the following use cases: - Dual DSI: For high res DSI panels (such as 2560x1600 etc), a single DSI interface doesn't have the bandwidth to drive the required pixel clock. We use 2 DSI interfaces to drive the left and right halves of the panel (i.e, 1280x1600 each). The MDP5 pipeline here would look like: LM0 -- DSPP0 -- INTF1 -- DSI1 / hwpipe-- \ LM1 -- DSPP1 -- INTF2 -- DSI2 A single hwpipe is used to scan out the left and right halves to DSI1 and DSI2 respectively. In order to do this, we need to configure the 2 Layer Mixers in Source Split mode. - HDMI 4K: In order to support resolutions with width higher than the max width supported by a hwpipe, we club 2 hwpipes together: hwpipe1 --- LM0 -- DSPP0 - - \ - -- 3D Mux -- INTF0 -- HDMI - - / hwpipe2 --- LM1 -- DSPP1 hwpipe1 is staged on the 'left' Layer Mixer, and hwpipe2 is staged on the 'right' Layer Mixer. An additional block called the '3D Mux' is used to merge the output of the 2 DSPPs to a single interface. In this use case, it is possible that a 4K surface is downscaled and placed completely within one of the halves. In order to support such scenarios (and keep the programming simple), Layer Mixers with Source Split can be assigned 2 hw pipes per stage. While scanning out, the HW takes care of fetching the pixels fom the correct pipe. Add a MDP cap to tell whether the HW supports source split or not. Add a MDP LM cap that tells whether a LM instance can operate in source split mode (and generate the 'left' part of the display output). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Remove mixer/intf pointers from mdp5_ctlArchit Taneja2017-04-087-63/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | These are a part of CRTC state, it doesn't feel nice to leave them hanging in mdp5_ctl struct. Pass mdp5_pipeline pointer instead wherever it is needed. We still have some params in mdp5_ctl like start_mask etc which are derivative of atomic state, and should be rolled back if a commit fails, but it doesn't seem to cause much trouble. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Start using parameters from CRTC stateArchit Taneja2017-04-083-66/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the last few commits, we've been adding params to mdp5_crtc_state, and assigning them in the atomic_check() funcs. Now it's time to actually start using them. Remove the duplicated params from the mdp5_crtc struct, and start using them in the mdp5_crtc code. The majority of the references to these params is in code that executes after the atomic swap has occurred, so it's okay to use crtc->state in them. There are a couple of legacy LM cursor ops that may not use the updated state, but (I think) it's okay to live with that. Now that we dynamically allocate a mixer to the CRTC, we can also remove the static assignment to it in mdp5_crtc_init, and also drop the code that skipped init-ing WB bound mixers (those will now be rejected by mdp5_mixer_assign()). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Add more stuff to CRTC stateArchit Taneja2017-04-082-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | Things like vblank/err irq masks, mode of operation (command mode or not) are derivative of the interface and mixer state. Therefore, they need to be a part of the CRTC state too. Add them to mdp5_crtc_state, and assign them in the CRTC's atomic_check() func, so that it can be rolled back to a clean state. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Assign INTF and CTL in encoder's atomic_check()Archit Taneja2017-04-081-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The INTF and CTL used in a display pipeline are going to be maintained as a part of the CRTC state (i.e, in mdp5_crtc_state). These entities, however, are currently statically assigned to drm_encoders (i.e. mdp5_encoder). Since these aren't directly visible to the CRTC, we assign them to the CRTC state in the encoder's atomic_check() op. With this approach, we assign portions of CRTC state in two different places: the layer mixer in CRTC's atomic_check(), and the INTF and CTL pieces in the encoder's atomic_check() op. We'd have more options here if the drm core maintained encoder state too, but the current approach of clubbing everything in CRTC's state works just fine. Unlike hwpipes and mixers, we don't need to keep a track of INTF/CTL assignments in the global atomic state. This is because they're currently not sharable resources. For example, INTF0 and CTL0 will always be assigned to one drm_encoder. This can change later when we implement writeback and want a CRTC to use a CTL for a while, and then release it for others to use it. Or, when a drm_encoder can switch between using a single INTF vs 2 INTFs. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Prepare for dynamic assignment of mixersArchit Taneja2017-04-085-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the stuff needed to allow dynamically assigning a mixer to a CRTC. Since mixers are a resource that can be shared across multiple CRTCs, we need to maintain a 'hwmixer_to_crtc' map in the global atomic state, acquire the mdp5_kms.state_lock modeset lock and so on. The mixer is assigned in the CRTC's atomic_check() func, a failure will result in the new state being cleanly rolled back. The mixer assignment itself is straightforward, and almost identical to what we do for hwpipes. We don't need to grab the old hwmixer_to_crtc state like we do in hwpipes since we don't need to compare anything with the old state at the moment. The only LM capability we care about at the moment is whether the mixer instance can be used to display stuff (i.e, connect to an INTF downstream). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: subclass CRTC stateArchit Taneja2017-04-082-6/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Subclass drm_crtc_state so that we can maintain additional state for our CRTCs. Add mdp5_pipeline and mdp5_ctl pointers in the subclassed state. mdp5_pipeline is a grouping of the HW entities that forms the downstream pipeline for a particular CRTC. It currently contains pointers to mdp5_interface and mdp5_hw_mixer tied to this CRTC. Later, we will have 2 hwmixers in this struct. (We could also have 2 intfs if we want to support dual DSI with Source Split enabled. Implementing that feature isn't planned at the moment). The mdp5_pipeline state isn't used at the moment. For now, we just introduce mdp5_crtc_state and the crtc funcs needed to manage the subclassed state. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Remove the pipeline stuff in mdp5_ctlArchit Taneja2017-04-081-25/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mdp5_ctl has an 'op_mode' struct which contains info on the downstream pipeline. Grouping these params together in a struct doesn't serve much purpose in the code. Maybe there was a plan to expand this further that never happened. Remove the op_mode struct, and place its members directly in mdp5_ctl. This will help avoid confusion later when I introduce my own verion of a mdp5 pipeline :) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Clean up interface assignmentArchit Taneja2017-04-085-64/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mdp5_interface struct contains data corresponding to a INTF instance in MDP5 hardware. This sturct is memcpy'd to the mdp5_encoder struct, and then later to the mdp5_ctl struct. Instead of copying around interface data, create mdp5_interface instances in mdp5_init, like how it's done currently done for pipes and layer mixers. Pass around the interface pointers to mdp5_encoder and mdp5_ctl. This simplifies the code, and allows us to decouple encoders from INTFs in the future if needed. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Simplify LM <-> PP mappingArchit Taneja2017-04-084-12/+11
| | | | | | | | | | | | | | | | | | | | PingPong ID for a Layer Mixer is already contained in mdp5_hw_mixer. This avoids the need to retrieve PP ID using macros Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Start using mdp5_hw_mixerArchit Taneja2017-04-088-43/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | Use the mdp5_hw_mixer struct in the mdp5_crtc and mdp5_ctl instead of using the LM index. Like before, the Layer Mixers are assigned statically to the CRTCs. The hwmixer(s) will later be dynamically assigned to CRTCs. For now, ignore the hwmixers that can only do WB. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Add structs for hw Layer MixersArchit Taneja2017-04-085-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | Create a struct to represent MDP5 Layer Mixer instances. This will eventually allow us to detach CRTCs from the Layer Mixers, and generally clean things up a bit. This is very similar to how hwpipes were previously abstracted away from drm planes. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: describe LM instances in mdp5_cfgArchit Taneja2017-04-083-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of Layer Mixers and the downstream blocks (DSPPs and PPs) connected to each LM can vary with different MDP5 revisions. These parameters are also static. Keep the per instance LM data in mdp5_cfg. This will avoid the need to have macros which identify PP id or DSPP id the LM is connected to. We don't configure DSPPs at the moment, but keeping the DSPP instance # here might come handy later. Also add a 'caps' field that identifies features supported by a LM instance. Introduce the caps MDP_LM_CAP_DISPLAY and MDP_LM_CAP_WB that identify whether a LM instance can be used for display or writeback. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Bring back pipe_lock to mdp5_plane structArchit Taneja2017-04-083-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | We'd previously moved the pipe_lock spinlock to the hwpipe struct. Bring it back to mdp5_plane. We will need this because an mdp5_plane in the future could comprise of 2 hw pipes. It makes more sense to have a single lock to protect the registers for the hw pipes used by a plane, rather than trying to take individual locks per hwpipe when committing a configuration. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/hdmi: redefinitions of macros not requiredVinay Simha BN2017-04-081-7/+0
| | | | | | | | | | | | | | | | 4 macros already defined in hdmi.h, which is not required to redefine in hdmi_audio.c Signed-off-by: Vinay Simha BN <simhavcs@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Update SSPP_MAX valueArchit Taneja2017-04-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | 'SSPP_MAX + 1' is the max number of hwpipes that can be present on a MDP5 platform. Recently, 2 new cursor hwpipes were added, which caused overflows in arrays that used SSPP_MAX to represent the number of elements. Update the SSPP_MAX value to incorporate the extra hwpipes. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/dsi: Fix bug in dsi_mgr_phy_enableArchit Taneja2017-04-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent commit introduces a bug in dsi_mgr_phy_enable. In the non dual DSI mode, we reset the mdsi (master DSI) PHY. This isn't right since master and slave DSI exist only in dual DSI mode. For the normal mode of operation, we should simply reset the PHY of the DSI device (i.e. msm_dsi) corresponding to the current bridge. Usage of the wrong DSI pointer also resulted in a static checker warning. That too is resolved with this fix. Fixes: b62aa70a98c5 (drm/msm/dsi: Move PHY operations out of host) Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Don't allow zero sized buffer objectsJordan Crouse2017-04-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zero sized buffer objects tend to make various bits of the GEM infrastructure complain: WARNING: CPU: 1 PID: 2323 at drivers/gpu/drm/drm_mm.c:389 drm_mm_insert_node_generic+0x258/0x2f0 Modules linked in: CPU: 1 PID: 2323 Comm: drm-api-test Tainted: G W 4.9.0-rc4-00906-g693af44 #213 Hardware name: Qualcomm Technologies, Inc. DB820c (DT) task: ffff8000d7353400 task.stack: ffff8000d7720000 PC is at drm_mm_insert_node_generic+0x258/0x2f0 LR is at drm_vma_offset_add+0x4c/0x70 Zero sized buffers serve no appreciable value to the user so disallow them at create time. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Support 64 bit iova in RD_CMDSTREAM_ADDRJordan Crouse2017-04-081-2/+2
| | | | | | | | | | | | | | | | | | Output the upper 32 bits of a 64 bit iova in the RD_CMDSTREAM_ADDR section while maintaining backwards compatibility for tools that only understand 32 bit iovas. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Pass interrupt status to a5xx_rbbm_err_irq()Jordan Crouse2017-04-081-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupt status was being cleared before processing the handlers. a5xx_rbbm_err_irq() was checking the interrupt status again, which would likely turn out bad because the interrupt status would be 0 (or at least different). Pass the original status to the function instead. Also, skip clearing RBBM_AHB_ERROR from the interrupt status. The interrupt will keep firing until the error source is cleared. Skip the clear to avoid a storm until the error is cleared in a5xx_rbbm_err_irq(). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Don't increase priv->num_aspaces until we know that it fitsJordan Crouse2017-04-081-4/+3
| | | | | | | | | | | | | | | | | | | | | | priv->num_aspaces is increased and then checked to see if it still fits in the priv->aspace array. If it doesn't, we warn and exit but priv->num_aspaces remains incremented. Don't incremement the count until we know that it fits in the array. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Fix wrong pointer check in a5xx_destroyJordan Crouse2017-04-081-2/+2
| | | | | | | | | | | | | | | | Instead of checking for a5xx_gpu->gpmu_iova during destroy we accidently check a5xx_gpu->gpmu_bo. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Simplify vblank event deliveryDaniel Vetter2017-04-082-18/+6
| | | | | | | | | | | | | | | | | | | | | | The core takes care of handling the send_event vs. close() issues, we can remove that driver code. Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: switch to postcloseDaniel Vetter2017-04-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | I didn't spot anything that would require ordering here (well not anywhere else either), and I'm trying to unify at least modern drivers on one close hook. Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: adreno: fix build error without debugfsArnd Bergmann2017-04-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly added a5xx support fails to build when debugfs is diabled: drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has no member named 'show' drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared here (not in a function); did you mean 'a5xx_irq'? This adds a missing #ifdef. Fixes: b5f103ab98c7 ("drm/msm: gpu: Add A5XX target support") Cc: stable@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: move submit fence wait out of struct_mutexRob Clark2017-04-081-21/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probably a symptom of needing finer grained locking, but if we wait on the incoming fence-fd (which could come from a different context) while holding struct_mutex, that blocks retire_worker so gpu fences cannot get signalled. This causes a problem if userspace manages to get more than a frame ahead, leaving the atomic-commit worker blocked waiting on fences that cannot be signaled because submit is blocked waiting for a fence signalled from vblank (after the atomic commit which is blocked). If we start having multiple fence ctxs for the gpu, submit_fence_sync() would probably need to move outside of struct_mutex as well. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: pm runtime support for iommuRob Clark2017-04-081-1/+14
| | | | | | | | | | | | | | In particular, attach() and unmap() need pm-runtime get/put to ensure iommu clks are enabled. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: convert to iommu_map_sgRob Clark2017-04-081-49/+5
| | | | | | | | | | | | | | | | | | | | Significantly simplifies things. Also iommu_unmap() can unmap an entire iova range. (If backporting to downstream kernel you might need to revert this. Or at least double check older iommu implementation.) Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/adreno: reset ringbuffer in hw_initRob Clark2017-04-081-10/+8
| | | | | | | | | | | | We need to do this also in resume path when we need to re-hw_init(). Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/gpu: use pm-runtimeRob Clark2017-04-086-93/+71
| | | | | | | | | | | | | | We need to use pm-runtime properly when IOMMU is using device_link() to control it's own clocks. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/gpu: move suspend/resume into debugfs->showRob Clark2017-04-085-14/+2
| | | | | | | | | | | | | | Each of the per-generation callbacks was doing this. Lets just simplify and move it into toplevel show() fxn. Signed-off-by: Rob Clark <robdclark@gmail.com>
* | Merge tag 'drm-misc-next-2017-04-07' of ↵Dave Airlie2017-04-112-28/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next Last drm-misc-next pull req for 4.12 Core changes: - fb_helper checkpatch cleanup and simplified _add_one_connector() (Thierry) - drm_ioctl and drm_sysfs improved/gained documentation (Daniel) - [ABI] Repurpose reserved field in drm_event_vblank for crtc_id (Ander) - Plumb acquire ctx through legacy paths to avoid lock_all and legacy_backoff (Daniel) - Add connector_atomic_check to check conn constraints on modeset (Maarten) - Add drm_of_find_panel_or_bridge to remove boilerplate in drivers (Rob) Driver changes: - meson moved to drm-misc (Neil) - Added support for Amlogic GX SoCs in dw-hdmi (Neil) - Rockchip unbind actually cleans up the things bind initializes (Jeffy) - A couple misc fixes in virtio, dw-hdmi NOTE: this also includes a backmerge of drm-next as well rc5 (we needed vmwgfx as well as the new synopsys media formats) * tag 'drm-misc-next-2017-04-07' of git://anongit.freedesktop.org/git/drm-misc: (77 commits) Revert "drm: Don't allow interruptions when opening debugfs/crc" drm: Only take cursor locks when the cursor plane exists drm/vmwgfx: Fix fbdev emulation using legacy functions drm/rockchip: Shutdown all crtcs when unbinding drm drm/rockchip: Reorder drm bind/unbind sequence drm/rockchip: analogix_dp: Disable clock when unbinding drm/rockchip: vop: Unprepare clocks when unbinding drm/rockchip: vop: Enable pm domain before vop_initial drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding drm/rockchip: cdn-dp: Don't try to release firmware when not loaded drm: bridge: analogix: Destroy connector & encoder when unbinding drm: bridge: analogix: Disable clock when unbinding drm: bridge: analogix: Unregister dp aux when unbinding drm: bridge: analogix: Detach panel when unbinding analogix dp drm: Don't allow interruptions when opening debugfs/crc drm/virtio: don't leak bo on drm_gem_object_init failure drm: bridge: dw-hdmi: fix input format/encoding from plat_data drm: omap: use common OF graph helpers drm: convert drivers to use drm_of_find_panel_or_bridge drm: convert drivers to use of_graph_get_remote_node ...
| * | drm: convert drivers to use of_graph_get_remote_nodeRob Herring2017-04-062-28/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert drivers to use the new of_graph_get_remote_node() helper instead of parsing the endpoint node and then getting the remote device node. Now drivers can just specify the device node and which port/endpoint and get back the connected remote device node. The details of the graph binding are nicely abstracted into the core OF graph code. This changes some error messages to debug messages (in the graph core). Graph connections are often "no connects" depending on the particular board, so we want to avoid spurious messages. Plus the kernel is not a DT validator. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Liviu Dudau <liviu.dudau@arm.com> Tested-by: Eric Anholt <eric@anholt.net> Tested-by: Jyri Sarha <jsarha@ti.com> Tested by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
* | Backmerge tag 'v4.11-rc6' into drm-nextDave Airlie2017-04-117-24/+32
|\ \ | |/ |/| | | | | | | Linux 4.11-rc6 drm-misc needs 4.11-rc5, may as well fix conflicts with rc6.
| * drm/msm: Make sure to detach the MMU during GPU cleanupJordan Crouse2017-04-032-13/+19
| | | | | | | | | | | | | | | | | | | | | | We should be detaching the MMU before destroying the address space. To do this cleanly, the detach has to happen in adreno_gpu_cleanup() because it needs access to structs in adreno_gpu.c. Plus it is better symmetry to have the attach and detach at the same code level. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/hdmi: redefinitions of macros not requiredVinay Simha BN2017-04-031-7/+0
| | | | | | | | | | | | | | | | 4 macros already defined in hdmi.h, which is not required to redefine in hdmi_audio.c Signed-off-by: Vinay Simha BN <simhavcs@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: Update SSPP_MAX valueArchit Taneja2017-04-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | 'SSPP_MAX + 1' is the max number of hwpipes that can be present on a MDP5 platform. Recently, 2 new cursor hwpipes were added, which caused overflows in arrays that used SSPP_MAX to represent the number of elements. Update the SSPP_MAX value to incorporate the extra hwpipes. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/dsi: Fix bug in dsi_mgr_phy_enableArchit Taneja2017-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent commit introduces a bug in dsi_mgr_phy_enable. In the non dual DSI mode, we reset the mdsi (master DSI) PHY. This isn't right since master and slave DSI exist only in dual DSI mode. For the normal mode of operation, we should simply reset the PHY of the DSI device (i.e. msm_dsi) corresponding to the current bridge. Usage of the wrong DSI pointer also resulted in a static checker warning. That too is resolved with this fix. Fixes: b62aa70a98c5 (drm/msm/dsi: Move PHY operations out of host) Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Don't allow zero sized buffer objectsJordan Crouse2017-04-031-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zero sized buffer objects tend to make various bits of the GEM infrastructure complain: WARNING: CPU: 1 PID: 2323 at drivers/gpu/drm/drm_mm.c:389 drm_mm_insert_node_generic+0x258/0x2f0 Modules linked in: CPU: 1 PID: 2323 Comm: drm-api-test Tainted: G W 4.9.0-rc4-00906-g693af44 #213 Hardware name: Qualcomm Technologies, Inc. DB820c (DT) task: ffff8000d7353400 task.stack: ffff8000d7720000 PC is at drm_mm_insert_node_generic+0x258/0x2f0 LR is at drm_vma_offset_add+0x4c/0x70 Zero sized buffers serve no appreciable value to the user so disallow them at create time. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: Fix wrong pointer check in a5xx_destroyJordan Crouse2017-04-031-2/+2
| | | | | | | | | | | | | | | | Instead of checking for a5xx_gpu->gpmu_iova during destroy we accidently check a5xx_gpu->gpmu_bo. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: adreno: fix build error without debugfsArnd Bergmann2017-04-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly added a5xx support fails to build when debugfs is diabled: drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has no member named 'show' drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared here (not in a function); did you mean 'a5xx_irq'? This adds a missing #ifdef. Fixes: b5f103ab98c7 ("drm/msm: gpu: Add A5XX target support") Cc: stable@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm: Add acquire ctx parameter to ->update_planeDaniel Vetter2017-03-291-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Just rolling it out, no code change here. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Rob Clark <robdclark@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-3-daniel.vetter@ffwll.ch
* | drm/msm: add stubs for msm_{perf,rd}_debugfs_cleanupArnd Bergmann2017-03-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now call those two functions even when they are not defined or declared anywhere because DEBUG_FS is disabled: drivers/gpu/drm/msm/msm_drv.c: In function 'msm_drm_uninit': drivers/gpu/drm/msm/msm_drv.c:244:2: error: implicit declaration of function 'msm_perf_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] drivers/gpu/drm/msm/msm_drv.c:245:2: error: implicit declaration of function 'msm_rd_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] This adds empty stub implementations for that case. Fixes: 85eac4700ede ("drm/msm: Remove msm_debugfs_cleanup()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170320093936.1255573-1-arnd@arndb.de
* | Merge tag 'doc-4.11-images' of git://git.lwn.net/linux into drm-misc-nextDaniel Vetter2017-03-142-3/+4
|\ \ | |/ | | | | | | | | | | | | Pointer for Markus's image conversion work. We need this so we can merge all the pretty drm graphs for 4.12. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
| * mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmfDave Jiang2017-02-242-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ->fault(), ->page_mkwrite(), and ->pfn_mkwrite() calls do not need to take a vma and vmf parameter when the vma already resides in vmf. Remove the vma parameter to simplify things. [arnd@arndb.de: fix ARM build] Link: http://lkml.kernel.org/r/20170125223558.1451224-1-arnd@arndb.de Link: http://lkml.kernel.org/r/148521301778.19116.10840599906674778980.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com> Cc: Theodore Ts'o <tytso@mit.edu> Cc: Darrick J. Wong <darrick.wong@oracle.com> Cc: Matthew Wilcox <mawilcox@microsoft.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * Merge tag 'drm-for-v4.11-less-shouty' of ↵Linus Torvalds2017-02-2352-551/+2725
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.11. Nothing too major, the tinydrm and mmu-less support should make writing smaller drivers easier for some of the simpler platforms, and there are a bunch of documentation updates. Intel grew displayport MST audio support which is hopefully useful to people, and FBC is on by default for GEN9+ (so people know where to look for regressions). AMDGPU has a lot of fixes that would like new firmware files installed for some GPUs. Other than that it's pretty scattered all over. I may have a follow up pull request as I know BenH has a bunch of AST rework and fixes and I'd like to get those in once they've been tested by AST, and I've got at least one pull request I'm just trying to get the author to fix up. Core: - drm_mm reworked - Connector list locking and iterators - Documentation updates - Format handling rework - MMU-less support for fbdev helpers - drm_crtc_from_index helper - Core CRC API - Remove drm_framebuffer_unregister_private - Debugfs cleanup - EDID/Infoframe fixes - Release callback - Tinydrm support (smaller drivers for simple hw) panel: - Add support for some new simple panels i915: - FBC by default for gen9+ - Shared dpll cleanups and docs - GEN8 powerdomain cleanup - DMC support on GLK - DP MST audio support - HuC loading support - GVT init ordering fixes - GVT IOMMU workaround fix amdgpu/radeon: - Power/clockgating improvements - Preliminary SR-IOV support - TTM buffer priority and eviction fixes - SI DPM quirks removed due to firmware fixes - Powerplay improvements - VCE/UVD powergating fixes - Cleanup SI GFX code to match CI/VI - Support for > 2 displays on 3/5 crtc asics - SI headless fixes nouveau: - Rework securre boot code in prep for GP10x secure boot - Channel recovery improvements - Initial power budget code - MMU rework preperation vmwgfx: - Bunch of fixes and cleanups exynos: - Runtime PM support for MIC driver - Cleanups to use atomic helpers - UHD Support for TM2/TM2E boards - Trigger mode fix for Rinato board etnaviv: - Shader performance fix - Command stream validator fixes - Command buffer suballocator rockchip: - CDN DisplayPort support - IOMMU support for arm64 platform imx-drm: - Fix i.MX5 TV encoder probing - Remove lower fb size limits msm: - Support for HW cursor on MDP5 devices - DSI encoder cleanup - GPU DT bindings cleanup sti: - stih410 cleanups - Create fbdev at binding - HQVDP fixes - Remove stih416 chip functionality - DVI/HDMI mode selection fixes - FPS statistic reporting omapdrm: - IRQ code cleanup dwi-hdmi bridge: - Cleanups and fixes adv-bridge: - Updates for nexus sii8520 bridge: - Add interlace mode support - Rework HDMI and lots of fixes qxl: - probing/teardown cleanups ZTE drm: - HDMI audio via SPDIF interface - Video Layer overlay plane support - Add TV encoder output device atmel-hlcdc: - Rework fbdev creation logic tegra: - OF node fix fsl-dcu: - Minor fixes mali-dp: - Assorted fixes sunxi: - Minor fix" [ This was the "fixed" pull, that still had build warnings due to people not even having build tested the result. I'm not a happy camper I've fixed the things I noticed up in this merge. - Linus ] * tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlied/linux: (1177 commits) lib/Kconfig: make PRIME_NUMBERS not user selectable drm/tinydrm: helpers: Properly fix backlight dependency drm/tinydrm: mipi-dbi: Fix field width specifier warning drm/tinydrm: mipi-dbi: Silence: ‘cmd’ may be used uninitialized drm/sti: fix build warnings in sti_drv.c and sti_vtg.c files drm/amd/powerplay: fix PSI feature on Polars12 drm/amdgpu: refuse to reserve io mem for split VRAM buffers drm/ttm: fix use-after-free races in vm fault handling drm/tinydrm: Add support for Multi-Inno MI0283QT display dt-bindings: Add Multi-Inno MI0283QT binding dt-bindings: display/panel: Add common rotation property of: Add vendor prefix for Multi-Inno drm/tinydrm: Add MIPI DBI support drm/tinydrm: Add helper functions drm: Add DRM support for tiny LCD displays drm/amd/amdgpu: post card if there is real hw resetting performed drm/nouveau/tmr: provide backtrace when a timeout is hit drm/nouveau/pci/g92: Fix rearm drm/nouveau/drm/therm/fan: add a fallback if no fan control is specified in the vbios drm/nouveau/hwmon: expose power_max and power_crit ..
| * \ Merge branch 'locking-core-for-linus' of ↵Linus Torvalds2017-02-201-1/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking updates from Ingo Molnar: "The main changes in this cycle were: - Implement wraparound-safe refcount_t and kref_t types based on generic atomic primitives (Peter Zijlstra) - Improve and fix the ww_mutex code (Nicolai Hähnle) - Add self-tests to the ww_mutex code (Chris Wilson) - Optimize percpu-rwsems with the 'rcuwait' mechanism (Davidlohr Bueso) - Micro-optimize the current-task logic all around the core kernel (Davidlohr Bueso) - Tidy up after recent optimizations: remove stale code and APIs, clean up the code (Waiman Long) - ... plus misc fixes, updates and cleanups" * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (50 commits) fork: Fix task_struct alignment locking/spinlock/debug: Remove spinlock lockup detection code lockdep: Fix incorrect condition to print bug msgs for MAX_LOCKDEP_CHAIN_HLOCKS lkdtm: Convert to refcount_t testing kref: Implement 'struct kref' using refcount_t refcount_t: Introduce a special purpose refcount type sched/wake_q: Clarify queue reinit comment sched/wait, rcuwait: Fix typo in comment locking/mutex: Fix lockdep_assert_held() fail locking/rtmutex: Flip unlikely() branch to likely() in __rt_mutex_slowlock() locking/rwsem: Reinit wake_q after use locking/rwsem: Remove unnecessary atomic_long_t casts jump_labels: Move header guard #endif down where it belongs locking/atomic, kref: Implement kref_put_lock() locking/ww_mutex: Turn off __must_check for now locking/atomic, kref: Avoid more abuse locking/atomic, kref: Use kref_get_unless_zero() more locking/atomic, kref: Kill kref_sub() locking/atomic, kref: Add kref_read() locking/atomic, kref: Add KREF_INIT() ...
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