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path: root/drivers/gpu/drm/msm/dsi/pll
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* drm/msm/dsi: Populate PLL 10nm clock opsArchit Taneja2018-02-201-8/+654
* drm/msm/dsi: Add skeleton 10nm PHY/PLL codeArchit Taneja2018-02-203-0/+188
* drm/msm/dsi: check for failure on retrieving pll in dsi managerLloyd Atkinson2018-02-201-1/+1
* clk: divider: fix incorrect usage of container_ofJerome Brunet2017-12-281-1/+1
* drm/msm/dsi: Add PHY/PLL for 8x96Archit Taneja2017-02-063-0/+1127
* drm/msm: Set CLK_IGNORE_UNUSED flag for PLL clocksArchit Taneja2016-11-022-0/+2
* drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()Luis Henriques2016-03-031-2/+2
* drm/msm/dsi: Add DSI PLL for 28nm 8960 PHYArchit Taneja2015-12-143-0/+546
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2015-09-043-36/+46
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| * drm/msm/dsi: Make each PHY type compilation independentHai Li2015-08-151-0/+8
| * drm/msm/dsi: Save/Restore PLL status across PHY resetHai Li2015-08-153-36/+38
* | drm/msm/dsi: Convert to clk_hw based provider APIsStephen Boyd2015-08-241-2/+2
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* drm/msm/dsi: Add DSI PLL clock driver supportHai Li2015-06-113-0/+905
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