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path: root/drivers/gpu/drm/i915
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* Merge branch 'fbcon-locking-fixes' of ssh://people.freedesktop.org/~airlied/l...Dave Airlie2013-02-088-26/+105
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| * drm/i915: dump UTS_RELEASE into the error_stateDaniel Vetter2013-01-231-0/+2
| * drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waitsChris Wilson2013-01-231-0/+5
| * drm/i915: Disable AsyncFlip performance optimisationsChris Wilson2013-01-232-6/+14
| * Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-in...Dave Airlie2013-01-217-20/+84
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| | * drm/i915: fix FORCEWAKE posting readsJani Nikula2013-01-171-5/+12
| | * drm/i915: Invalidate the relocation presumed_offsets along the slow pathChris Wilson2013-01-161-0/+21
| | * drm/i915/eDP: do not write power sequence registers for ghost eDPJani Nikula2013-01-161-15/+32
| | * drm/i915: Record DERRMR, FORCEWAKE and RING_CTL in error-stateChris Wilson2013-01-154-0/+19
* | | Merge tag 'drm-intel-next-2013-02-01' of git://people.freedesktop.org/~danvet...Dave Airlie2013-02-0829-1662/+2165
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| * | | GPU/i915: Fix acpi_bus_get_device() check in drivers/gpu/drm/i915/intel_opreg...Yasuaki Ishimatsu2013-02-011-1/+1
| * | | drm/i915: Set the SR01 "screen off" bit in i915_redisable_vga() tooVille Syrjälä2013-01-311-2/+1
| * | | drm/i915: Kill IS_DISPLAYREG()Ville Syrjälä2013-01-311-103/+1
| * | | drm/i915: Introduce i915_vgacntrl_reg()Ville Syrjälä2013-01-314-20/+16
| * | | drm/i915: gen6_gmch_remove can be staticChanglong Xie2013-01-311-1/+1
| * | | drm/i915: dynamic Haswell display power well supportDaniel Vetter2013-01-312-1/+38
| * | | drm/i915: check the power down well on assert_pipe()Paulo Zanoni2013-01-311-3/+9
| * | | drm/i915: don't send DP "idle" pattern before "normal" on HSW PORT_APaulo Zanoni2013-01-311-6/+10
| * | | drm/i915: don't run hsw power well code on !hswDaniel Vetter2013-01-311-0/+3
| * | | drm/i915: kill cargo-culted locking from power well codeDaniel Vetter2013-01-311-4/+0
| * | | drm/i915: Only run idle processing from i915_gem_retire_requests_workerChris Wilson2013-01-313-14/+4
| * | | drm/i915: Fix CAGF for HSWBen Widawsky2013-01-312-3/+9
| * | | drm/i915: Reclaim GTT space for failed PPGTTBen Widawsky2013-01-311-17/+16
| * | | drm/i915: remove intel_gtt structureBen Widawsky2013-01-313-30/+11
| * | | drm/i915: Add probe and remove to the gtt opsBen Widawsky2013-01-313-79/+114
| * | | drm/i915: extract hw ppgtt setup/cleanup codeDaniel Vetter2013-01-312-24/+45
| * | | drm/i915: pte_encode is gen6+Daniel Vetter2013-01-311-10/+14
| * | | drm/i915: vfuncs for ppgttDaniel Vetter2013-01-312-56/+65
| * | | drm/i915: vfuncs for gtt_clear_range/insert_entriesDaniel Vetter2013-01-312-59/+83
| * | | drm/i915: Error state should print /sys/kernel/debugBen Widawsky2013-01-311-1/+2
| * | | drm/i915: move DP save/restore into i915_ums.cDaniel Vetter2013-01-312-28/+25
| * | | drm/i915: dont save/restore VGA state for kmsDaniel Vetter2013-01-313-23/+28
| * | | drm/i915: extract ums suspend/resume into i915_ums.cDaniel Vetter2013-01-314-452/+485
| * | | drm/i915: move modeset checks out of save/restore_modeset_regDaniel Vetter2013-01-281-23/+15
| * | | drm/i915: Implement WaVSRefCountFullforceMissDisableBen Widawsky2013-01-282-0/+5
| * | | drm/i915: turn on the power well before suspendingPaulo Zanoni2013-01-283-1/+4
| * | | drm/i915: set TRANSCODER_EDP even earlierPaulo Zanoni2013-01-281-5/+5
| * | | drm/i915: only disable enabled planes on intel_fb_restore_modePaulo Zanoni2013-01-261-1/+2
| * | | drm/i915: fix intel_init_power_wellsPaulo Zanoni2013-01-264-26/+46
| * | | drm/i915: SWF screatch registers need an offset on VLVVille Syrjälä2013-01-261-13/+13
| * | | drm/i915: Include display_mmio_offset in sequencer index/data registersVille Syrjälä2013-01-261-2/+8
| * | | drm/i915: Pass VLV_DISPLAY_BASE + reg to intel_{hdmi, dp}_init on VLVVille Syrjälä2013-01-261-8/+8
| * | | drm/i915: VLV doesn't have SDVOVille Syrjälä2013-01-261-7/+2
| * | | drm/i915: Always use adpa_regVille Syrjälä2013-01-261-14/+15
| * | | drm/i915: PLL registers need an offset on VLVVille Syrjälä2013-01-261-4/+4
| * | | drm/i915: Set display_mmio_offset for VLVVille Syrjälä2013-01-241-0/+2
| * | | drm/i915: GPIO/GMBUS registers need an offset on VLVVille Syrjälä2013-01-241-0/+2
| * | | drm/i915: DPIO registers are VLV only and need an offsetVille Syrjälä2013-01-241-4/+6
| * | | drm/i915: Spell out VLV_DISPLAY_BASE for interrupt registersVille Syrjälä2013-01-241-5/+5
| * | | drm/i915: Make VLV_GUNIT_CLOCK_GATE register value more readableVille Syrjälä2013-01-241-1/+1
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