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path: root/drivers/gpu/drm/i915
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* drm/i915/chv: Pipe select change for DP and HDMIChon Ming Lee2014-05-124-2/+20
* drm/i915/chv: Add phy supports for CherryviewChon Ming Lee2014-05-122-2/+270
* drm/i915/chv: Add update and enable pll for CherryviewChon Ming Lee2014-05-122-2/+202
* drm/i915/chv: find the best divisor for the target clock v4Chon Ming Lee2014-05-122-0/+107
* drm/i915/chv: Trigger phy common lane resetChon Ming Lee2014-05-122-15/+65
* drm/i915/chv: Add vlv_pipe_to_channelChon Ming Lee2014-05-121-0/+14
* drm/i915/chv: Update Cherryview DPLL changes to support Port D. v2Chon Ming Lee2014-05-123-2/+16
* drm/i915/chv: Add DPIO offset for Cherryview. v3Chon Ming Lee2014-05-123-2/+13
* drm/i915/chv: Add DDL register defines for CherryviewVille Syrjälä2014-05-121-0/+29
* srm/i915/chv: Add Cherryview PCI IDsVille Syrjälä2014-05-121-1/+11
* drm/i915/chv: Initial clock gating support for CherryviewVille Syrjälä2014-05-121-0/+13
* drm/i915/chv: Add Cherryview interrupt registers into debugfsVille Syrjälä2014-05-121-1/+41
* drm/i915: Drop unecessary casts in i915_irq.cDaniel Vetter2014-05-121-6/+6
* drm/i915/chv: Preliminary interrupt support for CherryviewVille Syrjälä2014-05-121-1/+224
* drm/i915: Use hash tables for the command parserBrad Volkin2014-05-124-38/+140
* drm/i915: Convert gmch platforms over to ilk_crtc_{enable, disable}_planes()Ville Syrjälä2014-05-121-78/+56
* drm/i915: Flush request queue when waiting for ring spaceChris Wilson2014-05-083-27/+16
* drm/i915: Improve fallback ring waitingChris Wilson2014-05-081-6/+16
* drm/i915: Make aliasing a 2nd class VMBen Widawsky2014-05-071-0/+4
* drm/i915: Use topdown allocation for PPGTT PDEs on gen6/7Ben Widawsky2014-05-071-2/+1
* drm/i915: vlv: enable runtime PMImre Deak2014-05-071-1/+1
* drm/i915: vlv: add runtime PM supportImre Deak2014-05-072-0/+389
* drm/i915: propagate the error code from runtime PM callbacksImre Deak2014-05-071-15/+42
* drm/i915: add various missing GTI/Gunit register definitionsImre Deak2014-05-071-1/+40
* drm/i915/chv: Add DPINVGTT registers defines for CherryviewVille Syrjälä2014-05-061-1/+11
* drm/i915/chv: Add display interrupt registers bits for CherryviewVille Syrjälä2014-05-061-1/+20
* drm/i915/chv: Add DPFLIPSTAT register bits for CherryviewVille Syrjälä2014-05-061-0/+7
* drm/i915/chv: Add PIPESTAT register bits for CherryviewVille Syrjälä2014-05-061-0/+8
* drm/i915/chv: Enable aliasing PPGTT for CHVVille Syrjälä2014-05-061-3/+4
* drm/i915/chv: Flush caches when programming page tablesRafael Barbalho2014-05-061-1/+10
* drm/i915/chv: PPAT setup for CherryviewVille Syrjälä2014-05-062-4/+40
* drm/i915: Remove useless checks from primary enable/disableVille Syrjälä2014-05-061-4/+2
* drm/i915: Merge LP1+ watermarks in safer wayVille Syrjälä2014-05-061-9/+28
* drm/i915: Make sure computed watermarks never overflow the registersVille Syrjälä2014-05-061-7/+36
* drm/i915: Add pipe update trace pointsVille Syrjälä2014-05-062-0/+81
* drm/i915: Perform primary enable/disable atomically with sprite updatesVille Syrjälä2014-05-061-39/+55
* drm/i915: Make sprite updates atomicVille Syrjälä2014-05-064-6/+154
* drm/i915: Support 64b relocationsBen Widawsky2014-05-051-10/+13
* drm/i915: Support 64b execbufBen Widawsky2014-05-053-10/+10
* drm/i915/sdvo: Remove ->mode_set callbackDaniel Vetter2014-05-051-2/+2
* drm/i915/crt: Remove ->mode_set callbackDaniel Vetter2014-05-051-46/+30
* drm/i915/tv: Remove ->mode_set callbackDaniel Vetter2014-05-051-2/+2
* drm/i915/tv: Rip out pipe-disabling nonsense from ->mode_setDaniel Vetter2014-05-051-41/+21
* drm/i915/tv: De-magic device checkDaniel Vetter2014-05-051-1/+1
* drm/i915/tv: extract set_color_conversionDaniel Vetter2014-05-051-14/+21
* drm/i915/tv: extract set_tv_mode_timingsDaniel Vetter2014-05-051-50/+61
* drm/i915/dvo: Remove ->mode_set callbackDaniel Vetter2014-05-051-2/+2
* drm/i915: Make encoder->mode_set callbacks optionalDaniel Vetter2014-05-051-1/+3
* drm/i915: Make primary_enabled match the actual hardware stateVille Syrjälä2014-05-051-3/+15
* drm/i915: Move ring_begin to signal()Ben Widawsky2014-05-052-18/+25
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