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path: root/drivers/gpu/drm/i915/intel_lrc.c
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* drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno writeMichał Winiarski2016-04-181-2/+8
* drm/i915: Fixup the free space logic in ring_prepareAkash Goel2016-04-181-3/+3
* drm/i915: Execlists cannot pin a context without the objectChris Wilson2016-02-261-4/+0
* drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RSMichel Thierry2016-02-261-1/+2
* drm/i915/gen9: Set value of Indirect Context Offset based on gen versionMichel Thierry2016-02-261-2/+24
* drm/i915: Fix premature LRC unpin in GuC modeTvrtko Ursulin2016-01-281-2/+14
* drm/i915: Make LRC pinning own a reference to the contextTvrtko Ursulin2016-01-281-0/+4
* drm/i915: Make LRC (un)pinning work on context and engineTvrtko Ursulin2016-01-281-24/+25
* drm/i915/guc: Decouple GuC engine id from ring idAlex Dai2016-01-251-0/+5
* drm/i915: More use of the cached LRC stateTvrtko Ursulin2016-01-251-2/+4
* drm/i915: Seal busy-ioctl uABI and prevent leaking of internal idsChris Wilson2016-01-211-0/+5
* drm/i915: Use ordered seqno write interrupt generation on gen8+ execlistsChris Wilson2016-01-211-28/+61
* drm/i915: tidy up a few leftoversDave Gordon2016-01-211-21/+17
* drm/i915: abolish separate per-ring default_context pointersDave Gordon2016-01-211-8/+9
* drm/i915: simplify allocation of driver-internal requestsDave Gordon2016-01-211-5/+4
* drm/i915: Cache LRC state page in the contextTvrtko Ursulin2016-01-181-18/+21
* drm/i915: Cache ringbuffer GTT VMATvrtko Ursulin2016-01-181-2/+1
* drm/i915: Do not call API requiring struct_mutex where it is not availableTvrtko Ursulin2016-01-181-61/+90
* drm/i915: Make sure DC writes are coherent on flush.Francisco Jerez2016-01-151-0/+1
* drm/i915: Fix bsd2 ring nameTvrtko Ursulin2016-01-131-1/+1
* drm/i915: Compact logical ring interrupt initializationTvrtko Ursulin2016-01-131-20/+13
* drm/i915: Extract vfunc setup from logical ring initializersTvrtko Ursulin2016-01-131-59/+29
* drm/i915/bdw+: Replace list_del+list_add_tail with list_move_tailTvrtko Ursulin2016-01-121-9/+6
* drm/i915: Don't warn if the workaround list is empty part 2.Boyer, Wayne2016-01-081-1/+1
* drm/i915: Extract CSB status readBen Widawsky2016-01-071-3/+16
* drm/i915: Change WARN to ERROR in CSB countBen Widawsky2016-01-071-1/+3
* drm/i915: Cleanup some of the CSB handlingBen Widawsky2016-01-071-6/+9
* drm/i915: add kerneldoc for intel_lr_context_size()Dave Gordon2016-01-051-0/+14
* drm/i915/guc: Expose (intel)_lr_context_size()Dave Gordon2016-01-051-2/+2
* drm/i915/guc: Move GuC wq_check_space to alloc_request_extrasAlex Dai2016-01-051-0/+13
* drm/i915: Fix whitespace (trivial)Ben Widawsky2015-12-301-2/+2
* drm/i915: Limit VF cache invalidate workaround usage to gen9Ben Widawsky2015-12-211-8/+8
* drm/i915: mark GEM object pages dirty when mapped & written by the CPUDave Gordon2015-12-111-7/+4
* drm/i915: intel_ring_initialized() must be simple and inlineDave Gordon2015-12-101-5/+12
* Revert "drm/i915: Extend LRC pinning to cover GPU context writeback"Daniel Vetter2015-12-041-113/+23
* drm/i915: Extend LRC pinning to cover GPU context writebackNick Hoath2015-12-031-23/+113
* Merge tag 'v4.4-rc2' into drm-intel-next-queuedDaniel Vetter2015-11-231-7/+33
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| * Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2015-11-101-181/+246
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| | * Merge tag 'drm-intel-next-2015-10-10' of git://anongit.freedesktop.org/drm-in...Dave Airlie2015-10-201-15/+0
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| | * \ Merge commit '06d1ee32a4d25356a710b49d5e95dbdd68bdf505' of git://git.kernel.o...Dave Airlie2015-10-161-7/+32
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| * | | | drm/i915: Flush pipecontrol post-sync writesChris Wilson2015-10-131-0/+1
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| * | | drm/i915: Consider HW CSB write pointer before resetting the sw read pointerMichel Thierry2015-09-281-7/+32
* | | | Revert "drm/i915: Initialize HWS page address after GPU reset"Arun Siluvery2015-11-191-6/+0
* | | | drm/i915: Type safe register read/writeVille Syrjälä2015-11-181-2/+2
* | | | drm/i915: Wrap context LRI init in a macroVille Syrjälä2015-11-181-51/+40
* | | | drm/i915: Give names to more ring registersVille Syrjälä2015-11-181-11/+11
* | | | drm/i915: Wrap ASSIGN_CTX_{PDP,PM4L} in do {} while(0)Ville Syrjälä2015-11-181-4/+4
* | | | drm/i915: Add wa_ctx_emit_reg()Ville Syrjälä2015-11-181-4/+6
* | | | drm/i915: Add functions to emit register offsets to the ringVille Syrjälä2015-11-181-4/+4
* | | | drm/i915: make A0 wa's applied to A1Tim Gore2015-10-291-4/+4
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