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path: root/drivers/gpu/drm/i915/intel_engine_cs.c
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* drm/i915/preempt: Default to disabled mid-command preemption levelsMichał Winiarski2017-10-041-0/+25
* drm/i915/preempt: Fix WaEnablePreemptionGranularityControlByUMDJeff McGee2017-10-041-10/+6
* drm/i915: Remove WA_(SET|CLR)_BITChris Wilson2017-10-041-5/+0
* drm/i915: Move MMCD_MISC_CTRL from context w/a to standardChris Wilson2017-10-041-1/+5
* drm/i915: Transform whitelisting WAs into a simple reg writeOscar Mateo2017-10-041-2/+2
* drm/i915: Make execlist port count variableMika Kuoppala2017-09-251-0/+4
* drm/i915: Move execlist initialization into intel_engine_cs.cMika Kuoppala2017-09-251-2/+28
* drm/i915: Make own struct for execlist itemsMika Kuoppala2017-09-251-6/+6
* drm/i915/cnl: Add Gen10 LRC sizeOscar Mateo2017-09-221-0/+2
* drm/i915: Rename global i915 to i915_modparamsMichal Wajdeczko2017-09-221-2/+2
* drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCSVille Syrjälä2017-09-141-0/+13
* drm/i915: Allow HW status page to be bound highChris Wilson2017-09-131-0/+2
* drm/i915/lrc: allocate separate page for HWSPDaniele Ceraolo Spurio2017-09-131-1/+125
* drm/i915: Transform WaDisablePooledEuLoadBalancingFix into a simple register ...Oscar Mateo2017-09-071-2/+2
* drm/i915: Transform WaDisableDynamicCreditSharing into a simple register writeOscar Mateo2017-09-071-2/+3
* drm/i915: Transform WaDisableGafsUnitClkGating into a simple reg writeOscar Mateo2017-09-071-3/+6
* drm/i915: WaPushConstantDereferenceHoldDisable needs to modify a masked registerOscar Mateo2017-09-071-1/+1
* drm/i915: Transform WaDisableI2mCycleOnWRPort into a simple reg writeOscar Mateo2017-09-071-3/+4
* drm/i915: Transform WaInPlaceDecompressionHang into a simple reg writeOscar Mateo2017-09-071-10/+15
* drm/i915/cnl: WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod)Rodrigo Vivi2017-09-061-0/+4
* drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gmChris Wilson2017-09-061-0/+15
* drm/i915/cnl: WaDisableI2mCycleOnWRPortRodrigo Vivi2017-08-301-0/+5
* drm/i915/cnl: WA FtrEnableFastAnisoL1BankingFixRodrigo Vivi2017-08-301-0/+3
* drm/i915/cnl: WaForceContextSaveRestoreNonCoherentRodrigo Vivi2017-08-231-0/+4
* drm/i915/cnl: WaPushConstantDereferenceHoldDisableOscar Mateo2017-08-231-0/+3
* drm/i915/cnl: WaDisableEnhancedSBEVertexCachingRodrigo Vivi2017-08-181-0/+5
* drm/i915/cnl: Add WaDisableReplayBufferBankArbitrationOptimizationRodrigo Vivi2017-08-181-0/+4
* drm/i915/cnl: Introduce initial Cannonlake Workarounds.Rodrigo Vivi2017-08-181-0/+19
* drm/i915: Move idle checks before intel_engine_init_global_seqno()Chris Wilson2017-07-271-3/+0
* drm/i915: Check the execlist queue for pending requests before declaring idleChris Wilson2017-07-271-0/+4
* drm/i915/cnl: Gen10 render context size.Rodrigo Vivi2017-07-071-0/+1
* drm/i915/cfl: Fix Workarounds.Rodrigo Vivi2017-06-291-7/+7
* drm/i915: Cancel pending execlists irq handler upon idlingChris Wilson2017-06-281-0/+1
* drm/i915: Simplify intel_engines_initTvrtko Ursulin2017-06-201-24/+12
* drm/i915/cfl: Introduce Coffee Lake workarounds.Rodrigo Vivi2017-06-161-22/+59
* drm/i915: Check the ring is empty when declaring the engines are idleChris Wilson2017-06-011-0/+5
* drm/i915: Hold a wakeref for probing the ring registersChris Wilson2017-05-301-1/+17
* drm/i915: Split execlist priority queue into rbtree + linked listChris Wilson2017-05-171-0/+12
* drm/i915/execlists: Pack the count into the low bits of the port.requestChris Wilson2017-05-171-1/+1
* drm/i915/gen9: Reintroduce WaEnableYV12BugFixInHalfSliceChicken7Arkadiusz Hiler2017-05-171-0/+2
* drm/i915: Use engine->context_pin() to report the intel_ringChris Wilson2017-05-041-3/+4
* drm/i915: Sanitize engine context sizesJoonas Lahtinen2017-04-281-3/+87
* drm/i915: Stop touching hangcheck.seqno from intel_engine_init_global_seqno()Chris Wilson2017-04-211-3/+1
* drm/i915: Pretend the engine is always idle when mockingChris Wilson2017-04-121-0/+3
* drm/i915: Lie and treat all engines as idle if wedgedChris Wilson2017-04-111-0/+4
* drm/i915: Bail if we do not setup the RCS engineChris Wilson2017-04-111-2/+8
* drm/i915: Rename intel_engine_cs.exec_id to uabi_idChris Wilson2017-04-111-7/+7
* drm/i915: Split the engine info table in two levels, using class + instanceOscar Mateo2017-04-111-23/+43
* drm/i915: Generate the engine name based on the instance numberOscar Mateo2017-04-111-2/+3
* drm/i915: Use the same vfunc for BSD2 ring initOscar Mateo2017-04-111-1/+1
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