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path: root/drivers/gpu/drm/i915/intel_cdclk.c
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* drm/i915/glk: limit pixel clock to 99% of cdclk workaroundMadhav Chauhan2017-04-061-3/+13
* drm/i915: Implement cdclk restrictions based on Azalia BCLKPandiyan, Dhinakaran2017-03-221-0/+12
* drm/i915/glk: Apply cdclk workaround for DP audioPandiyan, Dhinakaran2017-03-221-6/+11
* drm/i915: Use new atomic iterator macros in cdclkMaarten Lankhorst2017-03-131-1/+1
* drm/i915: remove potentially confusing IS_G4X checksPaulo Zanoni2017-03-071-2/+2
* drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cd...Ville Syrjälä2017-02-081-46/+33
* drm/i915: Nuke the VLV/CHV PFI programming power domain workaroundVille Syrjälä2017-02-081-14/+0
* drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk()Ville Syrjälä2017-02-081-1/+4
* drm/i915: Pass the cdclk state to the set_cdclk() functionsVille Syrjälä2017-02-081-30/+48
* drm/i915: Pass dev_priv to remainder of the cdclk functionsVille Syrjälä2017-02-081-15/+10
* drm/i915: Track full cdclk state for the logical and actual cdclk frequenciesVille Syrjälä2017-02-081-45/+78
* drm/i915: Start moving the cdclk stuff into a distinct state structureVille Syrjälä2017-02-081-156/+226
* drm/i915: Pass computed vco to bxt_set_cdclk()Ville Syrjälä2017-02-081-14/+19
* drm/i915: Move most cdclk/rawclk related code to intel_cdclk.cVille Syrjälä2017-02-081-0/+1794
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